Off-state Drain Leakage Current Research Articles

Stepped ohmic structure of AlGaN/GaN HEMT with lower off-state leakage current

Abstract Utilizing the TCAD-ATLAS platform, we performed accurate fitting of the electrical characteristics of GaN HEMT devices, achieving a fitting error of less than 5%. Building upon this parameter fitting, we introduced a stepped ohmic structure and compared it with the conventional rectangular structure. The findings highlight the significant impact of the ohmic structure on the off-state drain leakage current of the device. Through the implementation of the stepped ohmic structure, a remarkable reduction in the off-state leakage current was achieved. Specifically, the off-state leakage current decreased by three orders of magnitude, declining from 10−5 mA/mm to 10−8 mA/mm. Importantly, this improvement in leakage current was accomplished without adversely affecting the device’s output characteristics. These results underscore the effectiveness of the stepped ohmic structure in enhancing the overall performance of GaN HEMT devices.

Reduction of off-state drain current in AlN/[formula omitted] HEMT by trap state engineering

In this work, we report various strategies to reduce the off-state drain leakage current (IOFF) in AlN/β−Ga2O3 high electron mobility transistor (HEMT) by 2D device simulation. We have investigated the effect of access region, channel doping concentration, barrier layer thickness, and trap state engineering on IOFF. The formation of a parallel channel deep into the substrate has been found to be responsible for large IOFF. All other strategies except trap state engineering have an incremental effect on IOFF. However, the device’s IOFF was reduced by around 12 orders of magnitude by trap-state engineering. Simultaneously, the on-state performance was unaffected, resulting in an elevated ION/IOFF current ratio of (1013). A steep subthreshold slope of 0.267 (V/dec) was also obtained. Further, we have investigated the impact of both donor- and acceptor-type traps on subthreshold characteristics. These promising results highlight the potential of AlN/β−Ga2O3 HEMT as a switch and for future high-power nanoelectronics applications.

Study of GaN/AlGaN air structure gate HEMTs with high linearity for RF applications

The effect of a novel float gate HEMT with Gan cap under the gate is studied, its DC and RF characteristics have been shown by using SILVACO TCAD tool, as contrast, the simulation of the conventional T shape gate hemt, which fitting well with the experimental result, is also demonstrated. The proposed structure offers approximately 5 times improvement in power gain cutoff frequency (fmax) and current gain Cut-off frequency(fT) (from 5.68 and 3.7 GHz to 30.1 and 20.1 GHz, respectively.) and it greatly enhances the linearity of the Gan based HEMT, a much flatter curve for fT/fmax versus gate voltage are also shown, and 1 V positive threshold voltage shift is gained, meanwhile the off-state drain leakage current is also improved to a certain extend, therefor the hemt obtains a much higher Ion/Ioff ratio, without sacrificing the saturate current. Besides, the degradation of drain current due to the self-heating effect is also ameliorated by applying the novel structure. Finally, the corresponding electrical characteristic changes are systematically analyzed according to the energy band and other schematic diagrams, the physical insight is given in explaining the mechanism inside.

Effect of GaN cap layer on the performance of AlInN/GaN-based HEMTs

The effect of the GaN cap layer on the performance of AlInN/GaN-based HEMTs has been studied. Detailed analysis of the DC characteristics reveals that the addition of the GaN cap layer reduces the gate leakage current and increases the saturation drain current of HEMT. We have observed a slight increase in the two-dimensional electron gas density on the addition of the GaN cap layer. The addition of the GaN cap layer shifts the threshold voltage towards the negative direction, reduces the off-state drain leakage current, improves subthreshold swing, and enhances the ION/IOFF ratio of HEMT. The TCAD simulation shows that the addition of the GaN cap layer reduces the peak electric field at the drain side edge of the gate and improves the breakdown voltage. From the double pulsed ID-VDS measurement, we have found that the presence of the GaN cap layer reduces the current collapse due to gate-lag and drain-lag by passivating the surface traps of the access regions. Although there is a slight reduction in transconductance, the current gain cut-off frequency (fT) of the HEMT with GaN cap is higher than the HEMT without GaN cap.

Suppression of the regrowth interface leakage current in AlGaN/GaN HEMTs by unactivated Mg doped GaN layer

The leakage current caused by the Si pileup at the regrowth interface of AlGaN/GaN high electron mobility transistors (HEMTs) is significantly suppressed by the semi-insulating Mg-doped GaN layer. Mg is unintentionally doped and can be originated from the graphite susceptor of metal organic vapor phase epitaxy. Before regrowth of the AlGaN/GaN heterostructure, the GaN template is treated with hydrochloric acid (HCl) and hydrogen peroxide/potassium hydroxide (H2O2/KOH) solution to promote the adsorption of Mg on the GaN surface. The Mg-doped GaN channel layer is highly resistive due to the passivation of hydrogen. The p–n junction formed by the weakly p-type Mg-doped GaN layer and the n-type Si pileup layer depletes the excess electrons at the regrowth interface. As a result, the off-state drain leakage current of the HEMT device can be decreased by two orders of magnitude at 40 V.

Study of tri-gate AlGaN/GaN MOS-HEMTs for power application

In this letter, we present high-performance AlGaN/GaN high electron mobility transistor (HEMT) by 3-dimensional (3D) tri-gate. Due to the excellent channel control of tri-gate structure, the tri-gate HEMT shows the low subthreshold swing (SS) of 65 mV/decade, low off-state drain leakage current (Ioff) of 7 nA/mm, and On/Off ratio up to 7.6 × 107. Furthermore, we combined the tri-gate structure and metal oxide semiconductor (MOS) structure. The tri-gate MOS-HEMT with high-k dielectric oxide HfO2 was fabricated. The good interface between HfO2 and AlGaN and strain-induce polarization increase the carrier concentration. Compared to the tri-gate HEMT, the increased maximum drain current, higher On/Off ratio and better breakdown voltage is demonstrated by implanted the high k dielectric HfO2. The improved electrical performance of tri-gate MOS-HEMT shows potential for next generation power application.

(Invited) Selected Issues for SiC Mosfet Reliability

There remain a number of potential reliability issues associated with SiC power MOSFETs that interest the reliability standards community, of which this work will provide an overview of our understanding of three of those issues: (1) threshold-voltage stability; (2) body-diode robustness; and (3) short-circuit current robustness. A recent survey of commercially-available devices shows a wide range of responses in threshold-voltage stability, which is affected primarily by active charge traps in the near-interfacial region of the insulating gate oxide. Their close proximity to the semiconductor interface leads to a strong time dependence in the direct-tunneling mechanism in response to changes in gate bias, necessitating the need for faster measurements and the maintenance of the stress bias before making post-stress measurements. The observation of the activation of additional traps during bias-temperature stress in older devices underlines the need for additional attention to high-temperature charging effects as well. It is the case for at least one commercial vendor, that improvement in lower BPD density and enhanced device fabrication have led to significant improvements in body-diode robustness. Earlier vintage devices had showed varying levels of degradation in both the body diode and MOSFET on-state properties following current stress of the body diode, as well as degradation in the off-state drain leakage current. Experimental results show that both commercially-available planar and trench SiC MOSFETs have suitable short-circuit (SC) withstand times, ranging from 6 to 13 μs at T = 25 °C, VGS = 20 V, and VDS = 600 V. Even when trench devices have an identical rating to planar devices, they likely will have a significantly smaller area and heat conducting volume, contributing to their lower robustness for the same SC test conditions. All the electrical results reported seem to be consistent with thermally-driven failure mechanisms. The official standard test method of a single, long pulse is found to not be as effective as a series of shorter, incremental gate pulses, which more accurately detect failure time, even in the case of latent or delayed failure. All this work will be presented within the context of standards development within JEDEC, including a number of SiC-focused reliability task groups.

Al0.3Ga0.7N/GaN (10 nm)/Al0.1Ga0.9N HEMTs With Low Leakage Current and High Three-Terminal Breakdown Voltage

In this work, we presented a high performance AlGaN/GaN/AlGaN double heterostructure HEMT with a 10 nm channel layer and an Al0.1Ga0.9N back barrier layer. The fabricated devices exhibited an extremely low off-state drain leakage current of ${I}_{ {\scriptscriptstyle {\text{ON}}}}/{I}_{ {\scriptscriptstyle {\text{OFF}}}}$ ) of up to 1010 and a subthreshold swing (SS) of 63 mV/dec were attained due to the reduced leakage current and enhanced electron confinement. The presented devices with a gate-drain spacing ( ${L}_{\text {GD}}$ ) of $22~\mu \text{m}$ exhibited a soft breakdown voltage ( ${V}_{\text {BR}}$ ) of 1860 V with the criteria of $0.1~\mu \text{A}$ /mm and a hard ${V}_{\text {BR}}$ of 2009 V combined with a specific on-resistance ( ${R}_{ {\scriptscriptstyle {\text{ON}}}, \text {sp}}$ ) of 10.6 $\text{m}\Omega \!\cdot \! \text {cm}^{{2}}$ . Moreover, excellent high-temperature values for ${I}_{ {\scriptscriptstyle {\text{ON}}}}/{I}_{ {\scriptscriptstyle {\text{OFF}}}}$ , SS, and ${V}_{\text {BR}}$ were also attained. These results demonstrate a promising potential of the proposed devices for high power applications.

High-Performance Normally Off p-GaN Gate HEMT With Composite AlN/Al0.17Ga0.83N/Al0.3Ga0.7N Barrier Layers Design

In this paper, a novel normally off p-gallium nitride (GaN) gate high electron-mobility transistor (HEMT) with composite AlN/Al0.17Ga0.83N/Al0.3Ga0.7N barrier layers is proposed. Compared to the standard (STD) p-GaN/AlGaN/GaN HEMT structure, the composite barriers (CB) with AlN etch-stop layer can effectively improve the uniformity of the device threshold voltage ( $V_{\mathrm{ TH}} $ ) and reduce the leakage current. The CB p-GaN gate HEMT achieved a ${\mathrm{ V}}_{\mathrm{ TH}} $ of 1.7 ± 0.06 V; this value was 2.1 ± 0.2 V for STD HEMT. In addition, the off-state drain leakage current was suppressed one order of magnitude by adopting a composite barrier design.

Achievement of normally-off AlGaN/GaN high-electron mobility transistor with p-NiOx capping layer by sputtering and post-annealing

In this paper, we present a technique to fabricate normally off GaN-based high-electron mobility transistor (HEMT) by sputtering and post-annealing p-NiOx capping layer. The p-NiOx layer is produced by sputtering at room temperature and post-annealing at 500°C for 30min in pure O2 environment to achieve high hole concentration. The Vth shifts from −3V in the conventional transistor to 0.33V, and on/off current ratio became 107. The forward and reverse gate breakdown increase from 3.5V and −78V to 10V and −198V, respectively. The reverse gate leakage current is 10−9A/mm, and the off-state drain-leakage current is 10−8A/mm. The Vth hysteresis is extremely small at about 33mV. We also investigate the mechanism that increases hole concentration of p-NiOx after annealing in oxygen environment resulted from the change of Ni2+ to Ni3+ and the surge of (111)-orientation.

Thermally Stable Enhancement-Mode GaN Metal-Isolator-Semiconductor High-Electron-Mobility Transistor With Partially Recessed Fluorine-Implanted Barrier

Al2O3/AlGaN/GaN enhancement-mode metal-isolator-semiconductor high-electron-mobility transistor (MIS-HEMT) featuring a partially recessed (Al) GaN barrier was realized by a fluorine plasma implantation/etch technique. By properly adjusting the RF power driving the fluorine plasma, the fluorine plasma is able to produce two desirable results: 1) a well-controlled slow dry etching for gate recess and 2) implanting fluorine ions into the AlGaN barrier. The fluorine ions become negatively charged in the barrier layer and induce a positive shift in the threshold voltage. The proposed MIS-HEMT exhibits a threshold voltage ( $V_{\mathrm {\mathbf {TH}}})$ of +0.6 V at a drain current of $10~\mu \text{A}$ /mm, a maximum drive current of 730 mA/mm, an ON-resistance of $7.07~\Omega \,\cdot \,$ mm, and an OFF-state breakdown voltage of 703 V at an OFF-state drain leakage current of $1~\mu \text{A}$ /mm. From room temperature to 200 °C, the device exhibits a small negative shift of $V_{\mathrm {\mathbf {TH}}}$ ( $\sim 0.5$ V) that is attributed to the high-quality dielectric/F-implanted-(Al) GaN interface and the partially recessed barrier.

Performance improvement of GaN-based HEMT grown on silicon (1 1 1) substrate by inserting low temperature AlN layer

By inserting low temperature AlN, a thicker GaN layer on Si substrate without crack was obtained. After comparing the pit densities, etching pit densities, and calculating the dislocations from XRD measurements, results indicated that adding more insertion layers further improved the crystalline quality. The electrical properties were studied by the fabrication of HEMT. The results showed that the off-state drain leakage current was reduced by about two orders magnitude from 1.6×10−1mA/mm to 3.2×10−3mA/mm. Moreover, IDS,max and gm,max could be optimally increased.

GaSb p-channel metal-oxide-semiconductor field-effect transistor and its temperature dependent characteristics**Project supported by the National Basic Research Program of China (Grant No. 2011CBA00602) and the National Science and Technology Major Project of the Ministry of Science and Technology of China (Grant No. 2011ZX02708-002).

GaSb p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) with an atomic layer deposited Al2O3 gate dielectric and a self-aligned Si-implanted source/drain are experimentally demonstrated. Temperature dependent electrical characteristics are investigated. Different electrical behaviors are observed in two temperature regions, and the underlying mechanisms are discussed. It is found that the reverse-bias pn junction leakage of the drain/substrate is the main component of the off-state drain leakage current, which is generation-current dominated in the low temperature regions and is diffusion-current dominated in the high temperature regions. Methods to further reduce the off-state drain leakage current are given.

Anomalous Decrease of Off-State Drain Leakage Current in GaN/AlGaN HEMTs With Dual Optical Excitation

We report an anomalous decrease of off-state drain leakage current (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Off-state</sub> ) of GaN/AlGaN HEMTs upon dual optical excitation. The phenomenon was observed accidentally during dc characterization of devices when both fluorescent white room light and incandescent optical microscope light were turned on. A similar phenomenon was observed and verified through simultaneous optical excitation of both ultraviolet (UV ~350 nm) light and 532-nm green light. A spectrally resolved measurement revealed broad trap level centered ~2.27 eV. The decrease of I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Off-state</sub> during dual excitation is owing to the optical quenching of photoconductivity in GaN buffer layer. This quenching effect is originated from enhanced light-defect interaction, where sub-band gap light reduces photoconductivity induced by above bandgap light. Observation of this phenomenon would provide us an alternative way to characterize GaN buffer layer quality for the development of GaN HEMTs.

Reduction of off-state drain leakage in InGaAs-based metal-oxide-semiconductor field-effect transistors

Off-state drain leakage current has been investigated for InGaAs-based metal-oxide-semiconductor field-effect transistors with different drain configurations, InGaAs, and InP, respectively. The introduction of an InP drain presents a lower leakage current compared to InGaAs drain devices. From temperature dependent measurements, the leakage current mechanisms have been differentiated, and the role of drain direct band-to-band tunneling, as well as gate-induced drain leakage, has been identified.

(Invited) Development of 4 Inch and 6 Inch GaN-on-Si for High-Voltage Operation

GaN-based semiconductor devices have established their niches for both high power and high frequency operation due to their wide-bandgap, excellent transport properties, high critical field and high thermal stability, which cannot be matched by the Si-based electronics; great promises have been shown in a wide range of applications, such as highly efficient power amplifiers for mobile phone base-stations, commercial and military radar/satellite communications, advanced power transistors for power rectification with unprecedentedly low loses, power supply, motor drive, and other circuits in industrial equipment and electric/hybrid vehicles. As compared to existing Si power devices which have been and still remain the workhorse in the semiconductor industry, GaN power devices are around 20 times smaller in size and over 10 times efficient with much lower power loses. To realize the GaN performance in a cost-down platform and to continue using well-developed device fabrication technologies easily scalable to 6 inch and beyond in modern semiconductor industry, the integration of GaN-based electronics with Si platform is not only extremely emergent but also a win-win investment.The off-state breakdown behavior is one of the most important factors to examine how good the materials and epitaxial structures are for high power applications. The off-state drain current is mainly come from the space charge injection of electrons into the GaN buffer [1], as well as the Schottky gate reverse leakage current. Suppression of the off-state drain leakage current by using high quality insulating buffer layers is very essential for HEMTs based on GaN-on-Si (GOS) materials to improve both the off-state breakdown voltage and the ON/OFF ratio in power switching applications. To acquire a highly-resistive blocking buffer layer, thicker GaN epitaxial layers employing super-lattice (SL) structures and intentional dopants [2], such as carbon or iron, are usually utilized.AlGaN/GaN HEMT heterostructures were grown on (111) Si substrates by metal–organic chemical vapor deposition (MOCVD). The heterostructures consisted of a carbon doped GaN/AlN super-lattice and a carbon doped GaN buffer layer with a total thickness from 2.5 µm to 5 µm, followed by a 120-nm-thick undoped GaN channel layer, 18-21 nm of Al0.27Ga0.73N barrier, and 2-nm-thick GaN cap layer. The devices analyzed in this study were fabricated using our standard device fabrication technology for AlGaN/GaN HEMTs on Si. Ti/Al/Ni/Au multilayer was first deposited and annealed at 850°C in a nitrogen environment to form an Ohmic contact. Multiple doses and energies of nitrogen ion implantation were used for the device isolation and to maintain a planar geometry in the fabricated device to further reduce parasitic leakage current. Ni/Au based Schottky gate metallization was defined by using optical lithography followed by a standard lift-off process of the e-beam deposited metals. The gate dimension was 2 µm × 100 µm. The distances of gate-to-source (Lgs) was fixed at 2 µm while the gate-to-drain distance (Lgd) varied from 2 µm to 10 µm. The isolation characteristics were collected between two Ohmic metal pads with 5 µm spacing. A standard 250 µm × 150 µm Ohmic contact on the epitaxial side of the HEMT wafers and broad area Al contact on the back side of the substrates were also fabricated for vertical breakdown measurement.This presentation will review IQE’s development of the AlGaN/GaN HEMTs grown by MOCVD on low cost and large size (111) Si substrates scaling in diameter from 4 inch to 6 inch. Typical DC characteristics will be shown and compared between different epitaxial structures. For high voltage operation, the two-terminal isolation blocking voltage/leakage, vertical breakdown voltage, as well as three-terminal off-state breakdown voltage and off-state drain leakage current for AlGaN/GaN HEMTs grown on silicon substrates with different buffer thickness and different carbon doping concentration will be discussed. As shown in Figure 1, isolation blocking voltage is demonstrated to increase up to about 1000V at 1µA/mm on 5µm-spacing isolation pads and leakage current to decrease to about 5 nA/mm with increasing carbon doping concentration and buffer thickness. With the improved insulating buffer, high off-state breakdown voltage of 1.2 kV and low leakage current of 5×10-8A/mm are achieved.Figure 1. Isolation blocking voltage and leakage current measured between two isolation pads with 5µm spacing for a set of AlGaN/GaN HEMT structures grown on Si with different carbon doping concentration in buffer and different buffer thickness.1. M. Micovic, P. Hashimoto, H. Ming, I. Milosavljevic, J. Duvall, P. J. Willadsen, W. S. Wong, A. M. Conway, A. Kurdoghlian, P. W. Deelman, Jeong-S Moon, A. Schmitz, and M. J. Delaney, 2004. IEDM Technical Digest. IEEE International, 807-810 (2004).2. J. B. Webb, H. Tang, S. Rolfe, and J. A. Bardwell, Applied Physics Letters 75, 953-955 (1999).

Low-leakage-current AlGaN/GaN HEMTs on Si substrates with partially Mg-doped GaN buffer layer by metal organic chemical vapor deposition

High-performance low-leakage-current AlGaN/GaN high electron mobility transistors (HEMTs) on silicon (111) substrates grown by metal organic chemical vapor deposition (MOCVD) with a novel partially Magnesium (Mg)-doped GaN buffer scheme have been fabricated successfully. The growth and DC results were compared between Mg-doped GaN buffer layer and a unintentionally one. A 1-μm gate-length transistor with Mg-doped buffer layer exhibited an OFF-state drain leakage current of 8.3 × 10−8 A/mm, to our best knowledge, which is the lowest value reported for MOCVD-grown AlGaN/GaN HEMTs on Si featuring the same dimension and structure. The RF characteristics of 0.25-μm gate length T-shaped gate HEMTs were also investigated.

Atomic Layer Epitaxy AlN for Enhanced AlGaN/GaN HEMT Passivation

Enhancements in AlGaN/GaN high-electron-mobility transistor (HEMT) performance have been realized through ultrathin (4 nm) AlN passivation layers, formed by atomic layer epitaxy (ALE). A combination of ex situ and in situ surface cleans prepare the surface for deposition of ALE AlN. HEMTs passivated by high crystallinity AlN, grown at 500 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$^{\circ}{\rm C}$</tex></formula> , show improvements in 2-D electron gas sheet carrier density, gate leakage current, off-state drain leakage current, subthreshold slope, and breakdown voltage. In addition, degradation of dynamic on resistance during pulsed off-state voltage switching stress is suppressed by <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${\sim}{50\%}$</tex></formula> compared with HEMTs passivated by conventional plasma enhanced chemical vapor deposition <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${\rm SiN}_{x}$</tex></formula> .

Improved Passivation Techniques for AlGaN/GaN Hemts

AlGaN/GaN power high electron mobility transistor (HEMT) performance is limited by current collapse and off-state gate and drain leakage current. A series of studies to improve these properties through optimized surface cleaning, as well as the implementation of novel materials, such as AlN and nanocrystalline diamond, is presented. Reduced leakage currents, degradation of dynamic ON-resistance, and current collapse ratio quantify improvement in HEMT performance. DC I-V measurements, pulsed I-V measurements, and a boost converter test circuit is used to validate these properties.

AlGaN/GaN HEMTs With Low Leakage Current and High On/Off Current Ratio

In this letter, we propose using an oxide-filled isolation structure followed by N2/H2 postgate annealing to reduce the leakage current in AlGaN/GaN HEMTs. An off-state drain leakage current that is smaller than 10-9 A/mm (minimum 5.1 × 10-10 A/mm) can be achieved, and a gate leakage current in the range of 7.8 ×10-10 to 9.2 × 10-11A/mm (V GS from -10 to 0 V and V DS = 10 V) is obtained. The substantially reduced leakage current results in an excellent on/off current ratio that is up to 1.5 × 108. An improved flicker noise characteristic is also observed in the oxide-filled devices compared with that in the traditional mesa-isolated GaN HEMTs.