Normally-on Devices Research Articles

Performance Comparison and Design Issue on Different GaN Power Transistor Structures

ABSTRACTThree types of Ganium Nitride (GaN) transistors were studied in this work. The devices were fabricated and exhibited unique characteristics over on-state current and off-state blocking performances. We also compared the performance differences of devices fabricated by multiepitaxial GaN/AlGaN layers on different substrates (Sapphire and Si) and evaluated the correlations among starting substrate, device variation, and manufacturing uniformity. The first device is a normally-on device with Sapphire substrate which shows good drain saturation current (Idsat) and breakdown characteristics, but the gate leakage current is quite large. The second device is a normally-off GaN transistor named metal-insulate-semiconductor (MIS) heterojunction field-effect transistor (MIS-HFET) which exhibits good performance with threshold voltage (Vth) of 3V and breakdown voltage (Vbd) of over 1800V. However the third device is a normally-off GaN metal-oxide-semiconductor field-elect transistor (MOSFET) structure which is rather difficult to exhibit good blocking characteristic due to inadequate doping process control of the reduce-surface-field (RESURF) region.

High temperature anti short circuit function for normally-on SiC JFET in an inverter leg configuration

The SiC JFET is commercially available as a normally-on device. In an inverter leg configuration, many temperature effects must be compensated. Moreover, specific safety functions have to be implemented and the JFET drivers are generally the best locations to implement latter requirements. The paper describes experimental results about a SOI CMOS core driver operated up to 250°C. Particularly, an option is presented to compensate for the decrease in the driver output current with temperature. It is also demonstrated primary results of the integration of an anti short-circuit solution previously verified as a hybrid vehicle. It is shown that the reactivity of the safety function is reduced to less than 5μs at 250°C compared to 100μs in earlier vehicle at 200°C.

High-Performance 4H–SiC-Based Metal–Insulator–Semiconductor Ultraviolet Photodetectors With $\hbox{SiO}_{2}$ and $\hbox{Al}_{2}\hbox{O}_{3}\hbox{/}\hbox{SiO}_{2}$ Films

4H-SiC-based metal-insulator-semiconductor (MIS) ultraviolet (UV) photodetectors with thermally grown SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> and evaporated Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> (A/S) films are fabricated and demonstrated as normally-off and normally-on mode devices, respectively. Ultralow dark currents of 3.25 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-10</sup> and 9.75 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-9</sup> A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and high UV-to-visible rejection ratios of >; 2 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> have been achieved at 10 V. The peak responsivities of these devices were separately 30 mA/W at 260 nm and 50 mA/W at 270 nm at 10 V. These results demonstrate that S/4H-SiC and A/S/4H-SiC MIS photodetectors are promising candidates to be applied in optoelectronic integrated circuits.

Comparison of Total Losses of 1.2 kV SiC JFET and BJT in DC-DC Converter Including Gate Driver

The 1.2 kV SiC JFET and BJT devices have been investigated and compared with respect to total losses including the gate driver losses in a DC-DC converter configuration. The buried grid, Normally-on JFET devices with threshold voltage of -50 V and -10V are compared to BJT devices with ideal semiconductor and passivating insulator interface and an interface with surface recombination velocity of 4.5•104 cm/s yielding agreement to the reported experimental current gain values. The conduction losses of both types of devices are independent of the switching frequency while the switching losses are proportional to the switching frequency. The driver losses are proportional to the switching frequency in the JFET case but to a large extent independent of the switching frequency in the BJT case. The passivation of the emitter junction modeled here by surface recombination velocity has a significant impact on conduction losses and gate driver losses in the investigated BJT devices.

An enhancement-mode electrochemical organic field-effect transistor

Until now, electrochemical field-effect transistors using PEDOT:PSS have operated as normally-on depletion-mode devices. However, for many electronic applications, it is highly desirable to use also enhancement-mode transistors that remain in the OFF state until a gate voltage is applied. We report the first realization of this second transistor type using PEDOT:PSS. This represents a step towards electrochemical transistors serving complementary electronic functions as existing CMOS technology.

Optically Controlled Silicon MESFET Fabrication and Characterizations for Optical Modulator/Demodulator

An optically controlled silicon MESFET (OPFET) was fabricated by diffusion process to enhance the quantum efficiency, which is the most important optoelectronic device performance usually affected by ion implantation process due to large number of process induced defects. The desired impurity distribution profile and the junction depth were obtained solely with diffusion, and etching processes monitored by atomic force microscope, spreading resistance profiling and C-V measurements. With this approach fabrication induced defects are reduced, leading to significantly improved performance. The fabricated OPFET devices showed proper I-V characteristics with desired pinch-off voltage and threshold voltage for normally-on devices. The peak photoresponsivity was obtained at 620 ㎚ wavelength and the extracted external quantum efficiency from the photoresponse plot was found to be approximately 87.9%. This result is evidence of enhancement of device quantum efficiency fabricated by the diffusion process. It also supports the fact that the diffusion process is an extremely suitable process for fabrication of high performance optoelectronic devices. The maximum gain of OPFET at optical modulated signal was obtained at the frequency of 1 MHz with rise time and fall time approximately of 480 nS. The extracted transconductance shows the possible potential of device speed performance improvements for shorter gate length. The results support the use of a diffusion process for fabrication of high performance optoelectronic devices.

Normally-off operation AlGaN/GaN MOS-HEMT with high threshold voltage

Normally-off operation AlGaN/GaN high electron mobility transistors have been developed utilising a fluorine-based treatment technique combined with a metal-oxide-semiconductor gate architecture. Threshold voltage as high as 5.1 V was achieved by using an 16 nm-thick Al2O3 gate oxide film. Additionally, the device performed a drain current density of 500 mA/mm and a peak transconductance of 100 mS/mm, which are comparable to the conventional normally-on devices.

High Temperature Inverter for Airborne Application

This paper reports the design, fabrication and experimental performance of a 2kW, 20kHz, High Temperature, three-phase, all-SiC JFET Voltage Source Inverter (VSI). The inverter includes a specific JFET driver and a DC-link capacitor. All these elements have been validated over a wide temperature range, between 25°C and 200°C. The power device used, a 1200V, 15A, JFET from SiCED has been characterized up to 200°C. An innovative reliable protection circuit for normally-on devices is also presented and validated.

BI-DIRECTIONAL SCALABLE SOLID-STATE CIRCUIT BREAKERS FOR HYBRID-ELECTRIC VEHICLES

Power electronics in hybrid-electric military ground vehicles require fast fault isolation, and benefit additionally from bi-directional fault isolation. To prevent system damage or failure, maximum fault current interrupt speeds in tens to hundreds of microseconds are necessary. While inherently providing bi-directional fault isolation, mechanical contactors and circuit breakers do not provide adequate actuation speeds, and suffer severe degradation during repeated fault isolation. Instead, it is desired to use a scalable array of solid-state devices as a solid-state circuit breaker (SSCB) having a collectively low conduction loss to provide large current handling capability and fast transition speed for current interruption. Although, both silicon-carbide (SiC) JFET and SiC MOSFET devices having high breakdown voltages and low drain-to-source resistances have been developed, neither device structure alone is capable of reverse blocking at full voltage. Limitations exist for using a dual common-source structure for either device type. Small-scale SSCB experiments were conducted using 0.03 cm2 normally-on SiC VJFETs. Based on results of these tests, a normally-on VJFET device modification is made, and a proposed symmetric SiC JFET is considered for this application.

Fabrication and Initial Characterization of 600 V 4H-SiC RESURF-type JFETs

AbstractA RESURF-type JFET is a suitable structure as a lateral switching device with a breakdown voltage of above 600 V for an inverter module which drives motors of an electric or hybrid automobile. In this study, 600 V RESURF-type JFETs were fabricated to investigate the operation and characteristics. The drift region between the drain and the source areas has a double RESURF structure to reduce the on-resistance. At first, small devices were fabricated. The width and length of the channel are 200 μm and 10 μm, respectively. The distance between the drain and the gate areas, which is the drift length, is 15 μm. The saturation current normally-off device is about 0.6 mA at a gate voltage of 3 V. The specific on-resistance is about 160mωcm2. The maximum breakdown voltage is 720 V. Next, large ones were fabricated. The width of the channel is 80 mm. The saturation current normally-on device is about 0.5 A at a gate voltage of 2 V. The specific on-resistance is about 200mωcm2. The maximum breakdown voltage is 250 V.

Design and Process Issues for Silicon Carbide Power DiMOSFETS

ABSTRACTThis paper discusses the design and process issues of high voltage power DiMOSFETs (Double implanted MOSFETs) in 4H-silicon carbide (SiC). Since Critical Field (EC) in 4H-SiC is very high (10X higher than that of a Si), special care is needed to protect the gate oxide. 2D device simulation tool was used to determine the optimal JFET gap, which provides adequate gate oxide protection as well as a reasonable JFET resistance. The other issue in 4H-SiC DiMOSFETs is extremely low effective channel mobility (μeff) in the implanted p-well regions. NO anneal of the gate oxide and buried channel structure are used for increasing μeff. NO anneal, which was reported to be very effective in increasing the μeff of SiC MOSFETS in p-type epilayers, did not produce reasonable μeff of SiC MOSFETs in the implanted p-well. Buried channel (BC) structure with 2.7×1012 cm−2 charge in the channel showed high μeff utilizing bulk buried channel, but resulted in a normally-on device. However, it was shown that by controlling the charge in the BC layer, a normally off device with high μeff can be produced. A 3.3 mm × 3.3 mm DiMOSFET with BC structure showed a drain current of 10 A, which is the highest current reported in SiC power MOSFETs to date, at a forward drop of 4.4 V with a gate bias of only 2.5 V.

Turn off trigger energy characteristics of the superconducting power electronics device (S-PED)-in case of type d

S-PED means a superconducting power electronics device. We made some thermally controlled S-PED which is a normally-on device. They work up to 100 Hz as a full wave rectifier. For the power supply of superconducting magnets, the flux pump can be used as SPEED (superconducting power electronics excitation device). In this paper, we describe the turn off characteristics of one of the S-PED (type d). The relations between generated resistance, gate-trigger energy and channel current were obtained.

Self-aligned complementary GaAs MISFETs using alow-temperature-grown GaAs gate insulator

GaAs complementary metal insulator semiconductor field effect transistors (MISFETs) with a low temperature grown GaAs gate insulator were fabricated using the same epitaxial layer structure. Self-aligned Si and Be implants were used for the source/drain region in n- and p-channel MISFETs, respectively. With a 1.5 µm gate length, the maximum drain current is 40 and 120 mA/mm for a normally-off n- and p-channel MISFET, respectively. It increases to 500 mA/mm for a normally-on n-channel device.

High contrast optical modulator based on electrically tunable polarization rotation and phase retardation in uniaxially strained (100) multiple quantum wells

We report a novel approach to the design of normal incidence multiple quantum well light modulators. The quantum confined Stark effect is utilized to tune the light polarization rotation and phase retardation created by a thermally induced in-plane anisotropic strain. An exceedingly high contrast ratio of 5000:1 is demonstrated for a normally-on device at room temperature. >

Monolithic integration of normally-on and normally-off asymmetric Fabry–Perot modulators by selective antireflection coating

We present asymmetric Fabry–Perot quantum-well modulators which are overbalanced, so that at zero bias at the exciton wavelength reflectivity is high. As bias is applied and the quantum-well absorption decreases, the optical cavity balances, nulling reflection. By partially antireflection coating, at zero bias the optical cavity is balanced, so that the reflectivity is near zero, and increases with bias. Therefore, we can integrate normally-on and normally-off high-contrast modulators by selective AR coating. With 10 V bias, we obtain 11:1 contrast ratio for the normally-on devices and 8:1 for the normally-off devices.

Simulation of a GaAs MESFET including velocity overshoot: an extended drift-diffusion formalism

Numerical simulations are described for GaAs MESFETs. They are based on an extended drift-diffusion equation formalism which allows for the inclusion of the velocity overshoot effect. The overshoot correction term which augments the drift-diffusion current equation is proportional to the gradient of the local electric field. The proportionality constant has been calculated by Monte Carlo methods as a function of the electric field. The model developed solves the extended drift-diffusion current continuity equation and Poisson's equation over a two-dimensional grid using the method of finite differences. Simulations for normally-on and normally-off devices with gate lengths of 0.2, 0.5, and 1.0 mu m are compared with published Monte Carlo calculations. The calculated drain currents and average electron velocities in the device channel are in excellent agreement. The extended drift-diffusion formalism is useful and easy to implement for modeling field-effect transistors with submicron feature size. >

MESFETs in thin silicon on SIMOX

Si MESFETs have been built into a thin (100nm) Si film on buried oxide implanted wafers. Aluminium has been used as gate material to obtain process compatibility with a highperformance CMOS process. With appropriate back bias the normally-on devices become enhancement-type. The highquality SIMOX substrate provides excellent transconductance, while the thin film reduces two-dimensional effects.

Modulation-doped (Al,Ga)As/GaAs FETs with high transconductance and electron velocity

High-performance normally-off and normally-on field-effect transistors have been fabricated from modulation-doped (Al,Ga)As/GaAs heterostructures grown by molecular-beam epitaxy. At 300 K, transconductances of 210 and 240 mS/mm were obtained, respectively, for normally-off and normally-on transistors with a 1 μm gate length. The mode of operation was determined by the depth to which the gate was recessed into the doped (Al,Ga)As. Although the total (Al,Ga)As thickness between the gate and the conduction path in the GaAs is greater for normally-on devices, larger transconductances were obtained. This is a direct result of the smaller source resistance in the normally-on device. Using a model developed particularly for modulation-doped transistors, electron saturation velocities of about 1.7×107 cm/s are inferred. These velocities and the transconductance values are the largest reported to date.