The automotive electronics market is facing increasingly demanding reliability requirements, along with restrictive European and international environmental legislations targeting the elimination of lead-based materials in electronics packages. As a result, pressure-less Ag-sinter adhesives have been identified as one of the most mature lead-free bonding materials, with thermal and electrical performances comparable or superior to lead-tin alloys, as well as reliability performances compliant with automotive mission profiles. Simultaneously, there is a clear trend towards using thinner dice (<200 µm) in the semiconductor packaging industry for automotive applications, driven primarily by the demand for devices with higher electrical performance. This poses a challenge for the use of pressure-less adhesives, as they have a natural tendency to climb up the vertical sides of the die, potentially causing adhesive to flow over the die surface and resulting in short circuits or yield loss during subsequent IC assembly process steps. Currently, one of the most established processes for controlling the rise of adhesive on the vertical sides of thin dice is 2D screen printing (also known as stencil printing). This process involves selectively printing a complete pattern of adhesive material onto a substrate, onto which the die can then be placed without the need to forcibly spread the pressure-less adhesive to achieve full die backside coverage. However, this process is associated with significant material wastage and is only applicable to flat substrates. The aim of this paper is to introduce an innovative dispensing strategy for thin dice, which dispenses the adhesive in a spiral pattern shape. This technique can be applied to both flat (2D) and non-flat (3D or downset) substrates and minimizes material waste by utilizing a standard time-pressure dispensing system. The paper provides an overview of the concept and the underlying dispensing strategy developed by Besi, as well as an example of its application for die thicknesses down to 110um and 3D substrates in some power packages manufactured by STMicroelectronics. Process capability is validated, and package reliability is demonstrated up to MSL3 + 1000 thermal cycles through scanning acoustic microscopy.
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