N-type Silicon Wafers Research Articles

Bulk defect formation under light soaking in seed-end n-type Czochralski silicon wafers – Effect on silicon heterojunction solar cells

We report on a degradation of the electronic properties of uncompensated seed-end n-type (phosphorus-doped) Czochralski silicon wafers under light soaking. We unambiguously demonstrate that this degradation is related to the formation and/or activation of a bulk defect under illumination. We bring general information about its activation/formation (illumination intensities, spatial distribution) as well as deactivation features. We show that this defect can be permanently suppressed in a few seconds at high temperatures (850°C). Conversely annealing at low temperature (200°C) was found to lead only to a temporary deactivation, the defect being reactivated/reformed after subsequent illumination. As a consequence, this defect could be harmful to solar cell technologies processed at low temperature, such as amorphous/crystalline silicon heterojunction (SHJ). The impact of the defect on SHJ cells performances is experimentally assessed at device level. Eventually the possible nature of the defect is discussed in the light of all collected data.

Interface states study of intrinsic amorphous silicon for crystalline silicon surface passivation in HIT solar cell**Project supported by the National Natural Science Foundation of China (Grant Nos. 51361022 and 61574072) and the Postdoctoral Science Foundation of Jiangxi Province, China (Grant No. 2015KY12).

Intrinsic hydrogenated amorphous silicon (a-Si:H) film is deposited on n-type crystalline silicon (c-Si) wafer by hot-wire chemical vapor deposition (HWCVD) to analyze the amorphous/crystalline heterointerface passivation properties. The minority carrier lifetime of symmetric heterostructure is measured by using Sinton Consulting WCT-120 lifetime tester system, and a simple method of determining the interface state density from lifetime measurement is proposed. The interface state density measurement is also performed by using deep-level transient spectroscopy (DLTS) to prove the validity of the simple method. The microstructures and hydrogen bonding configurations of a-Si:H films with different hydrogen dilutions are investigated by using spectroscopic ellipsometry (SE) and Fourier transform infrared spectroscopy (FTIR) respectively. Lower values of interface state density are obtained by using a-Si:H film with more uniform, compact microstructures and fewer bulk defects on crystalline silicon deposited by HWCVD.

Gaining Hands-On Experience with Solid-State Photovoltaics through Constructing a Novel n-Si/CuS Solar Cell

A solid-state p–n junction photovoltaic cell can be fabricated in a common chemistry lab. It is prepared by coating a p-type copper sulfide film on an n-type silicon wafer via a simple chemical bath deposition method. The resulting p–n junction shows an obvious photovoltaic effect. This activity offers students an opportunity to gain hands-on experience with the technology of solid-state solar cells.

Controlling the c-Si/a-Si:H interface in silicon heterojunction solar cells fabricated by HWCVD

This paper deals with the engineering of the hetero-interface between intrinsic amorphous silicon (i-a-Si:H) layer and the n-type crystalline silicon (c-Si) wafer during the fabrication of the Silicon Heterojunction (SHJ) solar cell by the Hot Wire Chemical Vapor Deposition technique. It is known that this interface and the associated surface passivation of the c-Si is key to obtaining high efficiency heterojunction solar cells. The monitoring of this interface was carried out using high-resolution transmission electron microscopy (HRTEM). The HRTEM data of the c-Si/a-Si:H interface reveals a drastic dependence on the filament temperature (Tf) used during the deposition of the i-a-Si:H layer. Detailed analysis of the solar cell characteristics indicates that the cells where one has an abrupt crystalline/amorphous interface shows higher conversion efficiency compared to those where we have a rough and a defective interface or where there are indications of local epitaxy in the a-Si:H layer. The second parameter which was engineered is the bulk defect density of the intrinsic a-Si:H layer. Though the thickness of i-a-Si:H layer in case of SHJ solar cells is only around 5nm and serves the purpose of passivating the dangling bonds on the c-Si wafer, the bulk defect density of this layer cannot be ignored. We have achieved a-Si:H films with acceptable bulk defect density without dilution of the silane gas with hydrogen. The bulk defect density of the i-a-Si:H layer has been determined by the constant photocurrent method (CPM) and is correlated to the performance of SHJ solar cells. A direct consequence of these control parameters was observed in the improvement of the external quantum efficiency near 600nm wavelength region.

Effects of perfluoroalkylsilane molecular assembly on flow induced voltage generated by doped silicon wafers

We report the effects of surface modifications on (i) Seebeck coefficients and (ii) flow induced voltage generations of the n-type (n-Si) and p-type (p-Si) silicon wafers. The surfaces of n-Si and p-Si wafers were coated with 1H,1H,2H,2H- perfluorooctyltrichlorosilane (FOTS) molecules. The surface modified n-Si and p-Si of size 12 mm×4 mm were mounted on the π/4 angle inclined experimental mount, and nitrogen gas was flown over the inclined surface at the subsonic velocities, 5.3, 10.61, 15.91, 21.22, and 26.52 ms−1, and the voltage difference between the lead and rear ends of pristine and surface modified n-Si and p-Si was measured. The experimental results and theoretical relations are presented. The flow induced voltage generation is caused by the interplay between the Bernoulli flow and Seebeck effect. The flow-voltage response results show that the half coated and full coated n-Si and p-Si wafers generate more voltage than that of the uncoated at a given velocity. The band theory reveals that the flow of nitrogen gas accumulates charge carriers at the FOTS self assembled monolayer (SAM)—silicon interfaces, which resulted in the more voltage generation by full and half coated ni-Si and p-Si surfaces than that of the pristine surface. The enhanced voltage generations and high sensitivities are caused by an effective increase of the gradient of Fermi Energy (EF) (Seebeck coefficient) due to FOTS SAM coatings. Because of that the FOTS SAM modified n-Si and p-Si are become highly sensitive to nitrogen gas flow.

A piezoresistive micro-accelerometer with high frequency response and low transverse effect

With the purpose of measuring vibration signals in high-speed machinery, this paper developed a piezoresistive micro-accelerometer with multi-beam structure by combining four tiny sensing beams with four suspension beams. The eight-beam (EB) structure was designed to improve the trade-off between the sensitivity and the natural frequency of piezoresistive accelerometer. Besides, the piezoresistor configuration in the sensing beams reduces the cross interference from the undesirable direction significantly. The natural frequency of the structure and the stress on the sensing beams are theoretically calculated, and then verified through finite element method (FEM). The proposed sensor is fabricated on the n-type single crystal silicon wafer and packaged for experiment. The results demonstrate that the developed device possesses a suitable characteristic in sensitivity, natural frequency and transverse effect, which allows its usage in the measuring high frequency vibration signals.

Morphological and optical properties of n-type porous silicon: effect of etching current density

Morphological and optical properties of porous silicon (PS) layer fabricated on n-type silicon wafer have been reported in the present article. Method of PS fabrication is by photo-assisted electrochemical etching with different etching current densities (J). Porosity and PS layer thickness, obtained by the gravimetric method, increase with increasing J. Pore morphology observed by FESEM shows the presence of randomly distributed pores with mostly spherical shape. Calculated pore size is also seen to increase with increasing value of J. XRD gives the characteristic amorphous peak of PS along with some peaks corresponding to crystalline silicon (c-Si). Calculated crystallite size shows decreasing trend with increasing J value. The optical properties of these samples have been investigated by UV–visible reflectance, Raman spectroscopy and photoluminescence (PL) spectra. Reflectance measurement shows blue-shift of the spectrum with increased reflectivity for increasing J. Raman spectra show remarkable blue-shift with respect to the c-Si peak. PL spectra give the luminescence energy in the orange–red region of the visible spectrum and little change with variation of J.

SiO2 passivation layer grown by liquid phase deposition for silicon solar cell application

Surface passivation is one of the primary requirements for high efficient silicon solar cells. Though the current existed passivation techniques are effective, expensive equipments are required. In this paper, a comprehensive understanding of the SiO2 passivation layer grown by liquid phase deposition (LPD) was presented, which was cost-effective and very simple. It was found that the post-annealing process could significantly enhance the passivation effect of the LPD SiO2 film. Besides, it was revealed that both chemical passivation and field-effect passivation mechanisms played important roles in outstanding passivation effect of the LPD SiO2 film through analyzing the minority carrier lifetime and the surface recombination velocity of n-type and p-type silicon wafers. Although the deposition parameters had little influence on the passivation effect, they affected the deposition rate. Therefore, appropriate deposition parameters should be carefully chosen based on the compromise of the deposition rate and fabrication cost. By utilizing the LPD SiO2 film as surface passivation layer, a 19.5%-efficient silicon solar cell on a large-scale wafer (156 mm × 156 mm) was fabricated.

High-quality industrial n-type silicon wafers with an efficiency of over 23% for Si heterojunction solar cells

n-type CZ-Si wafers featuring longer minority carrier lifetime and higher tolerance of certain metal contamination can offer one of the best Si-based solar cells. In this study, Si heterojuction (SHJ) solar cells which was fabricated with different wafers in the top, middle and tail positions of the ingot, exhibited a stable high efficiency of > 22% in spite of the various profiles of the resistivity and lifetime, which demonstrated the high material utilization of n-type ingot. In addition, for effectively converting the sunlight into electrical power, the pyramid size, pyramid density and roughness of surface of the Cz-Si wafer were investigated by scanning electron microscope (SEM) and transmission electron microscope (TEM). Furthermore, the dependence of SHJ solar cell open-circuit voltage on the surface topography was discussed, which indicated that the uniformity of surface pyramid helps to improve the open-circuit voltage and conversion efficiency. Moreover, the simulation revealed that the highest efficiency of the SHJ solar cell could be achieved by the wafer with a thickness of 100 μm. Fortunately, over 23% of the conversion efficiency of the SHJ solar cell with a wafer thickness of 100 μm was obtained based on the systematic optimization of cell fabrication process in the pilot production line. Evidently, the large availability of both n-type ingot and thinner wafer strongly supported the lower cost fabrication of high efficiency SHJ solar cell.

Junction Formation With HWCVD and TCAD Model of an Epitaxial Back-Contact Solar Cell

In this paper, we present morphological and electrical characteristics of a junction formed of Si p-type films deposited on an n-type silicon wafer using a hot wire chemical vapor deposition (HWCVD) tool. We describe the fabrication process and study the influence of diborane flow and postprocess annealing in improving junction characteristics. Our morphological studies undertaken using atomic force microscopy show that the initial deposition suffered from voids rather than being a uniform film; however, this improves significantly under our annealing treatment. The improvement in morphology was observed in the electrical characteristics, with estimated $V_{\text{oc}}$ doubling and rectification of the junction improving by several orders of magnitude. Fitting of the current–voltage curves to a two-diode model showed that increasing the diborane flow in the process helps reduce the saturation current and ideality factors, while increasing the shunt resistance. Electrochemical capacitance–voltage (ECV) and quasi-steady-state photoconductance measurements are used to characterize the deposited films further. A solar cell device with a silicon epitaxy emitter is modeled using industry-standard 3-D modeling tools and input parameters from experimental data, and the impact of defects is studied. A potential efficiency approaching 25% is shown to be feasible for an optimized device.

Kerfless Epitaxial Mono Crystalline Si Wafers With Built-In Junction and From Reused Substrates for High-Efficiency PERx Cells

This paper proposes a kerfless wafer structure with built-in p-n junctions in n-type silicon wafers grown using Crystal Solar's high throughput epitaxy technology. Compared with a conventional p-type emitter by boron diffusion, ion implantation, or epitaxy, the built-in p-type emitter has a reduced and uniform doping concentration and increased thickness. The epitaxially grown wafers and conventional Czochralski (CZ) n-type wafers were processed into solar cells. A best efficiency of 22.5% with epitaxially grown wafers was achieved, with a 6 mV gain in open-circuit voltage, suggesting a high wafer quality and superiority of the deep epitaxial emitter over a standard boron-diffused emitter. Substrate reuse associated with the kerfless epitaxy technology is studied as well, with respect to its impact on solar cell efficiency. The data suggest no degradation in cell efficiency due to substrate reuse.

IGZO Thin-Film Light-Addressable Potentiometric Sensor

An In–Ga–Zn oxide (IGZO) layer is applied, for the first time, as the semiconductor layer of a light-addressable potentiometric sensor (LAPS). The IGZO layer sputtered on the commercial ITO/glass substrate could be used as the active layer of an LAPS illuminated by a ultraviolet light-emitting diode (UV LED). In the operation of LAPS, an IGZO/ITO glass substrate with a higher photocurrent and less interference of the ambient light compared with a conventional n-type silicon wafer is obtained. A sensing membrane of sputtered niobium oxide directly on the IGZO layer, with a substrate temperature of 250 °C, is verified to have a pH sensitivity of 61.8 mV/pH according to photocurrent versus gate bias curves measured in various pH buffer solutions. The ac signal applied to the UV LED can be increased to 30 kHz for IGZO LAPS pH sensing. This improvement is beneficial for the sensor’s use in high-speed 2-D chemical image applications.

NIR spectrometer using a Schottky photodetector enhanced by grating-based SPR.

We present a near-infrared (NIR) spectrum measurement method using a Schottky photodetector enhanced by surface plasmon resonance (SPR). An Au grating was fabricated on an n-type silicon wafer to form a Schottky barrier and act as an SPR coupler. The resulting photodetector provides wavelength-selective photodetection depending on the SPR coupling angle. A matrix was pre-calculated to describe this characteristic. The spectrum was obtained from this matrix and the measured photocurrents at various SPR coupling angles. Light with single and multiple wavelengths was tested. Comparative measurements showed that our method is able to detect spectra with a wavelength resolution comparable to that of a commercial spectrometer.

Disordered wall arrays by photo-assisted electrochemical etching in n-type silicon**Project supported by the National Special Foundation of China for Major Science Instrument (No. 61227802), the National Natural Science Foundation of China (No. 61405120), the National Program on Key Basic Research Project (No. 2012CB825802), and the China Postdoctoral Science Foundation (No. 2014M552224).

The fabrication of ordered, high aspect-ratio microstructures in silicon by use of photo-assisted electrochemical etching is an important technology, where voltage and current density are significant factors. In this paper, disordered walls appear in 5-inch n-type silicon wafers when a large current density is used. Based on the theory of space charge region, these disordered walls are caused by the contradiction between the protection from dissolution by a high applied voltage and the dissolution by a high current density. To verify this point, wall arrays were fabricated at different applied voltages and current densities. Moreover, the critical voltage was kept constant and different current densities were applied to obtain conditions for avoiding disordered walls and achieving uniform wall arrays. Finally, a wall array with a period of 5.6 μm and a depth of 55 μm was achieved at an applied voltage of 3 V and a monotonically increasing current density ranging from 22.9 to 24.5 mA/cm2.

Design of a Piezoelectric Accelerometer with High Sensitivity and Low Transverse Effect.

In order to meet the requirements of cable fault detection, a new structure of piezoelectric accelerometer was designed and analyzed in detail. The structure was composed of a seismic mass, two sensitive beams, and two added beams. Then, simulations including the maximum stress, natural frequency, and output voltage were carried out. Moreover, comparisons with traditional structures of piezoelectric accelerometer were made. To verify which vibration mode is the dominant one on the acceleration and the space between the mass and glass, mode analysis and deflection analysis were carried out. Fabricated on an n-type single crystal silicon wafer, the sensor chips were wire-bonged to printed circuit boards (PCBs) and simply packaged for experiments. Finally, a vibration test was conducted. The results show that the proposed piezoelectric accelerometer has high sensitivity, low resonance frequency, and low transverse effect.

An Improved Methodology for Extracting the Interface Defect Density of Passivated Silicon Solar Cells

The interface properties of the dielectric layer passivated silicon wafers can be characterized by capacitance–voltage, surface photovoltage, or contactless corona–voltage measurements. Conventionally, U-shaped interface defect density distributions ${D_{{\rm{it}}}}{\rm{(}}E{\rm{)}}$ are reported. However, in this study, the reported interface defect density toward the silicon conduction or valence band edges is proven to be an artefact, or at least strongly overestimated. This stems from the fact that the formula used for ${D_{{\rm{it}}}}$ extraction is valid only at very low temperatures, whereas measurements are typically performed at ∼300 K. We propose an improved methodology for ${D_{{\rm{it}}}}{\rm{(}}E{\rm{)}}$ extraction, which can self-consistently reproduce the raw data of contactless corona–voltage measurements. Applying this advanced methodology, the interfaces of several dielectric layers passivated n-type Czochralski-grown silicon wafers are investigated. In addition, the extracted ${D_{{\rm{it}}}}{\rm{(}}E{\rm{) }}$ distributions of these samples are then used to analyze their effective carrier lifetime performance.

Toward 21% Efficiency nPERT Solar Cells with Selective Back Surface Field Technique

We have demonstrated 20.83% large-area conversion efficiency with selective Back Surface Field(s-BSF) on the n-type Passivated Emitter, Rear Totally (nPERT) cell structure. Industrial 156 mm (6” inch) n-type Czochralski mono-crystalline silicon wafers were used as substrates. In this kind of cell, we employed a single-side texture on the boron emitter side. We use AlOX and SiNX dielectric stack as ARC and passivation. The unique point is on the cell's rear side, we use the phosphorous ion implantation to form the Back Surface Field (BSF). Due to the flexible on the implant process, we can choose different implant mask pattern to form the heavy doping region to achieve the selective Back Surface Field(s-BSF) structure. Finally we use the industrial screen printing technique to form the metal contact. The front (boron) side is printed with Ag/Al paste and the rear (phosphorous) side is with two printing steps; at the first step, we use high solid content and firing-through silver paste to form the contact on the heavy doping region, and second, we use the low solid content and non-firing through silver paste to connect all the metal contact formed on the first step. Finally, we use the fast firing furnace to co-fire the sample. The champion batch shows average values of 650mV open circuit voltage and 40.1 A/mm2 short circuit current density and 79.7% on the fill factor, and 20.71% efficiency.

Influence of the Dopant Penetration Depth on the Solar Cell Performance of n-type Interdigitated Back Contact Silicon Solar Cells

In this report a 2D modeling of n-type interdigitated back contact (IBC) crystalline silicon (c-Si) solar cell structures is presented for two different types of the BSF and emitter junctions: homojunction cells (referred as IBC-HOMO) and cells combining a homojunction and a heterojunction with hydrogenated amorphous silicon (a-Si:H), also called “hybrid” cells (referred as hybrid IBC). Both structures were analyzed and in particular we studied the effect of doping (peak concentration and penetration depth of the dopants) on the solar cell performances. For doping levels in the range 1018-1020 cm–3 relatively large dopant penetration depth (>100 nm) demonstrates better solar cell performance in contrary to very shallow penetration depths (10 nm). The best solar cell performance (25.6% conversion efficiency, 740 mV open circuit voltage, 41 mA/cm2 short circuit current and 84.2% fill factor) were found for hybrid IBC structures involving a BSF heterojunction and a highly doped emitter homojunction (NE = 1021 cm–3) with a dopant penetration depth of 10 nm in the case of n-type silicon wafer with a thickness of 100 μm. The implementation of defects at the c-Si/a-Si:H interface in the range (1-5)×1011 cm–2 shows that hybrid cells with BSF heterojunctions are more affected than the structures with emitter heterojunctions. However, solar cell efficiencies of 25% can be simulated for hybrid cells if the width of the BSF is reduced with respect to the emitter and combined with highly doped homojunctions and shallow dopant penetration depths.

On the nature of striations in n-type silicon solar cells

In n-type Czochralski silicon (Cz-Si) wafer, swirl shaped regions with low lifetime (known as striations) can cause degradation up to 1% absolute or even more in homojunction industrial solar cells. Nevertheless, the nature of the defects responsible for the occurrence of these striations is still unclear. In this work, n-type Cz-Si solar cell precursors cut from industrial size ingots with different feedstock quality and oxygen content were analyzed by microwave photo-conductance decay and photoluminescence in order to investigate the nature of such defects. The results demonstrate that the defects responsible for the occurrence of striations are oxide nanoprecipitates formed during the high temperature steps for the solar cell realization, due to the presence of grown-in oxygen nuclei.

PEDOT:PSS as an Alternative Hole Selective Contact for ITO-Free Hybrid Crystalline Silicon Solar Cell

Organic–inorganic hybrid solar cells were fabricated by spin coating of conductive polymer poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS) as hole selective contact upon textured n-type crystalline silicon wafers. Two different PEDOT:PSS commercial products (Clevios HTL Solar and PH1000) were compared, enhancing their conductivity and wettability by addition of dimethyl sulfoxide cosolvent and Capstone FS-31 surfactant. Transmission line measurements (TLM) revealed that the sheet resistance of the PEDOT:PSS layer was comparable with that of conventional Indium–Tin oxide (ITO) electrodes, allowing its use as a conductive transparent layer in an ITO-free solar cell. Quasi-steady-state photoconductance measurements revealed an implied open-circuit voltage of 644 mV for HTL Solar, which is equivalent to a saturation current density of 255 fA/cm 2. In general, the performance of HTL Solar was better than PH1000, exhibiting power conversion efficiency (1 × 1 cm2 cell area) of 11.6%, as compared with 8.5%.