Abstract

The interface properties of the dielectric layer passivated silicon wafers can be characterized by capacitance–voltage, surface photovoltage, or contactless corona–voltage measurements. Conventionally, U-shaped interface defect density distributions ${D_{{\rm{it}}}}{\rm{(}}E{\rm{)}}$ are reported. However, in this study, the reported interface defect density toward the silicon conduction or valence band edges is proven to be an artefact, or at least strongly overestimated. This stems from the fact that the formula used for ${D_{{\rm{it}}}}$ extraction is valid only at very low temperatures, whereas measurements are typically performed at ∼300 K. We propose an improved methodology for ${D_{{\rm{it}}}}{\rm{(}}E{\rm{)}}$ extraction, which can self-consistently reproduce the raw data of contactless corona–voltage measurements. Applying this advanced methodology, the interfaces of several dielectric layers passivated n-type Czochralski-grown silicon wafers are investigated. In addition, the extracted ${D_{{\rm{it}}}}{\rm{(}}E{\rm{) }}$ distributions of these samples are then used to analyze their effective carrier lifetime performance.

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