Multi-valued Logic Systems Research Articles

Band structure effects on resonant tunneling in III-V quantum wells versus two-dimensional vertical heterostructures

Since the invention of the Esaki diode, resonant tunneling devices have been of interest for applications including multi-valued logic and communication systems. These devices are characterized by the presence of negative differential resistance in the current-voltage characteristic, resulting from lateral momentum conservation during the tunneling process. While a large amount of research has focused on III-V material systems, such as the GaAs/AlGaAs system, for resonant tunneling devices, poor device performance and device-to-device variability have limited widespread adoption. Recently, the symmetric field-effect transistor (symFET) was proposed as a resonant tunneling device incorporating symmetric 2-D materials, such as transition metal dichalcogenides (TMDs), separated by an interlayer barrier, such as hexagonal boron-nitride. The achievable peak-to-valley ratio for TMD symFETs has been predicted to be higher than has been observed for III-V resonant tunneling devices. This work examines the effect that band structure differences between III-V devices and TMDs has on device performance. It is shown that tunneling between the quantized subbands in III-V devices increases the valley current and decreases device performance, while the interlayer barrier height has a negligible impact on performance for barrier heights greater than approximately 0.5 eV.

Design of Low Power MAX Operator for Multi-valued Logic System

Abstract A voltage-mode three transistor based MAX circuit for implementation of multi-valued logic (MVL) system is proposed in this paper. The proposed MAX operates at very low power consumption ranging in micro watts. To evaluate MAX performance, a NOR gate realization is done and compared to standard CMOS NOR gate. The HSpice simulation result confirms the MAX based NOR gate to operate with minimal delay at low power level. The simulations have been performed on 180 nm technology.

Electropolymerized films as a molecular platform for volatile memory devices with two near-infrared outputs and long retention time

Surface-confined molecular logic gates have great potential as memory devices. We present in this article the uses of electropolymerized films as a molecular platform for volatile memory devices. A vinyl-substituted cyclometalated ruthenium–amine hybridized compound has been polymerized by reductive electropolymerization. The resulting polymeric films display two well-defined redox processes at +0.32 and +0.68 V vs. Ag/AgCl, leading to three well-separated redox states. Characterizations of these films by XPS and TEM techniques are presented. The singly- and doubly-oxidized states of the film possess intense absorption at 1070 and 700 nm, respectively. These polymeric films exhibit promising three-stage near-infrared electrochromism and the best contrast ratios (ΔT%) of 52% at 1070 nm and 76% at 700 nm have been achieved. The colors of the film at three redox stages are purple, brown, and sky blue, respectively. The electrochromism is featured by a long retention time at all three stages (infinity at −0.20 V, 4 h at +0.55 V, and 30 min at +1.05 V, respectively). The singly- and doubly-oxidized states of a film about 10 nm thick have been used to build a surface-confined Set/Reset flip-flop memory with two electrochemical inputs and two near-infrared optical outputs. By using another intermediate state between the singly- and doubly-oxidized states a multi-valued logic system has been demonstrated.

Trinary arithmetic and logic unit (TALU) using savart plate and spatial light modulator (SLM) suitable for optical computation in multivalued logic

Arithmetic logic unit (ALU) is the most important unit in any computing system. Optical computing is becoming popular day-by-day because of its ultrahigh processing speed and huge data handling capability. Obviously for the fast processing we need the optical TALU compatible with the multivalued logic. In this regard we are communicating the trinary arithmetic and logic unit (TALU) in modified trinary number (MTN) system, which is suitable for the optical computation and other applications in multivalued logic system. Here the savart plate and spatial light modulator (SLM) based optoelectronic circuits have been used to exploit the optical tree architecture (OTA) in optical interconnection network.

Designing of Polarization Encoded All-Optical Ternary Multiplexer and Demultiplexer

The advantages of Multi-valued logic (MVL) systems and circuits have drawn a significant interest as a coming generation technology that can be viewed as an alternative approach to solve many problems in transmission, storage and processing of large amount of information in digital signal processing. The paper presents an all-optical circuit for designing ternary (three-valued) multiplexer & demultiplexer with the help of polarization encoded basic ternary logic gates (ternary min and ternary delta literal). It focuses on recent patents / publications in relevant field and future scope of works in the fascinating field of optical multi-valued logic. Keywords: Optical logic, nonlinear optics, optical multi-valued logic, polarization, ternary multiplexer/demultiplexer, Multiplexer, Demultiplexer, Quantum Electronics, Solid-State circuits, optical processors, spatial light modulator, Terahertz Optical Asymmetric Demultiplexer, broadband communications, digital signals, digital communication system

Analytical approach of developing the expression of output of all-optical frequency encoded different logical units and a way-out to implement the logic gates

To implement different all optical logic operations, encoding/decoding of optical signal is a very important issue. Since now there are so many types of optical signal encoding and decoding techniques have been adopted, such as intensity encoding, polarization encoding, phase encoding, symbolic substitution technique etc. All these existing techniques have their own limitations. In this context one may mention the frequency encoding/decoding technique. The basic inherent advantage of frequency encoding technique over all other existing techniques is that as the frequency of a signal is the fundamental character of it, it always preserves its identity throughout the communication of the signal, irrespective of reflection, refraction attenuation etc. Again, different optical signal has different distinct frequency which may be encoded as a distinct state of a logic system to represent the information. Adopting this technique it is possible to implement binary logic system as well as higher order logic system such as tristate logic, quaternary logic system etc. The major advantages of multivalued logic system over Boolean logic system are that in multivalued logic system the states of information is very more and as result information storage capacity is high. Again in multivalued logic system carry free and borrow free operation can be implemented which is less time consuming and therefore speed of operation is very fast. We have already developed methods of implementation of different all-optical frequency encoded logic as well as different optical processor. In this communication we propose an analytical approach to develop the expression of the outputs of frequency encoded different binary logic expression in terms of input frequencies from the stand point of basic laws of reflection, transmission and frequency conversion property of optical devices and of course mention the way-out to implement these logic operations.

Trinary registers and counters using savart plate and spatial light modulator for optical computation in multivalued logic

Registers and counters are the most important devices in any system of computations. In this paper we have communicated the trinary registers and counters in modified trinary number (MTN) system. It is suitable for the optical computing and other applications in multivalued logic system. Here the savart plate and spatial light modulator (SLM) based optoelectronic circuits have been used to exploit the optical tree architecture (OTA) in optical interconnection network.

Noise-based logic hyperspace with the superposition of [formula omitted] states in a single wire

In the introductory paper [L.B. Kish, Phys. Lett. A 373 (2009) 911], about noise-based logic, we showed how simple superpositions of single logic basis vectors can be achieved in a single wire. The superposition components were the N orthogonal logic basis vectors. Supposing that the different logic values have “on/off” states only, the resultant discrete superposition state represents a single number with N bit accuracy in a single wire, where N is the number of orthogonal logic vectors in the base. In the present Letter, we show that the logic hyperspace (product) vectors defined in the introductory paper can be generalized to provide the discrete superposition of 2 N orthogonal system states. This is equivalent to a multi-valued logic system with 2 2 N logic values per wire. This is a similar situation to quantum informatics with N qubits, and hence we introduce the notion of noise-bit. This system has major differences compared to quantum informatics. The noise-based logic system is deterministic and each superposition element is instantly accessible with the high digital accuracy, via a real hardware parallelism, without decoherence and error correction, and without the requirement of repeating the logic operation many times to extract the probabilistic information. Moreover, the states in noise-based logic do not have to be normalized, and non-unitary operations can also be used. As an example, we introduce a string search algorithm which is O ( M ) times faster than Grover's quantum algorithm (where M is the number of string entries), while it has the same hardware complexity class as the quantum algorithm.

Polarization encoded all-optical quaternary R–S flip-flop using binary latch

The developments of different multi-valued logic (MVL) systems have received considerable interests in recent years all over the world. In electronics, efforts have already been made to incorporate multi-valued system in logic and arithmetic data processing. But, very little efforts have been given in realization of MVL with optics. In this paper we present novel designs of certain all-optical circuits that can be used for realizing multi-valued logic functions. Polarization encoded all-optical quaternary (4-valued) R–S flip-flop is proposed and described. Two key circuits (all-optical encoder/decoder and a binary latch) are designed first. They are used to realize quaternary flip-flop in all-optical domain. Here the different quaternary logical states are represented by different polarized state of light. Terahertz Optical Asymmetric Demultiplexer (TOAD) based interferometric switch can take an important role. Computer simulation result confirming described methods and conclusion are given in this paper.

Agonistic screams and the classification of dominance relationships: are monkeys fuzzy logicians?

Scream vocalizations of group-living rhesus macaques provoked by higher-ranking aggressors were examined in two contexts: encounters in which the rank difference between opponents was either large or small. Such vocalizations are important in eliciting support from the caller's allies in the group (usually matrilineal kin). Five acoustically distinct recruitment screams encode specific information about features of the agonistic context, for example, relative rank of the opponent and the severity of the attack. Against higher-ranking opponents, noisy screams are most likely to be given during encounters that involve contact aggression, and tonal or undulated screams are most likely for non-contact aggression. We predicted that scream bouts directed to small rank difference opponents would be more likely to comprise calls from scream classes other than the expected type, and that scream bouts from large rank difference encounters would be more in accord with the expected class. For large rank difference bouts, on average 74.2% of calls were of the expected class; for small rank difference bouts, a significantly smaller per cent (53.8%) of calls was accurately predicted. In the large rank difference encounters, 65.6% (55/84) of bouts were composed entirely of expected scream types, but only 47.6% (39/82) were uniformly correct for small rank difference encounters. Large rank difference interactions also yielded significantly fewer bouts where none of the screams produced by the victim of attack belonged to the predicted class. We suggest that a multi-valued or fuzzy logic system, that is one with more than two truth values, might be a more realistic way to conceptualize the categorization of certain referents of monkey vocalizat.

Sidewall gated double well quasi-one-dimensional resonant tunneling transistors

We present gating characteristics of submicron vertical resonant tunneling transistors in double quantum well heterostructures. Current–voltage characteristics at room temperature and 77 K for devices with minimum feature widths of 0.9 and 0.7 μm are presented and discussed. The evolution of the I–V characteristics with increasing negative gate biases is related to the change in the lateral confinement, with a transition from a large area 2D to a quasi-1D. Even gating of multiple wells and lateral confinement effects observable at 77 K make these devices ideally suited for applications in multi-valued logic systems and low-dimensional structures.

A Boolean complementary fuzzy logic system

This article relates to a Boolean complementary fuzzy logic system which is a multivalued (continuous valued) logic system. This system differs from conventional fuzzy logic systems in that it satisfies complementary laws on a Boolean lattice. In this article, after defining a Boolean complementary fuzzy system, tautologies are introduced and differences between the Boolean complementary fuzzy logic system and conventional fuzzy logic systems in inference computation are illustrated. © 1997 Scripta Technica, Inc. Syst Comp Jpn, 28(8): 68–73, 1997

Evidence theory in multivalued logic systems

A systematical framework of uncertainty reasoning is proposed based on multivalued logic and Dempster-Shafer's evidence, theory. the uncertainty of the truth value of a proposition is modeled by the use of basic probability assignment over the truth value space [0,1]. This basic probability assignment is interpreted as the probability restriction on the truth value of a proposition. A general approach is provided to find the probability restriction on the truth value of a composite proposition given the probability restrictions on the truth values of its components. Two inference patterns (forward inference pattern and backward inference pattern) are investigated in terms of propagation of probability restrictions. Examples are given to show that the results from applying the proposed theory are consistent with human intuitions. © 1995 John Wiley & Sons, Inc.

Fundamental properties of multivalued kleenean functions

In the real world, there are many propositions which cannot be determined to be true or false. In order to treat such propositions, multivalued logic systems which are permitted to take more than true (1) or false (0) values have been developed. In this paper, we will describe fundamental properties of multivalued Kleenean functions, which are effective for treating ambiguity. First, we will introduce a partial order relation into the set of truth values {0, 1/(m - 1), …, (m - 2)/(m - 1), 1}. It will be shown that any multivalued Kleenean function is monotone for this partial order relation. Next, it will be shown that any multivalued Kleenean function can be determined uniquely for inputs {0, 1/2, 1} only. Finally, we will describe P-type logic functions for multivalued Kleenean functions which are capable of correcting input failures.

Transparent logic modeling in VHDL

Modeling conventions and VHDL (VHSIC hardware description language) library techniques for transparently mapping between multivalued logic systems without modifying the model itself is described. Using these conventions and the VHDL library system, designers can choose any logic system compatible with the models and use if for simulation. Also described are some of the requirements the multivalued logic systems must satisfy. >

Charge-coupled device implementation of multivalued logic systems

A survey of recent developments in the implementation of multivalued logic circuits using charge-coupled device technology is presented. A set of basic logic gate structures which is suitable for synthesis of both binary and multivalued functions is defined. Techniques for synthesis of one- and two-variable functions is considered in detail. A special case of threshold functions is emphasised. Finally, realisation of multivalued functions in terms of programmable logic arrays is described.

Inference in a multivalued logic system

A definition for the logical inference of one proposition based upon the assertion of some premise propositions in multivalued logics is introduced. Some of the properties of this definition are investigated. It is shown that it is a generalization of the concept of inference in binary logic.

CMOS integrated circuits for multivalued logic

ABSTRACT The use of CMOS integrated circuits in the design of multivalued logic systems is extended. Circuit design of basic quaternary operators (inverters, NAND, NOR, cycling and inverse cycling gates) is presented. These basic quaternary operators can be used as building blocks in four-valued digital systems. The extension of these circuits to implement five-valued systems is also discussed.

Boolean vector algebraic structures: properties and applications to digital logic simulation

Boolean algebra is the basic mathematic used in the analysis and synthesis of binary systems. Technological advances have led to an increasing interest in multivalued logic systems where more than two logical values are used. In the application of multivalued logic, each logical value could often be represented by a Boolean vector, ie a vector with binary components (0 or 1). Therefore, it is quite important to have a thorough understanding of properties embedded in the algebraic structures using Boolean vectors as basic operands. This gives the motivation for this study. Boolean vector operations are introduced and two major modes associated with the complement are characterized. Then we define a Boolean vector E-algebra and its major features are given. Finally, some applications are discussed and illustrated.

Iterative Realization of Multivalued Logic Systems

The realization of multivalued combinational functions and sequential machines by using arrays of one type of cells is considered. The algebra used for the multivalued logic system has two binary operations and a set of unary operations. Each of these operations is realized by a cellular array. The cells are combinational and implemented by using binary logic gates. The cells are also designed so that all unrestricted multiple faults in arrays of these cells are detectable. Multivalued combinational functions, storage elements, and sequential machines are realized by interconnecting the arrays realizing the operations.