Mixed-criticality Systems Research Articles

Energy aware algorithm based on actual utilization for periodic tasks in mixed-criticality real-time systems

Many real-time applications with different criticalities are integrated into a single mixed-criticality (MC) real-time system. Previous studies on MC systems assume that all tasks are executed in their worst case execution time and ignore the energy consumption in the high-criticality mode. In this paper, we focus on the actual execution time of tasks and consider the energy consumption in both the low-criticality mode and the high-criticality mode. First, we present a novel algorithm called EAU, which applies the actual execution time to re-compute the utilization of the task when a job is completed early or is released. In addition, it can apply the slack time generated from the early completion jobs and the jobs for which the processor speed is lower than the maximum processor speed in the high-criticality mode. Secondly, we analyze the scheduling feasibility of EAU. Finally, experiments are conducted to evaluate the performance of the proposed algorithm. The experimental results show that EAU can save up to 46.84% of energy compared with existing algorithms.

Flexible Mixed-Criticality Scheduling with Dynamic Slack Management

Mixed-criticality (MC) system has attracted a lot of research attention in the past few years for its resource efficiency. Recent work attempted to provide a new MC model, the so-called Flexible Mixed-Criticality (FMC) task model, to relax the pessimistic assumptions in classic MC scheduling. However, in FMC, the behavior of MC tasks is still analyzed in offline stage. The run-time behavior such as dynamic slack has not yet been studied in FMC scheduling framework. In this paper, we present a utilization-based slack scheduling framework for FMC tasks. In particular, we monitor task execution on run time and collect dynamic slacks generated by task early completion. And these slacks can then be used either by high-criticality tasks to reduce mode-switches, or by low-criticality tasks so that less suspensions are triggered with more execution time, and thus quality of service is improved. We evaluate our approach with extensive simulations, and experiment results demonstrate the effectiveness of the proposed approaches.

ATMP-CA: Optimising Mixed-Criticality Systems Considering Criticality Arithmetic

Many safety-critical systems use criticality arithmetic, an informal practice of implementing a higher-criticality function by combining several lower-criticality redundant components or tasks. This lowers the cost of development, but existing mixed-criticality schedulers may act incorrectly as they lack the knowledge that the lower-criticality tasks are operating together to implement a single higher-criticality function. In this paper, we propose a solution to this problem by presenting a mixed-criticality mid-term scheduler that considers where criticality arithmetic is used in the system. As this scheduler, which we term ATMP-CA, is a mid-term scheduler, it changes the configuration of the system when needed based on the recent history of deadline misses. We present the results from a series of experiments that show that ATMP-CA’s operation provides a smoother degradation of service compared with reference schedulers that do not consider the use of criticality arithmetic.

Toward the Design of Fault-Tolerance-Aware and Peak-Power-Aware Multicore Mixed-Criticality Systems

Mixed-Criticality (MC) systems have recently been devised to address the requirements of real-time systems in industrial applications, where the system runs tasks with different criticality levels on a single platform. In some workloads, a high-critically task might overrun and overload the system, or a fault can occur during the execution. However, these systems must be fault-tolerant and guarantee the correct execution of all high-criticality tasks by their deadlines to avoid catastrophic consequences, in any situation. Furthermore, in these MC systems, the peak power consumption of the system may increase, especially in an overload situation and exceed the processor Thermal Design Power (TDP) constraint. This may cause generating heat beyond the cooling capacity, resulting the system stop to avoid excessive heat and halting the processor. In this paper, we propose a technique for dependent dual-criticality tasks in fault-tolerant multi-core MC systems to manage peak power consumption and temperature. The technique develops a tree of possible task mapping and scheduling at design-time to cover all possible scenarios and reduce the low-criticality task drop rate in the high-criticality mode. At run-time, the system exploits the tree to select a proper schedule according to fault occurrences and criticality mode changes. Experimental results show that the average task schedulability is 74.14% on average for the proposed method, while the peak power consumption and maximum temperature are improved by 16.65% and 14.9 C on average, respectively, compared to a recent work. In addition, for a real-life application, our method reduces the peak power and maximum temperature by up to 20.06% and 5 C, respectively, compared to a state-of-the-art approach.

A genetic simulation strategy: Application to single-fault analysis of TTEthernet synchronization protocol

Improper timing has severe safety repercussions in modern vehicles due to the use of mixed-criticality systems. Human lives and increased material costs might be at stake due to faulty configuration or incorrect startup of the timing subsystem. TTEthernet is a communication infrastructure that enables combined use of distributed applications with mixed-criticality requirements over a single physical network. TTEthernet provides a fault-tolerant, self-stabilizing synchronization that establishes a temporal partitioning and ensures isolation of high and low criticality dataflows. The cornerstone of robust synchronization is the cold start under faulty nodes since it is performed once before establishing the timing schedule. We propose a genetic simulation strategy applied to the single-fault analysis of TTEthernet synchronization protocol. Simulation measurements demonstrate the effectiveness of our approach and reveal the worst-case startup time of the TTEthernet network under a single-fault hypothesis. Furthermore, we reveal that the median of the worst-case startup time is almost 500 times larger than the integration cycle duration. Finally, we argue that our algorithm has further application in the analysis of TTEthernet synchronization, like multiple fault scenarios and generalization to a more complex multi-hop TTEthernet topologies.

Efficient runtime slack management for EDF-VD-based mixed-criticality scheduling

Mixed-criticality system is an emerging design paradigm to improve the resource-efficiency for real-time embedded system. However, the traditional mixed-criticality system is commonly designed under pessimistic constraints on overrun handling and slack utilization. These solutions cannot provide efficient resource utilization when considering the dynamic behaviors of MC system. In this paper, we present an efficient slack management framework to improve the resource efficiency of mixed-criticality system. In this framework, the overrun can be handled in a demand-aware manner, and the dynamic slack is further integrated to improve resource efficiency. The low-criticality dropping is improved in a multiple-step manner to avoid sharp degradation. Random simulation and a case study are conducted to show that our framework outperforms the state-of-the-art resource management approaches.

REALISM: Reliability-aware energy management in multi-level mixed-criticality systems with service level degradation

Mixed-criticality embedded systems, as the next-generation of safety-critical systems, are increasingly employed in the industry due to consolidating functionalities with varying criticality levels onto the same computing platform. Technology scaling, battery-supplied design, and heavy computation in mixed-criticality systems necessitate employing energy management techniques. Due to the degrading effects of these techniques on the system's reliability, minimizing energy consumption and meeting tasks’ timing constraints without sacrificing the reliability requirement is a vital challenge in designing mixed-criticality systems. In this paper, we propose REALISM; a novel Reliability- and Energy-Aware task mapping and scheduling approach in multi-core mixed-criticality systems with three levels of criticality. To guarantee the desired QoS of tasks from lower levels of criticality, our approach exploits the degraded WCET for these imprecise mixed-criticality tasks in critical modes. In design time, tasks are mapped to cores based on dynamic switching between different system utilizations in different modes. In each core, task instances are scheduled according to their virtual deadlines, which are calculated based on the system's overrun tolerance limit (TL) and the desired QoS, by time reservation. Then our heuristic DVFS techniques are applied in order to reduce system energy consumption. Our simulation results show that the REALISM provides on average ~41.5% (up to 52.7%) energy savings compared to the approach without energy management with 100% QoS degradation in lower levels of criticality. Also, with guaranteeing the system's desired QoS, REALISM provides on average ~38% (up to 46.2%) energy savings compared to the approach without energy management.

Schedulability of probabilistic mixed-criticality systems

Mixed-criticality systems often need to fulfill safety standards that dictate different requirements for each criticality level, for example given in the ‘probability of failure per hour’ format. A recent trend suggests designing this kind of systems by jointly scheduling tasks of different criticality levels on a shared platform. When this is done, the usual assumption is that tasks of lower criticality are degraded when a higher criticality task needs more resources, for example when it overruns a bound on its execution time. However, a way to quantify the impact this degradation has on the overall system is not well understood. Meanwhile, to improve schedulability and to avoid over-provisioning of resources due to overly pessimistic worst-case execution time estimates of higher criticality tasks, a new paradigm emerged where task’s execution times are modeled with random variables. In this paper, we analyze a system with probabilistic execution times, and propose metrics that are inspired by safety standards. Among these metrics are the probability of deadline miss per hour, the expected time before degradation happens, and the duration of the degradation. We argue that these quantities provide a holistic view of the system’s operation and schedulability.

Reliability-Aware Resource Management in Multi-/Many-Core Systems: A Perspective Paper

With the advancement of technology scaling, multi/many-core platforms are getting more attention in embedded systems due to the ever-increasing performance requirements and power efficiency. This feature size scaling, along with architectural innovations, has dramatically exacerbated the rate of manufacturing defects and physical fault-rates. As a result, in addition to providing high parallelism, such hardware platforms have introduced increasing unreliability into the system. Such systems need to be well designed to ensure long-term and application-specific reliability, especially in mixed-criticality systems, where incorrect execution of applications may cause catastrophic consequences. However, the optimal allocation of applications/tasks on multi/many-core platforms is an increasingly complex problem. Therefore, reliability-aware resource management is crucial while ensuring the application-specific Quality-of-Service (QoS) requirements and optimizing other system-level performance goals. This article presents a survey of recent works that focus on reliability-aware resource management in multi-/many-core systems. We first present an overview of reliability in electronic systems, associated fault models and the various system models used in related research. Then, we present recent published articles primarily focusing on aspects such as application-specific reliability optimization, mixed-criticality awareness, and hardware resource heterogeneity. To underscore the techniques’ differences, we classify them based on the design space exploration. In the end, we briefly discuss the upcoming trends and open challenges within the domain of reliability-aware resource management for future research.

Mixed-Criticality Scheduling Upon Permitted Failure Probability and Dynamic Priority

Many safety-critical real-time systems are considered certified when they meet failure probability requirements with respect to the maximum permitted incidences of failure per hour. In this article, the mixed-criticality task model with multiple worst case execution time (WCET) estimations is extended to incorporate such system-level certification restrictions. A new parameter is added to each task, characterizing the distribution of WCET estimations—the likelihood of all jobs of a task finishing their executions within the less pessimistic WCET estimates. Efficient algorithms are derived for scheduling mixed-criticality systems represented using this model for both uniprocessor and multiprocessor platforms for independent tasks. Furthermore, a 0/1 covariance matrix is introduced to represent the failure dependency between tasks. An efficient algorithm is proposed to schedule such failure-dependent tasks. Experimental analyses show our new model and algorithm outperform current state-of-the-art mixed-criticality scheduling algorithms.

Research on semi-partitioned scheduling algorithm in mixed-criticality system

In order to overcome the problem that in a mixed-critical system, once the critical level of the system changes, lower-critical tasks may be abandoned in order to ensure the schedulability of higher-critical tasks. A semi-partitioned scheduling algorithm SPBRC, which is based on a homogeneous multi-processor mixed-criticality platform and integrates the advantages and disadvantages of global scheduling and partitioned scheduling is proposed. First-fit and worst-fit bin-packing algorithms are firstly used in this method to sort high and low critical tasks separately, all high critical tasks as fixed task allocation in different processors in turns, and then distribute the lower-critical tasks. When the criticality of processor changes, lower-cirtical tasks will be allowed to migrate to the processor that is paired with the processor and is in low-critical mode, rather than abandoned. Thus, the overall performance of the system is improved. The simulation experiment verifies the effectiveness of this method in reducing the task loss rate and job loss rate.

PVMC: Task Mapping and Scheduling under Process Variation Heterogeneity in Mixed-Criticality Systems

Embedded systems have migrated from special-purpose hardware to commodity hardware. These systems have also tended to Mixed-Criticality (MC) implementations, executing applications of different criticalities upon a shared platform. Multi-core processors, which are commonly used to design MC systems, bring out new challenges due to the process variations. Power and frequency asymmetry affects the predictability of embedded systems. In this work, variation-aware techniques are explored to not only improve the reliability of MC systems, but also aid the scheduling and energy saving of them. We leverage the core-to-core (C2C) variations to protect high-criticality tasks and provide full service for a high percentage of low-criticality tasks. We formulate a constrained Integer Linear Program (ILP) and propose an optimization heuristic for task mapping and scheduling under Process Variation in Mixed-Criticality systems (PVMC). Our proposed techniques also guarantee timing, reliability, and Thermal Design Power (TDP) constraints by considering the impact of task mapping in variation-affected platforms on system reliability and peak power consumption. Experiments demonstrate that our ILP framework and PVMC algorithm can greatly improve the schedulability and the overall Quality-of-Service (QoS), and provide energy saving up to 27.1% under different quantities of process variation compared with a state-of-the-art algorithm.

A First Look at RISC-V Virtualization from an Embedded Systems Perspective

This article describes the first public implementation and evaluation of the latest version of the RISC-V hypervisor extension (H-extension v0.6.1) specification in a Rocket chip core. To perform a meaningful evaluation for modern multi-core embedded and mixedcriticality systems, we have ported Bao, an open-source static partitioning hypervisor, to RISC-V. We have also extended the RISC-V platformlevel interrupt controller (PLIC) to enable direct guest interrupt injection with low and deterministic latency and we have enhanced the timer infrastructure to avoid trap and emulation overheads. Experiments were carried out in FireSim, a cycle-accurate, FPGA-accelerated simulator, and the system was also successfully deployed and tested in a Zynq UltraScale+ MPSoC ZCU104. Our hardware implementation was opensourced and is currently in use by the RISC-V community towards the ratification of the H-extension specification.

Tolerating Permanent Faults with Low-Energy Overhead in Multicore Mixed-Criticality Systems

Due to the battery-operated nature of embedded Mixed-Criticality Systems, simultaneous energy and reliability management is a cru-cial issue in designing these systems. We propose two comprehensive schemes, MC-2S and MC-4S, which tolerate permanent faults through exploiting the inherent redundancy of multicore systems for applying standby-sparing technique and maintaining the system re-liability against transient faults with low energy overhead. In these schemes, two copies of each high-criticality task are scheduled on different cores to guarantee their timeliness in case of permanent fault occurrence. In order to guarantee the quality of service of low-criticality tasks, in the MC-2S scheme, sufficient slack time is reserved to schedule a backup task for each low criticality task on an al-ternative core. The MC-4S scheme exploits semi-partitioned scheduling in which low-criticality tasks migrate to other cores in case of permanent fault or overrun occurrence on one of the cores. We also develop a Demand Bound Function schedulability analysis to guar-antee the timeliness, and propose a preference-oriented scheduling algorithm along with reliability-aware DVFS method for energy saving. The proposed schemes provide up to 57% (39% on average) energy saving, and enhance the acceptance ratio of the system significantly in comparison to other state-of-the-art methods.

A Smart Semipartitioned Real‐Time Scheduling Strategy for Mixed‐Criticality Systems in 6G‐Based Edge Computing

With the rapid growth of 6G communication and smart sensor technology, the Internet of Things (IoT) has attracted much attention now. In the 6G‐based IoT applications on the multiprocessor platform, the partitioned scheduling has been widely applied. However, these partitioned scheduling approaches could cause system resource waste and uneven workload among processors. In this paper, a smart semipartitioned scheduling strategy (SSPS) was proposed for mixed‐criticality systems (MCS) in 6G‐based edge computing. Besides tasks’ acceptance rate and weighted schedulability, QoS is considered in SSPS to improve the service quality of the system. The SSPS allocates tasks into each processor, and some tasks can migrate to other processors as soon as possible. By comparing with the several existing algorithms, the experimental results show that the SSPS achieves the best in the schedulability and QoS of the system.

Response time analysis of multiframe mixed-criticality systems with arbitrary deadlines

The well-known model of Vestal aims to avoid excessive pessimism in the quantification of the processing requirements of mixed-criticality systems, while still guaranteeing the timeliness of higher-criticality functions. This can bring important savings in system costs, and indirectly help meet size, weight and power constraints. This efficiency is promoted via the use of multiple worst-case execution time (WCET) estimates for the same task, with each such estimate characterized by a confidence associated with a different criticality level. However, even this approach can be very pessimistic when the WCET of successive instances of the same task can vary greatly according to a known pattern, as in MP3 and MPEG codecs or the processing of ADVB video streams. In this paper, we present a schedulability analysis for the new multiframe mixed-criticality model, which allows tasks to have multiple, periodically repeating, WCETs in the same mode of operation. Our work extends both the analysis techniques for Static Mixed-Criticality scheduling (SMC) and Adaptive Mixed-Criticality scheduling (AMC), on one hand, and the schedulability analysis for multiframe task systems on the other. A constrained-deadline model is initially targeted, and then extended to the more general, but also more complex, arbitrary-deadline scenario. The corresponding optimal priority assignment for our schedulability analysis is also identified. Our proposed worst-case response time (WCRT) analysis for multiframe mixed-criticality systems is considerably less pessimistic than applying the static and adaptive mixed-criticality scheduling tests oblivious to the WCET variation patterns. Experimental evaluation with synthetic task sets demonstrates up to 20% and 31.4% higher scheduling success ratio (in absolute terms) for constrained-deadline analyses and arbitrary-deadline analyses, respectively, when compared to the best of their corresponding frame-oblivious tests.

Power-Aware Runtime Scheduler for Mixed-Criticality Systems on Multicore Platform

In modern multi-core Mixed-Criticality (MC) systems, a rise in peak power consumption due to parallel execution of tasks with maximum frequency, specially in the overload situation, may lead to thermal issues, which may affect the reliability and timeliness of MC systems. Therefore, managing peak power consumption has become imperative in multi-core MC systems. In this regard, we propose an online peak power and thermal management heuristic for multi-core MC systems. This heuristic reduces the peak power consumption of the system as much as possible during runtime by exploiting dynamic slack and per-cluster Dynamic Voltage and Frequency Scaling (DVFS). Specifically, our approach examines multiple tasks ahead to determine the most appropriate one for slack assignment, that has the most impact on the system peak power and temperature. However, changing the frequency and selecting a proper task for slack assignment and a proper core for task re-mapping at runtime can be time-consuming and may cause deadline violation which is not admissible for high-criticality tasks. Therefore, we analyze and then optimize our run-time scheduler and evaluate it for various platforms. The proposed approach is experimentally validated on the ODROID-XU3 (DVFS-enabled heterogeneous multi-core platform) with various embedded real-time benchmarks. Results show that our heuristic achieves up to 5.25% reduction in system peak power and 20.33\% reduction in maximum temperature compared to an existing method while meeting deadline constraints in different criticality modes.

Dynamic Memory Bandwidth Allocation for Real-Time GPU-Based SoC Platforms

Heterogeneous SoC platforms, comprising both general purpose CPUs and accelerators, such as a GPU, are becoming increasingly attractive for real-time and mixed-criticality systems to cope with the computational demand of data parallel applications. However, contention for access to shared main memory can lead to significant performance degradation on both CPU and GPU. Existing work has shown that memory bandwidth throttling is effective in protecting real-time applications from memory-intensive, best-effort (BE) ones; however, due to the inherent pessimism involved in worst-case execution time (WCET) estimation, such approaches can unduly restrict the bandwidth available to BE applications. In this article, we propose a novel memory bandwidth allocation scheme where we dynamically monitor the progress of a real-time application and increase the bandwidth share of BE ones whenever it is safe to do so. Specifically, we demonstrate our approach by protecting a real-time GPU kernel from BE CPU tasks. Based on profiling information, we first build a WCET estimation model for the GPU kernel. Using such model, we then show how to dynamically recompute on-line the maximum memory budget that can be allocated to BE tasks without exceeding the kernel’s assigned execution budget. We implement our proposed technique on NVIDIA embedded SoC and demonstrate its effectiveness on a variety of GPU and CPU benchmarks.

A Flattened-Priority Framework for Mixed-Criticality Systems

The ever-increasing integrated services in industrial control systems lead to diverse performance objectives and multiple traffic characteristics. Such systems are called mixed-criticality systems (MCSs). Priority-based scheduling is a commonly used mechanism to achieve differential QoS in MCS. While MCSs have supported prioritization as a standard feature, traditional priority-based schedulers incur significant complexity, especially due to the widespread adoption of mixed-criticality applications in embedded systems. It is desirable to lower the complexity of MCSs under the limited computing resource of smart devices. This article presents a novel technique to design resource-efficient priority schedulers for MCSs. We propose a flattened-priority framework to transform an unprioritized scheduler into a priority-based one. The framework works iteratively based on feedback loops. For P priorities, the transformed scheduler converges in P iterations in the worst case. With the proposed framework, the design of priority schedulers is simplified into the design of nonpriority schedulers. Such a simplification dramatically lowers the design effort and system complexity. A case study was performed on an FPGA-based Industrial Ethernet switch that is a typical MCS. Compared with the previous priority schedulers, the transformed priority scheduler by the proposed framework achieves a 30%-50% reduction in the resource usage of lookup tables without performance loss of forwarding delay.

Towards Fully Jitterless Applications: Periodic Scheduling in Multiprocessor MCSs Using a Table-Driven Approach

In mixed criticality systems (MCSs), the time-triggered scheduling approach focuses on a special case of safety-critical embedded applications which run in a time-triggered environment. Sometimes, for these types of MCSs, perfectly periodical (i.e., jitterless) scheduling for certain critical tasks is needed. In this paper, we propose FENP_MC (Fixed Execution Non-Preemptive Mixed Criticality), a real-time, table-driven, non-preemptive scheduling method specifically adapted to mixed criticality systems which guarantees jitterless execution in a mixed criticality time-triggered environment. We also provide a multiprocessor version, namely, P_FENP_MC (Partitioned Fixed Execution Non-Preemptive Mixed Criticality), using a partitioning heuristic. Feasibility tests are proposed for both uniprocessor and homogenous multiprocessor systems. An analysis of the algorithm performance is presented in terms of success ratio and scheduling jitter by comparing it against a time-triggered and an event-driven method in a non-preemptive context.