MIS Capacitors Research Articles

Influence of Contact Metallisation on the High Temperature Characteristics of High-κ Dielectrics

In this work SiC-based MIS capacitors have been fabricated with different contact/high-k dielectric combinations and the temperature dependence of the characteristics have been examined in an N2 ambient at temperatures between 323K and 673K. The structures utilise either a Pt or Pd catalytic gate contact and a TiO2 or HfO2 high-k dielectric, all of which are grown on a thin SiO2 layer, thermally grown on the Si face of a 4H SiC epitaxial layer. The MIS capacitors have been studied in an N2 ambient between 323K and 673K and observations show that VFB reduces with increasing temperature. The majority of this variation is caused a reduction in the Dit influencing the structures electrical characteristics, due to a shift in the semiconductors bulk potential, which is due to the lower VTH of SiC-based MOSFETs at high temperatures.

Control of Interfacial Reaction of HfO<sub>2</sub>/Ge Structure by Insertion of Ta Oxide Layer

As means to control interface reactions between HfO2 and Ge(100), chemical vapor deposition (CVD) of ultrathin Ta-rich oxide using Tri (tert-butoxy) (tert-butylimido) tantalum (Ta-TTT) on chemically-cleaned Ge(100) has been conducted prior to atomic-layer controlled CVD of HfO2 using tetrakis (ethylmethylamino) hafnium (TEMA-Hf) and O3. The XPS analysis of chemical bonding features of the samples after the post deposition N2 annealing at 300°C confirms the formation of TaGexOy and the suppression of the interfacial GeO2 layer growth. The energy band structure of HfO2/TaGexOy/Ge was determined by the combination of the energy bandgaps of HfO2 and TaGexOy measured from energy loss signals of O 1s photoelectrons and from optical absorption spectra and the valence band offsets at each interface measured from valence band spectra. From the capacitance-voltage (C-V) curves of Pt-gate MIS capacitors with different HfO2 thicknesses, the thickness reduction of TaGexOy with a relative dielectric constant of 9 is a key to obtain an equivalent SiO2 thickness (EOT) below 0.7nm.

Fabrication of Three-Dimensional MIS Nano-Capacitor Based on Nanoimprinted Single Crystal Silicon Nanowire Arrays

We report fabrication of single crystalline silicon nanowire based-three-dimensional MIS nano-capacitors for potential analog and mixed signal applications. The array of nanowires is patterned by Step and Flash Imprint Lithography (S-FIL). Deep silicon etching (DSE) is used to form the nanowires with high aspect ratio, increase the electrode area and thus significantly enhance the capacitance. High-! dielectric is deposited by highly conformal atomic layer deposition (ALD) Al2O3 over the Si nanowires, and sputtered metal TaN serves as the electrode. Electrical measurements of fabricated capacitors show the expected increase of capacitance with greater nanowire height and decreasing dielectric thickness, consistent with calculations. Leakage current and time-dependent dielectric breakdown (TDDB) are also measured and compared with planar MIS capacitors. In view of greater interest in 3D transistor architectures, such as FinFETs, 3D high density MIS capacitors offer an attractive device technology for analog and mixed signal applications.

High Temperature Reliability of High-<i>k</i>/SiC MIS Hydrogen Sensors

In this work a Pt/HfO2/SiO2/SiC MIS capacitor is exposed in air at 400°C for 1000 hours, with its oxide capacitance, flatband voltage and density of interface traps being measured at various time intervals. After the structure has been shown to operate reliably for extensive periods of time at 400°C, the C-V characteristics of a device from the same fabrication batch are measured at 300°C in different concentrations of H2 and examined for sensitivity. The results demonstrate that gas sensitive MIS capacitors incorporating high-ĸ dielectrics, have the potential to operate at extreme temperatures for long periods of time. This makes them suitable for deployment in hostile conditions, where regular servicing may not be possible.

Improvement on Interface Quality and Reliability Properties of HfAlOx MIS Capacitor with Dual Plasma Treatment

HfO2 is considered a promising gate dielectric material for sub-45 nm CMOS technology. It has been reported that incorporate Al into HfO2 forming Hf aluminates in order to increase the crystallization temperature. However, the growth of the low-k interfacial layer at high-k/Si interface during high-k dielectric deposition would result in reliability degradation. Recently, incorporating nitrogen into HfAlOx gate dielectrics has beneficial effect on reliability performance. In addition, fluorine incorporation into high-k dielectrics also could have several improvements. In this study, dual plasma (CF4 pre-treatment and N2 post-treatment) was performed on HfAlOx MIS capacitor in order to improve interface quality and the reliability properties. According to our experimental results, dual plasma treatment could improve interface quality and enhance reliability properties of HfAlOx thin films.

Ge-Doped Hafnia-Based Dielectrics for Non-Volatile Memory Applications

Fully high-k based non-volatile memory structures were fabricated by RF magnetron sputtering technique. The pure HfO2 and HfSiO materials were used as tunnel and/or control layers, whereas HfGeO ones were used as a charge storage node. The capacitance-voltage measurements of HfO2/HfGeO/HfO2 and HfSiO/HfGeO/HfSiO stacks were performed to study the charge trapping characteristics of these structures. The memory effect was observed in both types of MIS capacitors and the optimal annealing treatment was found to be at 610°C for 15 minutes. A memory window of ~7 V at a sweeping voltage of ± 14 V has been achieved, indicating the potential use of these stack structures for non-volatile memory devices.

Electrical Improvement of MIS Capacitor with HfAlOx Gate Dielectrics Treated by Dual Plasma Treatment

not Available.

SiC-based MIS gas sensor for high water vapor environments

Abstract In this work we will prove that SiC-based MIS capacitors can work in environments with extremely high concentrations of water vapor and still be sensitive to hydrogen, CO and hydrocarbons, making these devices suitable for monitoring the exhaust gases of hydrogen or hydrocarbons based fuel cells. Under the harshest conditions (45% of water vapor by volume ratio to nitrogen), Pt/TaOx/SiO2/SiC MIS capacitors are able to detect the presence of 1 ppm of hydrogen, 2 ppm of CO, 100 ppm of ethane or 20 ppm of ethene, concentrations that are far below the legal permissible exposure limits.

Electrical and physical properties of HfO2 as gate dielectrics using various thickness of TaN electrodes for MIS capacitors

MIS capacitors with 16-nm high-k dielectric HfO2 and 50-150nm TaN electrode were studied after post-metal-annealing (PMA) at various conditions. The effect of TaN thickness on electrical and physical properties is summarized. It has been found that the thermal stability of the TaN/HfO2 depends on TaN thickness. A reduction of leakage current and an increase of breakdown voltage were obtained with 50-nm TaN after PMA at 500^oC. The interface quality and the time-dependent dielectric breakdown (TDDB) characteristics were also improved. On the other hand, degradation after PMA was observed in HfO2 capped with 100-nm and 150-nm TaN.

Investigation into the charge-carrier generation processes in MIS structures with lead borosilicate glass-based dielectrics

The generation properties of the silicon — lead-borosilicate glass interface are studied by the method of pulsed MIS capacitor. It was shown that surface generation current nomonotonicly depends on temperature. This nomonotonic dependence may be the result of tunnel and tunnel activated current from traps states in lead-borosilicate glasses localized close to the silicon-glass interface which contributes to the total surface generation current and becomes dominant as the temperature is lowered.

Properties of a Ni-FUSI gate formed by the EBV method and one-step RTA

Nickel fully silicided (Ni-FUSI) gate material has been fabricated on a HfO2 surface to form a Ni-FUSI gate/HfO2/Si/Al (MIS) structure by using an ultra-high vacuum e-beam evaporation (EBV) method followed by a one step rapid thermal annealing (RTA) treatment. X-ray diffraction (XRD) and Raman spectroscopy were used to reveal the microstructures and electrical properties of the MIS structure. Results show that a one step post RTA treatment is enough to promote the full reaction of nickel silicide, compared with multiple RTA treatments. Furthermore, the HfO2 gate dielectric film is sensitive to heat treatment, and multiple RTA treatments can damage the electrical properties of the HfO2 film rather than improve them. By optimization of the sample fabrication technique, the MIS capacitor produces good high-frequency capacitance-voltage curves with a hysteresis of 30 mV, a work function of about 5.44–5.53 eV and leakage current density of only 1.45 × 10−8 A/cm2 at −1 V gate bias.

Improvement on Interface Quality and Reliability Properties of HfAlOx MIS Capacitor with Dual Plasma Treatment

not Available.

High-k GaAs metal insulator semiconductor capacitors passivated by ex-situ plasma-enhanced atomic layer deposited AlN for Fermi-level unpinning

This paper examines the utilization of plasma-enhanced atomic layer deposition grown AlN in the fabrication of a high-k insulator layer on GaAs. It is shown that high-k GaAs MIS capacitors with an unpinned Fermi level can be fabricated utilizing a thin ex-situ deposited AlN passivation layer. The illumination and temperature induced changes in the inversion side capacitance, and the maximum band bending of 1.2 eV indicates that the MIS capacitor reaches inversion. Removal of surface oxide is not required in contrast to many common ex-situ approaches.

Influence of Sputter Deposition Time on the Growth of c-Axis Oriented AlN/Si Thin Films for Microelectronic Application

Aluminum Nitride films were grown on and Si (100) substrate by D.C. reactive magnetron sputtering at room temperature. Influence of sputter deposition time on properties of the AlN films was studied. Structural optical and electrical properties of the film were investigated. XRD measurements showed the presence of hexagonal wurtzite structure. The optical reflectance spectra of the film were taken and the band gap calculated varied from 4.35 to 5.3 eV. Finally MIS capacitors were fabricated on silicon substrates and variation of dielectric parameter with deposition time was reported.

Impact of firing on surface passivation of p-Si by SiO2/Al and SiO2/SiNx/Al stacks

Firing impacts on surface passivation provided by a SiO2 and SiO2/SiNx stack with evaporated Al films are studied by capacitance-based techniques on MIS capacitors. For devices with insulator layers consisting solely of as-deposited SiO2, the densities of either interface states (Dit) or fixed charges (Qfc) are hardly influenced by firing. Capping the SiO2 layer with a SiNx layer results in a shift of the peak activation energy of Dit toward the valence band (Ev) of Si. Firing this SiO2/SiNx stack leads to an increase of Qfc, a reduction of Dit, and a moderate shift of peak activation energy of Dit toward Ev. Co-firing with the Al film on top significantly reduces the Qfc, Dit, and Dit peak activation energy, which is resulting from the atomic hydrogen passivation. These results are of particular interest for the development of solar cells with rear surface passivation and local contacts.

Electron Irradiation Effects on Atomic Layer Deposited High-k Gate Dielectrics

Electron radiation effects on the electrical properties of Al2O3 and HfO2-based MIS capacitors have been studied. High-k dielectrics were grown by atomic layer deposition, and capacitors were exposed to three different electron radiation doses. Capacitance-voltage, deep-level transient spectroscopy, conductance transients, flat-band voltage transients and current-voltage techniques were used to characterize the samples. In all cases, positive charge is trapped in the dielectrics after irradiation. Insulator/semiconductor interface quality can be improved for low irradiation doses. However, for high doses interface quality worsens. Irradiation always degrades the dielectric layers in terms of gate leakage current.

Influence of magneto-electric coefficient for magnetic and electric charge injection properties in magneto-electric MIS capacitors

We investigated the electric charge injection properties of a floating-gate type metal-insulator Si capacitor having different-ME gate insulators. The samples showed charge-injection type behaviour in capacitance-voltage curves, and it was revealed that the amount of injected charges can be controlled by the application of an external magnetic field. The sample having a high-ME-coefficient gate insulator showed stepwise capacitance-voltage curves unlike the normal one. These results indicate that this capacitor, which employs a magnetic gate insulator, has the potential to be used in multilevel memory by the application of an external magnetic field.

A Novel MONOS Memory With High-$\kappa$ HfLaON as Charge-Storage Layer

MIS capacitors with a high-κ HfLaON or HfLaO gate dielectric are fabricated by using a reactive sputtering method to investigate the applicability of the films as a novel charge-storage layer in a metal-oxide-nitride-oxide-silicon nonvolatile memory device. Experimental results indicate that the MIS capacitor with a HfLaON gate dielectric exhibits a large memory window, high program/erase speed, excellent endurance property, and reasonable retention. The involved mechanisms for these promising characteristics with HfLaON are thought to be in part from nitrogen incorporation leading to higher density of traps with deeper levels and, thus, higher trapping efficiency, stronger Hf-N and La-N bonds, and more stable atomic structure and HfLaON-SiO2 interface, as compared to the HfLaO dielectric.

Effect of Al gate on the electrical behaviour of Al-doped Ta2O5 stacks

The electrical behaviour of Al-doped Ta2O5 films on nitrided silicon and implemented in Al-gated MIS capacitors has been studied. The dopant was introduced into the Ta2O5 through its surface by deposing a thin Al layer on the top of Ta2O5 followed by an annealing process. The HRTEM images reveal that the initial double-layer structure of the stacks composed of doped Ta2O5 and interfacial SiON layer undergoes changes during the formation of the Al gate and transforms into a three-layer structure with an additional layer between the Al electrode and the doped Ta2O5. This layer, being a result of reaction between the Al gate and the Al-doped Ta2O5, affects the overall electrical properties of the stacks. Strong charge trapping/detrapping processes have been established in the vicinity of the doped Ta2O5/SiON interface resulting in a large C–V hysteresis effect. The charge trapping also influences the current conduction in the layers keeping the current density level rather low even at high electric fields (J < 10−6 A cm−2 at 7 MV cm−1). By employing a three-layer model of the stack, the permittivity of both, the Al-doped Ta2O5 and the additional layer, has been estimated and the corresponding conduction mechanisms identified.

Quantitative Discussion on Electron-Hole Universal Tunnel Mass in Ultrathin Dielectric of Oxide and Oxide-Nitride

MOS and MIS capacitor has been extensively studied in past several decades by many authors. It has been expected to reveal how basic physics relate electron device operation. In this structure, several physical phenomena co-work and then exhibit the electrical properties measured in IV- and CV-characteristics. On the other hand, the conventional models were established separately for the inversion layer (positive gate voltage), the depletion region (negative-low gate voltage), and the accumulation region (negative-high gate voltage). In addition, actual MOS/MIS samples have interfacial transition layer where physical properties are gradually changed from Si to oxide or other dielectric, the varying composition ratio of molecules and local traps owing to atomistic dangling bonds through dielectric layer. What will happen if we self-consistently unify all the physical models that are separately developed?