MIM Capacitors Research Articles

Effect of N2-Anneal Temperature on Silicon Nitride Film: (I) Time-Dependent Dielectric Breakdown and ESR Evaluations

Silicon Nitride (SiN) film has been used as insulating material in many electronic devices such as capacitors and memories . In this report, the effect of N2 anneal temperature on charge break down (Qbd) of LP-CVD SiN film was electrically evaluated using the time-dependent dielectric breakdown (TDDB) test method, and the variation and the density of defects which exist in SiN film, in the oxide layer between SiN and Si substrate, and at the surface of Si substrate, were investigated using an Electron Spin Resonance (ESR) to reveal the defect behavior related to the trigger of Qbd.SiN metal-insulator-metal (MIM) capacitors were fabricated to evaluate TDDB. A 54 nm dielectric layer of SiN film was deposited at 700 degree-C, using a mixture of dichlorosilane（SiH2Cl2）and ammonia (NH3) gasses, by a LP-CVD vertical furnace. For the lower and upper electrode, a 400 nm polycrystalline silicon films were deposited using a LP-CVD. In order to evaluate the effect of anneal temperature on SiN film breakdown frequency, these samples were annealed in nitrogen atmosphere at temperatures between 700 and 1150 degree-C for 1 hour, using a vertical furnace.Breakdown voltage was measured with a current-voltage tester (HP4071A, Hewlett Packard) for each SiN MIM capacitor. The breakdown frequency was defined as the ratio of failed capacitors to tested capacitors. For the TDDB measurements, a constant current stress of 1.33 A/cm2 was applied to the MIM capacitors with the area of 0.00375cm2, 0.0075cm2, 0.015cm2 and 0.03cm2. For each area, 100 chips were made from one wafer and measured.In Fig.1, SiN film breakdown frequency increases toward a peak at around the N2 anneal temperature of 900 degree-C, then decreases at 1000 degree-C, and at more than 1100 degree-C, the frequency increases again drastically at 1150 degree-C.SiN films for ESR study were fabricated on Si wafer in the same LP-CVD process, and annealed in nitrogen atmosphere at temperatures between 700 and 1150 degree-C for 1 hour, using a vertical furnace.The ESR measurements were performed at room temperature using an X-band spectrometer (JES-RE1X). To improve the signal-to-noise ratio of an ESR signal waveform, we set the accumulation number of magnetic-field (H) sweep about 300 times. Mn2+/ MgO hyperfine lines were used for the g marker, and spin densities were determined by using the standard of known spin content.In Fig.2, Dangling bond density at silicon interface (Pb center) has a peak at 900 degree-C, and those in SiO2 (E’ center) and SiN film (K center) increase with increasing temperature from 1000 to 1150 degree-C. The former phenomena of Pb center coincides with the peak of SiN film breakdown frequency at 900 degree-C, and the latter one of E’ center and K center coincides with the tendency of increasing Qbd frequency at more than 1000 degree-C. Figure 1

Interfacial engineering of ZrO2 metal-insulator-metal capacitor using Al2O3/TiO2 buffer layer for improved leakage properties

ABSTRACT The continuous scale-down of dynamic random-access memory (DRAM) requires shrinkage of high aspect ratio metal-insulator-metal (MIM) capacitance along with the successful suppression of its leakage current to maintain desired levels of charge storage and retention. As the dimensions of stacked insulating dielectric and metal electrodes in the MIM capacitor are currently <10 nm, interfacial mixing has a large impact on the reliability of the capacitor. This is because defects and secondary interface oxides significantly alter the physicochemical properties of MIM capacitors. The methodology required to characterize ultrathin interfaces in relation to the performance of MIM devices is highly challenging due to its physical and chemical complexities of interface between dielectric and electrode. In this study, a ZrO2-based dielectric film and its interface (with an ultrathin TiO2/Al2O3 buffer layer) are analyzed using angle-resolved X-ray photoelectron spectroscopy (ARXPS), spectroscopic ellipsometry (SE), and temperature dependent I–V analysis for a DRAM MIM capacitor. The composite dielectric layer included either Al2O3 on the bottom or Al2O3/TiO2 between the TiN electrode and ZrO2. This study suggests an effective metrology approach to characterize ultrathin MIM capacitors and the important role of interfacial stabilization using a buffer layer for the effective control of leakage current.

Application of Solution Method to Prepare High Performance Multicomponent Oxide Thin Films.

Capacitors play an increasingly important role in hybrid integrated circuits, while the MIM capacitors with high capacitance density and small thickness can meet the needs of high integration. Generally speaking, the films prepared with a single metal oxide dielectric often achieve a breakthrough in one aspect of performance, but dielectric layers are required to be improved to get better performance in leakage current, capacitance density, and transmittance simultaneously in modern electronic devices. Therefore, we optimized the performance of the dielectric layers by using multiple metal oxides. We combined zirconia, yttria, magnesium oxide, alumina, and hafnium oxide with the solution method to find the best combination of these five metal oxides. The physical properties of the multi-component films were measured by atomic force microscopy (AFM), ultraviolet-visible spectrophotometer, and other instruments. The results show that the films prepared by multi-component metal oxides have good transmittance and low roughness. The thicknesses of all films in our experiment are less than 100 nm. Then, metal–insulator–metal (MIM) devices were fabricated. In addition, we characterized the electrical properties of MIM devices. We find that multi-component oxide films can achieve good performances in several aspects. The aluminum-magnesium-yttrium-zirconium-oxide (AMYZOx) group of 0.6 M has the lowest leakage current density, which is 5.03 × 10−8 A/cm2 @ 1.0 MV/cm. The hafnium-magnesium-yttrium-zirconium-oxide (HMYZOx) group of 0.8 M has a maximum capacitance density of 208 nF/cm2. The films with a small thickness and a high capacitance density are very conducive to high integration. Therefore, we believe that multi-component films have potential in the process of dielectric layers and great application prospects in highly integrated electronic devices.

Dielectric Properties Investigation of Metal-Insulator-Metal (MIM) Capacitors.

This study presents the construction and dielectric properties investigation of atomic-layer-deposition Al2O3/TiO2/HfO2 dielectric-film-based metal–insulator–metal (MIM) capacitors. The influence of the dielectric layer material and thickness on the performance of MIM capacitors are also systematically investigated. The morphology and surface roughness of dielectric films for different materials and thicknesses are analyzed via atomic force microscopy (AFM). Among them, the 25 nm Al2O3-based dielectric capacitor exhibits superior comprehensive electrical performance, including a high capacitance density of 7.89 fF·µm−2, desirable breakdown voltage and leakage current of about 12 V and 1.4 × 10−10 A·cm−2, and quadratic voltage coefficient of 303.6 ppm·V−2. Simultaneously, the fabricated capacitor indicates desirable stability in terms of frequency and bias voltage (at 1 MHz), with the corresponding slight capacitance density variation of about 0.52 fF·µm−2 and 0.25 fF·µm−2. Furthermore, the mechanism of the variation in capacitance density and leakage current might be attributed to the Poole–Frenkel emission and charge-trapping effect of the high-k materials. All these results indicate potential applications in integrated passive devices.

Failure analysis on capacitor failures using simple circuit edit passive voltage contrast method

Capacitor is one of the most basic passive components on any integrated circuit (IC) chip, such as memory, mixed-signal, or radiofrequency (RF) devices. They can be found in either the front-end or the back-end metallization of a chip. Failure analysis (FA) on such capacitors is increasingly challenging with rising complexities in semiconductor manufacturing demands. In our previous paper, a simple circuit edit passive voltage contrast (CE-PVC) technique was introduced and applied in failure analysis. This method uses a scanning electron microscope (SEM) and a platinum deposition module that is commonly found in most FA labs SEM. CE-PVC was used to alter passive voltage contrasts (PVC) through small but reversible circuit editing. In this paper, this technique is further expanded to resolve capacitor failures in both MIM capacitors and front-end polysilicon plate capacitors. This paper successfully demonstrated and resolved three cases of capacitor related failure in both MIM and polysilicon capacitors using CE-PVC technique.

Khaya gum – a natural and eco-friendly biopolymer dielectric for low-cost organic field-effect transistors (OFETs)

Nature provides a wide range of dielectric biopolymers that can be used in electronic devices. In this work, organic field-effect transistors (OFETs) using khaya gum (KG), a natural, biodegradable biopolymer that can be directly collected from khaya senegalensis trees, as the gate dielectric are demonstrated. The fabricated bottom gate/top contact poly (3,6-di (2-thien-5-yl)-2,5-di (2-octyldodecyl)-pyrrolo [3,4-c] pyrrole-1,4-dione) thieno [3,2-b] thiophene) (DPPTTT) –(polymethylmethacrylate) (PMMA) OFETs operate at 3 V with a saturation field-effect mobility (μsat) 0.3 cm2V−1 s−1, threshold voltage (Vth) -1.3 V, subthreshold swing (SS) 450 mV/dec, and current on/off ratios (ION/OFF) larger than 3 × 103. Significantly, the gate leakage current (IG) does not exceed 10–8 A for the gate-source voltage (VGS) $$\le$$ -3 V. UV–Vis spectra analysis shows that the prepared khaya gum films exhibit low absorbance and high transparency (up to 90%) with a calculated optical band gap of about 4.3 eV. Thermal characterization shows two stages of decomposition and a glass transition at around 60 °C. Characterization of metal–insulator-metal (MIM) capacitors using khaya gum reveals that the KG-based MIM capacitors possess a relatively high capacitance per unit area (Ci) of 130 ± 3 nF/cm2 at 1 kHz. As a result, khaya gum emerges as the dielectric of choice for low voltage, transparent OFETs where environmentally friendly device manufacturing is required.

84%-Efficiency Fully Integrated Voltage Regulator for Computing Systems Enabled by 2.5-D High-Density MIM Capacitor

We present a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> -thin-profile power delivery solution including a charge pump with integrated passives. Targeting 1 W/mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> or higher power density, a 2.5-D high-density metal-insulator-metal (MIM) capacitor deposited on high aspect ratio (HAR) (up to 5) oxide studs is proposed. With approximately 25-nm-thick HfAlOx dielectric, its measured capacitance density is 25.4 nF/mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> for a capacitor size ranging from 1/16 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> to 1 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . This shows <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3.6\times $ </tex-math></inline-formula> density improvement compared with the planar MIM. Theoretically, 86 nF/mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> density@1.36-V bias can be obtained if a 10-nm dielectric is deposited. Moreover, the measured leakage current density is within 65 pA/mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> at 1-V bias (negligible for a 1 W/mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> -power delivery). For a backside (BS) power delivery, this 2.5-D MIM capacitor can be realized by only three BS metal layers. This enables the low-cost and thin-profile delivery system ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sim \!\!\mu \text{m}$ </tex-math></inline-formula> thickness), and the whole power delivery efficiency including a 1/2-ratio charge pump is <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\eta \,\,=84$ </tex-math></inline-formula> %@1 W/mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> (>5% boost in the power efficiency).

Thickness-dependent dielectric breakdown in thick amorphous SiO2 capacitors

High-voltage dielectric breakdown of thick amorphous silicon dioxide capacitors for galvanic insulation is experimentally investigated and analyzed through numerical simulations carried out with a commercial TCAD tool. Silicon oxide metal-insulator–metal capacitors are used as back-end inter-level dielectric layers in integrated circuits. The large biases such devices must sustain and the material intrinsic defectivity give rise to a leakage current which is responsible of degradation and failure. Therefore, the understanding of the degradation mechanisms of the insulator is an essential prerequisite for its safe operation. For this reason, high-voltage dielectric breakdown measurements have been performed under DC-stress conditions on thick metal-insulator–metal structures with different oxide thickness and, in order to gain insight on the role of defects on breakdown, numerical simulations have been compared to experiments.

The effect of post-deposition annealing on the chemical, structural and electrical properties of Al/ZrO2/La2O3/ZrO2/Al high-k nanolaminated MIM capacitors

The effect of post-deposition annealing on the chemical, structural and electrical properties of Al/ZrO2/La2O3/ZrO2/Al high-k nanolaminated MIM capacitors

ZrHfO2-PMMA hybrid dielectric layers for high-performance all solution-processed In2O3-based TFTs

Recently inorganic-organic hybrid materials have been quickly arisen as promising dielectric candidates for their applications in the fabrication of solution-processed metal oxide thin-film transistors (TFTs). Based on this, we demonstrate a novel mixed metal oxide hybrid dielectric layer of zirconium hafnium oxide-poly(methylmethacrylate) (ZrHfO2-PMMA) thin films were effectively delivered by simple solution-process by using a low-cost spin coating process at a low temperature of 200 °C. To distinguish the chemical bonding states between inorganic and organic phases FTIR and XPS techniques were performed. The AFM analysis showed the hybrid thin films highly dense with low RMS roughness of around 1-nm. To investigate the dielectric properties of hybrid thin films, MIM capacitor devices were fabricated by using 90-nm thick hybrid dielectric layers exhibiting remarkably low leakage current density of 4.5 × 10−9 A/cm2, capacitance density of 84.5 nF/cm2 with high dielectric constant (k) of 8.4 at 1 kHz. Further, the hybrid dielectric layer was applied as a gate dielectric for fabrication of TFTs with solution processed In2O3 as the channel layer. All solution processed In2O3 TFTs showed an excellent electrical response with electron mobility of 11.2 cm2/V. s, threshold voltage of 1.7 V, Ion/off ratio of 106, and subthreshold swing of 0.58 V/dec. Therefore, our results illustrate the high potential of low-temperature solution processed ZrHfO2-PMMA hybrid thin films for future low-cost TFT applications as gate dielectric candidate.

ВЛИЯНИЕ ТОПОЛОГИИ ОБЩЕГО ВЫВОДА НА АЧХ ИНТЕГРАЛЬНОГО СВЧ LC-ФИЛЬТРА

The paper describes the developed model of 18 GHz high-pass filter (HPF). The filter model includes models of inductors, MIM capacitors, and conductors allows for skin-effect, edge effects, substrate influence, and the influence of the substrate contacts layout. The developed model has been verified by experimental prototype of the filter, which is made in the standard process of 130 nm silicon-germanium (SiGe) BiCMOS. It has been found that the developed model has cutoff frequency, passband and stopband attenuations, and gain slope close to the experimental prototype. The recommendations of the microwave LC-filters ground conductor layout design are expressed based on developed model.

Electrical Properties of Compositional Al&amp;lt;sub&amp;gt;2&amp;lt;/sub&amp;gt;O&amp;lt;sub&amp;gt;3&amp;lt;/sub&amp;gt; Supplemented HfO&amp;lt;sub&amp;gt;2&amp;lt;/sub&amp;gt; Thin Films by Atomic Layer Deposition

With advanced research for dielectrics including capacitors in DRAMs, decoupling filters in microcircuits and insulating gates in transistors, a lot of demand for the new challenging of high-k materials in semiconductor industries has been emerged. This study explores and addresses the experimental approach for composite materials with one of the major concerns of high capacitance, and low leakage, as well as ease of integration technology. The characteristics of Al2O3 supported HfO2 (AHO) thin films for a series of different Hf ratios with Al2O3 dielectrics by atomic layer deposition demonstrated as a candidate material. A composite AHO films with the homogeneous compositions of Al and Hf atoms into the Al-Hf-O mixed oxide system could stabilize the polycrystalline structure with increasing of dielectric constant (k) and decreasing of leakage current density, as well as a higher breakdown voltage than HfO2 film on its own. 70 nm thick AHO thin films with different composition of Al and Hf contents were prepared by atomic layer deposition technique on titanium nitride (TiN) and silicon dioxide (SiO2) coated Si substrates. Photolithography and metal lift-off technique were used for the device fabrication of the metal-insulator-metal (MIM) capacitor structures. AHO films on TiN/SiO2/Si were measured by semiconductor analyzer and source/ measure system with probe station in the voltage range from -5 to 5 V with a frequency range from 10 kHz to 1 MHz were used to conduct capacitance-voltage (C-V) measurements with low/medium frequency range and current-voltage (I-V) measurements. It was found that Au/AHO/TiN/SiO2/Si MIM capacitors demonstrate a capacitance density of 1.5 - 4.5 fF/μm2 at 10 kHz, a loss tangent of 0.02 - 0.04 at 10 kHz, dielectric constant of 11.7 - 35.5 depending on the composition and a low leakage current of 1.7 × 10-9 A/cm2 at 0.5 MV/cm at room temperature. The acquired experimental results could show the possibility of compositional alloy thin films that could potentially replace or open new market for high-k challenges in semiconductor technology.

Broadband Characterization of Thin Dielectrics Using Heterolayer and Monolayer MIM Capacitors

Characterization of the complex permittivity and loss tangent of a dielectric is essential for broadband and microwave applications. Non-resonant methods are applicable over a wide frequency range. However, they can get less accurate dielectric properties than resonant methods. To overcome this limitation, in this study, a new non-resonant method is proposed to extract properties of thin dielectric accurately by measuring the reflection coefficient of two metal-insulator-metal (MIM) capacitors. First, we designed the heterolayer and monolayer MIM capacitor structures that are needed for high accuracy and broadband characterization. Second, the characterization method was formulated by analyzing the two structures by equivalent circuit modeling and verified via a 3D full&#x2013;wave electromagnetic simulation. Finally, by setting <i>HfO₂</i> and <i>Al₂O₃</i> as target dielectrics, heterolayer and monolayer capacitors were fabricated, and their reflection coefficients were measured using a vector network analyzer in the range of 0.1&#x2013;67 GHz&#x2014;a broadband range scarcely considered in prior studies on non-resonant methods. The results of applying the measurement data to the proposed method indicate that a high-accuracy characterization of the complex permittivity and loss tangent of the high-k dielectrics, <i>HfO₂</i> and <i>Al₂O₃</i>, in the broadband frequency range is achieved.

Deposit and etchback approach for ultrathin Al2O3 films with low pinhole density using atomic layer deposition and atomic layer etching

­Ultrathin Al2O3 atomic layer deposition (ALD) films with low pinhole density were fabricated using a deposit and etchback approach. This strategy was able to avoid the pinholes that originated during nonuniform nucleation of Al2O3 ALD films. In this method, an Al2O3 ALD film was deposited to a thickness greater than the desired thickness to reduce the number of pinholes and form a more continuous Al2O3 ALD film. Subsequently, the Al2O3 ALD film was etched back to a smaller thickness using thermal Al2O3 atomic layer etching (ALE). The number of pinholes in the resulting Al2O3 ALD film was measured by the percentage yield of metal-insulator-metal (MIM) capacitors based on an Ag/Al2O3/Al structure that did not have an electrical short. The device yield was improved using the deposition and etchback approach. For example, using device areas of 0.01 mm2, Al2O3 ALD films that were grown to 5 nm in the MIM capacitor gave a yield of 30%–40%. In contrast, Al2O3 ALD films that were grown to 24 nm and then etched back to 5 nm to form the MIM capacitor provided a yield of 65%–75%. This increase in yield of approximately 100% indicates that the deposit and etchback approach can improve the yield of MIM devices based on ultrathin Al2O3 ALD films. Although this method has been previously suggested to improve the quality of ultrathin films, this report is believed to be the first demonstrated application of using the deposit and etchback approach for device fabrication. Additional experiments revealed that a portion of the yield improvement can be attributed to the fluorination of the Al2O3 ALD films that produced a volume expansion when forming AlF3. This expansion may produce a compressive stress that helps to close the pinholes. The dielectric constant was also measured for Al2O3 ALD films versus Al2O3 film thickness. The dielectric constant was the same for as-deposited Al2O3 ALD films and Al2O3 ALD films that were first grown to 24 nm and then etched back to smaller thicknesses. This agreement indicates that the dielectric constant can be understood in terms of a series capacitor model and that Al2O3 ALE does not affect the electrical properties of the Al2O3 films.

An Empirical Investigation on the Effect of Oxygen Vacancy in ZrO2 Thin Film on the Frequency-Dependent Capacitance Degradation in the Metal–Insulator–Metal Capacitor

The operation speed of dynamic random access memory devices has been increasing with respect to the evolution of electronic devices. This in turn has induced a decrease in the allowed time for the operation. Therefore, the effective capacitance degradation in which the capacitance gradually decreases with increasing frequency of applied ac voltage is a severe concern for decreasing capacitance during fast operation, in addition to inducing reliability degradation. Hence, in this article, the origin of capacitance degradation depending on operation frequency, also called “frequency dependence” of the capacitance, was revealed. By performing dc and ac nonlinearity analyses, the effect of defects, especially oxygen vacancies, on the electrical properties of metal-insulator-metal (MIM) capacitors was investigated. Eventually, the mechanism of frequency dependence related to oxygen vacancy in the insulator of the MIM capacitor was identified.

Importance of Annealing Step on Dielectric Constant of ZrO2 Layer of MIM Capacitors with Al2O3/ZrO2 and ZrO2/Al2O3 Stack Structures

Several stack structures such as 1st ZrO2/Al2O3/2nd ZrO2 (ZAZ), 1st TiO2/Al2O3/2nd TiO2 (TAT), and 1st ZrO2/(Ta/Nb)Ox-Al2O3/2nd ZrO2 (ZTNAZ) as insulator of DRAM capacitor with metal-insulator-metal (MIM) structure have been widely investigated [1-4]. ZAZ is one of the most candidate structure because ZrO2 has relatively high-dielectric-constant (high-k) value (>30) and wide band gap (~5.8 eV) [1,2]. An amorphous Al2O3 interlayer acts as blocking layer to suppress the leakage current through the grain boundaries of ZrO2 layer. An annealing process was generally carried out after ZAZ deposition or TiN/ZAZ/TiN fabrication. The effects of annealing step on k-values of 1st ZrO2 and 2nd ZrO2 layers are not fully understood. In this study, we investigate k-values of ZrO2 layer of TiN MIM capacitors with Al2O3/ZrO2 (AZ) and ZrO2/Al2O3 (ZA) insulators fabricated by post-deposition annealing (PDA) after AZ and ZA insulators deposition or post-metallization annealing (PMA) after TiN top electrode (TE-TiN) deposition.MIM capacitors were fabricated as follows. A 50-nm-thick TiN bottom electrode (BE-TiN) was deposited by reactive sputtering on the P+ Si substrate. In case of AZ stack structure, a 2-nm-thick Al2O3 layer was deposited on BE-TiN by atomic layer deposition (ALD) at 300°C using TMA and water gas, and subsequently ZrO2 layer was deposited on Al2O3 layer by ALD at 300°C using (C5H5)Zr[N(CH3)2]3 precursors and water gas. On the other hand, the ZA stack structure was prepared by depositing a ZrO2 layer and then an Al2O3 layer under same ALD condition. The ZrO2 thickness was varied from 2.8 to 5.7 nm by changing ALD cycles. PDA (ZA wPDA and AZ wPDA) was carried out at 600°C for 1 min in N2. Finally, a 50-nm-thick TE-TiN was deposited to fabricate MIM capacitor. TiN/AZ/TiN and TiN/ZA/TiN capacitors without PDA were also fabricated by PMA (ZA wPMA and ZA wPMA) with the same PDA conditions. All structural MIM capacitors without annealing process (w/o) were prepared as references.The k-value of Al2O3 layer which estimated from capacitance of TiN/Al2O3/TiN capacitors at 0V was found to be 7.7. By using this k-value of Al2O3, each k-value of ZrO2 layer was also estimated from capacitance at 0V. The k-values of ZrO2 layer of all w/o capacitors exhibited about 22 - 25. The k-values of the AZ wPMA increased as the ZrO2 thickness increased and was saturated to 35 when the thickness was over 4.8 nm. The ZA wPMA showed a similar behavior with respect to the ZrO2 thickness, but the saturated k-value was a small value of 31. In the case of the ZA wPDA, we observed a dramatic increase in k-value of ZrO2 layer when the ZrO2 thickness increased from 3.9 to 4.9 nm. The maximum k-value of 44 was about 10 larger than that of the AZ wPDA under the same ZrO2 thickness of 5.7 nm. This difference may be related with coefficients of thermal expansion (CTE) of the Al2O3 (5.4~8.4×10-6 K-1), ZrO2 (8.0~11.0×10-6 K-1) and TiN (9.4~10.3×10-6 K-1). ZrO2 had a similar CTE value of TiN and larger CTE value than Al2O3. In the case of the ZA wPDA capacitor, ZrO2 layer was annealed with an asymmetric structure sandwiched between Al2O3 and TiN with different CTE values during PDA. This asymmetric structure may introduce some stress of ZrO2 layer and results in grain growth and crystallization of high-k phase. It is considered that the k-value became smaller because ZrO2 layer grew freely without stress in the AZ wPDA. The ZrO2 layer of AZ and ZA became symmetric structure by sandwiching between BE-TiN and TE-TiN, and may be suppressed the stress during PMA. To increase k-value of the ZrO2 layer, it is important that the crystal growth of the ZrO2 layer is carried out under stress during annealing process.This study was supported, in part, by JSPS KAKENHI (Grant Nos. JP20H02189 and JP18J22998).[1] Y.- H. Wu et al., Appl. Phys. Lett. 93, 033511 (2008).[2] W. Weinreich et al., J. Vac. Sci. Technol. B 31, 01A109 (2013).[3] T. Sawada et al., J. Vac. Sci. Technol. A 35, 061503 (2017).[4] T. Onaya et al., Thin Solid Films 655, 48-53 (2018). Figure 1

Importance of Annealing Step on Dielectric Constant of ZrO2 Layer of MIM Capacitors with Al2O3/ZrO2 and ZrO2/Al2O3 Stack Structures

We investigated characteristics of ZrO2/Al2O3 (ZA) and Al2O3/ZrO2 (AZ) insulators after two annealing step such as post-deposition annealing (PDA) at 600°C before TiN top electrode (TE-TiN) deposition and post-metallization annealing (PMA) at 600°C after TE-TiN deposition. The ZrO2 layers (2.9-5.7 nm) and Al2O3 layer (2.0 nm) were deposited by atomic layer deposition at 300°C. ZrO2 layer had a polycrystalline structure while Al2O3 layer had an amorphous structure. The capacitance of the AZ capacitors after PDA or PMA reasonably decreased as ZrO2 thickness increased. On the other hand, the ZA capacitors after PDA (ZA wPDA) exhibited almost similar capacitance while the ZA capacitors after PMA decreased as well as the AZ capacitor. The dielectric constant (k) of the ZA wPDA drastically increased to 44 compared to other capacitors (30-37) in the ZrO2 thickness region of over 4.9 nm. This is because the ZrO2 layer was annealed with an asymmetric structure sandwiched between Al2O3 and TiN with different coefficients of thermal expansion during PDA. Furthermore, the ZA wPDA with the ZrO2 layers (4.9-5.7 nm) exhibited superior characteristics satisfying a high k-value and a high electric filed value at J = 1 × 10-5 Acm-2. These indicated that PDA treatment should perform after 1st-ZrO2/Al2O3 layer deposition to obtain ZrO2 layer with high k-value.

Design of Low Pass Filter using Passive Inductor

This paper discusses the passive inductor-based low pass filter (LPF) up to 1.144 GHz bandwidth range with the use of integrated passive device (IPD) technology. In this circuit, three MIM capacitors and three inductors are added parallel to create transmission zeros at a frequency of about 2.2 GHz and 3.6 GHz. The filter has been designed by this method with less structure complexity, a small insertion loss, a small chip area, increase bandwidth, and high out-of-band rejection. After the fabrication of the low pass filter circuit, the insertion loss of 0.7 dB, center frequency 600 MHz, and harmonic rejections of 62 dB with the chip area of 1125.21 μm×471.25 μm including pads.

A State-Space-Based Method to Model Vccin Feedthrough Noise in Microprocessors With Fully Integrated Voltage Regulators

Modern high-performance server microprocessors need to integrate multiple intellectual property (IP) blocks in a single chip to achieve higher performance. Due to the diverse supply voltage requirements of these IP blocks, their supply voltages are generated locally on the chip using fully integrated voltage regulators (FIVRs). FIVR is designed using on-chip power bridges, bridge drivers, control circuits, on-chip metal–insulator–metal (MIM) capacitors, package inductors, and package power planes. The input power supply (Vccin) of all the FIVRs is shared to minimize the platform cost and is generated using a voltage regulator module (VRM) on the motherboard. The noise coupling between FIVRs due to the common input supply is referred to as the Vccin feedthrough noise. The existing method of modeling the Vccin feedthrough noise is based on circuit simulation. Circuit models are highly complex as different components such as the FIVR power bridges, bridge drivers, MIM capacitors, package inductors, package power planes, and the Vccin network need to be modeled. Convergence issues are very frequent in full chip circuit simulations and it typically takes many iterations. Hence design optimization is difficult to carry out using circuit simulations. In this article, a state-space-based time-domain method is proposed to model the Vccin feedthrough noise based on G-parameters and S-parameters of the FIVR and the Vccin network. The state-space models are generated using the vector-fitting algorithm. The proposed method simplifies the construction of the Vccin feedthrough models and improves the convergence time.

Electrical characterization of flexible hafnium oxide capacitors on deformable softening polymer substrate

In this work, we investigate the electrical performance and compatibility of low-temperature hafnium oxide (HfO2) thin-film capacitors on a novel softening polymer substrate. Metal-insulator-metal HfO2 capacitors were fabricated using HfO2 as the dielectric material, deposited at 100 °C by atomic layer deposition (ALD), and gold as the top and bottom contacts. The HfO2 capacitors were fabricated on silicon and on softening polymer substrates with a dielectric thickness of 50, 40, 30, and 20 nm. The electrical performance of the MIM capacitors was measured and compared to determine the quality and compatibility of the low-temperature HfO2 deposition with the silicon and polymer substrate. The dielectric constant varied from 12 to 17 as the HfO2 thickness increased from 20 to 50 nm. Moreover, the capacitance density and dielectric constant of the capacitors on the polymer substrate differed by 3.9% ± 2% and 3.4% ± 2% with respect to the silicon substrate. The polymer substrate devices also have a higher leakage current, which suggests a higher number of defects in the dielectric film relative to Si substrates. Finally, the devices on the polymer substrate were subjected to bending cycles (up to 105 cycles) with a 5 mm bending radius to evaluate the resilience of the HfO2 capacitors against mechanical stress. The results show that the fabrication of the HfO2 thin-film capacitors on the softening polymer substrate is achievable with high stability and mechanical resilience. Overall, this research could assist the production of flexible biomedical devices on softening polymer substrates.