In this paper, a new chaotic memristor system is developed based on a well-known nonlinear circuit. By replacing the nonlinear positive conductance of Shinriki's circuit with a memristor emulator, the new simple chaotic circuit can reduce the number of active elements and reduce power consumption. An analysis of equilibria and stability, dissipative properties, Lyapunov exponents, Kaplan-Yorke dimensions, and bifurcation diagrams is presented as well as numerical simulation of the new memristor chaotic system. As a final step, the electronic circuit is designed using Multisim software, which is complemented by a physical realization to demonstrate the feasibility of the chaotic system.