Memory Platforms Research Articles

Er:LiNbO3 Quantum Memory Platform Optimized with Dynamic Defect Annealing

AbstractLithium niobate (LiNbO3) exhibits poor radiation resistance when conventionally implanted with Er at room temperature. To repair the structural disorder, high‐temperature post‐implantation anneals are typically required; however, such treatments can cause sample cracking and dopant redistribution, which are incompatible with device applications. The optimized approach is proposed by performing implants at elevated but acceptably low temperatures to in situ minimize the structural defects generated in the collision cascades, via so‐called “dynamic defect annealing”. Thus, a gradual increase in Er optical activity is shown as a function of irradiation temperature in the range of 25–450 °C, in striking correlation with a decreasing trend for the residual disorder. The impact of moderate post‐implantation anneals is also investigated by comparing the results of anneals of samples implanted at 25 °C and 450 °C. This comparison further confirms the higher optical activation of Er and lower residual structural disorder when the material is initially implanted at elevated temperatures. Based on these data, it is concluded that the use of dynamic defect annealing during the Er implantation of LiNbO3 is a promising strategy for optimizing it as a quantum memory platform, resolving otherwise inevitable trade‐offs.

Isolation of individual Er quantum emitters in anatase TiO2 on Si photonics

Defects and dopant atoms in solid state materials are a promising platform for realizing single photon sources and quantum memories, which are the basic building blocks of quantum repeaters needed for long distance quantum networks. In particular, trivalent erbium (Er3+) is of interest because it couples C-band telecom optical transitions with a spin-based memory platform. In order to produce quantum repeaters at the scale required for quantum networks it is imperative to integrate these necessary building blocks with mature and scalable semiconductor processes. In this work, we demonstrate the optical isolation of single Er3+ ions in CMOS-compatible titanium dioxide (TiO2) thin films monolithically integrated on a silicon-on-insulator photonics platform. Our results demonstrate an initial step toward the realization of a monolithically integrated and scalable quantum photonics package based on Er3+ doped thin films.

Runtime support for CPU-GPU high-performance computing on distributed memory platforms

IntroductionHardware heterogeneity is here to stay for high-performance computing. Large-scale systems are currently equipped with multiple GPU accelerators per compute node and are expected to incorporate more specialized hardware. This shift in the computing ecosystem offers many opportunities for performance improvement; however, it also increases the complexity of programming for such architectures.MethodsThis work introduces a runtime framework that enables effortless programming for heterogeneous systems while efficiently utilizing hardware resources. The framework is integrated within a distributed and scalable runtime system to facilitate performance portability across heterogeneous nodes. Along with the design, this paper describes the implementation and optimizations performed, achieving up to 300% improvement on a single device and linear scalability on a node equipped with four GPUs.ResultsThe framework in a distributed memory environment offers portable abstractions that enable efficient inter-node communication among devices with varying capabilities. It delivers superior performance compared to MPI+CUDA by up to 20% for large messages while keeping the overheads for small messages within 10%. Furthermore, the results of our performance evaluation in a distributed Jacobi proxy application demonstrate that our software imposes minimal overhead and achieves a performance improvement of up to 40%.DiscussionThis is accomplished by the optimizations at the library level and by creating opportunities to leverage application-specific optimizations like over-decomposition.

Engineering the Kitaev Spin Liquid in a Quantum Dot System.

The Kitaev model on a honeycomb lattice may provide a robust topological quantum memory platform, but finding a material that realizes the unique spin-liquid phase remains a considerable challenge. We demonstrate that an effective Kitaev Hamiltonian can arise from a half-filled Fermi-Hubbard Hamiltonian where each site can experience a magnetic field in a different direction. As such, we provide a method for realizing the Kitaev spin liquid on a single hexagonal plaquette made up of 12 quantum dots. Despite the small system size, there are clear signatures of the Kitaev spin-liquid ground state, and there is a range of parameters where these signatures are predicted, allowing a potential platform where Kitaev spin-liquid physics can be explored experimentally in quantum dot plaquettes.

A Cross-Process Signal Integrity Analysis (CPSIA) Method and Design Optimization for Wafer-on-Wafer Stacked DRAM.

A multi-layer stacked Dynamic Random Access Memory (DRAM) platform is introduced to address the memory wall issue. This platform features high-density vertical interconnects established between DRAM units for high-capacity memory and logic units for computation, utilizing Wafer-on-Wafer (WoW) hybrid bonding and mini Through-Silicon Via (TSV) technologies. This 3DIC architecture includes commercial DRAM, logic, and 3DIC manufacturing processes. Their design documents typically come from different foundries, presenting challenges for signal integrity design and analysis. This paper establishes a lumped circuit based on 3DIC physical structure and calculates all values of the lumped elements in the circuit model with the transmission line model. A Cross-Process Signal Integrity Analysis (CPSIA) method is introduced, which integrates three different manufacturing processes by modeling vertical stacking cells and connecting DRAM and logic netlists in one simulation environment. In combination with the dedicated buffer driving method, the CPSIA method is used to analyze 3DIC impacts. Simulation results show that the timing uncertainty introduced by 3DIC crosstalk ranges from 31 ps to 62 ps. This analysis result explains the stable slight variation in the maximum frequency observed in vertically stacked memory arrays from different DRAM layers in the physical testing results, demonstrating the effectiveness of this CPSIA method.

Balancing Tracking Granularity and Parallelism in Many-Task Systems: The Horizons Approach

Reducing the need for users to manually manage the details of work and data distribution is an important goal of high-level many-task runtime systems. For distributed memory platforms this means that the runtime system has to keep track of both fine-grained task dependencies and data residency meta-information. The amount of such meta-information is proportional to the granularity of parallelism which needs to be managed, introducing a trade-off. More precise tracking of data state allows leveraging more opportunities for compute and transfer parallelism, while also introducing more overhead. As such, the fidelity of the information being tracked needs to be managed carefully, ideally without introducing additional latency, communication or substantial compute overhead. We present the “Horizons” approach, designed to fulfill these goals. Specifically, horizons allow for the effective and efficient management of parallelism and the coalescing of previous fine-grained tracking information while maintaining an easily configurable scheduling window with full information precision. As an additional benefit, they provide consistent cluster-wide decision points without requiring any inter-node communication, and effectively cap the size of state tracking data structures even in the presence of problematic access patterns. Experimental evaluation on microbenchmarks and dry runs demonstrates that horizons are effective in keeping the scheduling complexity constant, while their own overhead is negligible—below 10μs\\documentclass[12pt]{minimal} \\usepackage{amsmath} \\usepackage{wasysym} \\usepackage{amsfonts} \\usepackage{amssymb} \\usepackage{amsbsy} \\usepackage{mathrsfs} \\usepackage{upgreek} \\setlength{\\oddsidemargin}{-69pt} \\begin{document}$$10\\, \\upmu {\\rm s}$$\\end{document} per horizon when building a command graph for 512 GPUs. We additionally demonstrate the performance impact of horizons—as well as their low overhead—on a real-world application.

Enhanced Computational Study with Experimental Correlation on I-V Characteristics of Tantalum Oxide (TaOx) Memristor Devices in a 1T1R Configuration.

Memristors, non-volatile switching memory platform, has recently attracted significant interest, offering unique potential to enable the realization of human brain-like neuromorphic computing efficiency. Memristors also demonstrate excellent temperature tolerance, long-term durability, and high tunability with nanosecond pulses, making them highly attractive for neuromorphic computing applications. To better understand the material processing, microstructure, and property relationship of switching mechanisms in memristor devices, computational methodologies, and tools are developed to predict the I-V characteristics of memristor devices based on tantalum oxide (TaOx) resistive random-access memory (ReRAM) integrated with an n-channel metal-oxide-semiconductor (NMOS) transistor. A multiphysics model based on coupled partial differential equations for electrical and thermal transport phenomena is solved for the high- and low-resistance states during the formation, growth, and destruction of a conducting filament through SET and RESET stages. These stages effectively represent the migration of oxygen vacancies within an oxide exchange layer. A series of parametric studies and energy minimization calculations are conducted to determine probable ranges for key material and model parameters accounting for the experimental data. The computational model successfully predicted the measured I-V curves across various gate voltages applied to the NMOS transistor in the one transistor one resistance (1T1R) configuration.

Design Rules, Accurate Enthalpy Prediction, and Synthesis of Stoichiometric Eu3+ Quantum Memory Candidates.

Stoichiometric Eu3+ compounds have recently shown promise for building dense, optically addressable quantum memory as the cations' long nuclear spin coherence times and shielded 4f electron optical transitions provide reliable memory platforms. Implementing such a system, though, requires ultranarrow, inhomogeneous linewidth compounds. Finding this rare linewidth behavior within a wide range of potential chemical spaces remains difficult, and while exploratory synthesis is often guided by density functional theory (DFT) calculations, lanthanides' 4f electrons pose unique challenges for stability predictions. Here, we report DFT procedures that reliably reproduce known phase diagrams and correctly predict two experimentally realized quantum memory candidates. We are the first to synthesize the double perovskite halide Cs2NaEuF6. It is an air-stable compound with a calculated band gap of 5.0 eV that surrounds Eu3+ with mononuclidic elements, which are desirable for avoiding inhomogeneous linewidth broadening. We also analyze computational database entries to identify phosphates and iodates as the next generation of chemical spaces for stoichiometric quantum memory system studies. This work identifies new candidate platforms for exploring chemical effects on quantum memory candidates' inhomogeneous linewidth while also providing a framework for screening Eu3+ compound stability with DFT.

Robust Millisecond Coherence Times of Erbium Electron Spins

Erbium-doped solids are prime candidates for quantum memories in optical quantum networks given their telecom-compatible photon emission. An electron spin of erbium with millisecond coherence time is desirable for generating remote entanglement between adjacent quantum network nodes. Here we report GHz-range electron-spin transitions of ${}^{167}{\mathrm{Er}}^{3+}$ in a yttrium oxide (${\mathrm{Y}}_{2}{\mathrm{O}}_{3}$) matrix with coherence times that are consistently longer than a millisecond. By polarizing paramagnetic impurity spins we achieve a spin ${T}_{2}$ up to 1.46 ms, and up to 7.1 ms after dynamical decoupling. These coherence lifetimes are among the longest found for erbium in crystalline matrices despite the presence of host nuclear spins. We further enhance the coherence time beyond conventional dynamical decoupling, using customized sequences to simultaneously mitigate spectral diffusion and dipolar interactions. Our study not only establishes ${}^{167}{\mathrm{Er}}^{3+}$: ${\mathrm{Y}}_{2}{\mathrm{O}}_{3}$ as a significant quantum memory platform but also provides a guideline for engineering long-lived erbium spins in a variety of host materials for quantum technologies.

Fargraph+: Excavating the parallelism of graph processing workload on RDMA-based far memory system

Disaggregated architecture brings new opportunities to memory-consuming applications like graph processing. It allows one to outspread memory access pressure from local to far memory, providing an attractive alternative to disk-based processing. Although existing works on general-purpose far memory platforms show great potentials for application expansion, it is unclear how graph processing applications could benefit from disaggregated architecture, and how different optimization methods influence the overall performance.In this paper, we take the first step to analyze the impact of graph processing workload on disaggregated architecture by extending the GridGraph framework on top of the RDMA-based far memory system. We propose Fargraph+, a system with parallel graph data offloading and far memory coordination strategy for enhancing efficiency of graph processing workload on RDMA-based far memory architecture. Specifically, Fargraph+ reduces the overall data movement through a well-crafted, graph-aware data segment offloading mechanism. In addition, we use optimal data segment splitting and asynchronous data buffering to achieve graph iteration-friendly far memory access. We further configure efficient parallelism-oriented control to accelerate performance of multi-threading processing on graph iterations while improving memory efficiency of far memory access by utilizing RDMA queue features. We show that Fargraph+ achieves near-oracle performance for typical in-local-memory graph processing systems. Fargraph+ shows up to 11.2× speedup compared to Fastswap, the state-of-the-art, general-purpose far memory platform.

Superconducting Resonators with Voltage-Controlled Frequency and Nonlinearity

Voltage-tunable superconductor-semiconductor devices offer a unique platform to realize dynamic tunability in superconducting quantum circuits. By galvanically connecting a gated $\mathrm{In}\mathrm{As}$-$\mathrm{Al}$ Josephson junction to a coplanar waveguide resonator, we demonstrate the use of a superconducting element with wideband gate tunability. We show that the resonant frequency is controlled via a gate-tunable Josephson inductance and that the nonlinearity of the $\mathrm{In}\mathrm{As}$-$\mathrm{Al}$ junction is nondissipative as is the case with conventional ${\mathrm{Al}\mathrm{O}}_{\mathrm{x}}\text{-Al}$ junctions. As the gate voltage is decreased, the inductive participation of the junction increases up to $44\mathrm{%}$, resulting in the resonant frequency being tuned by over $2\phantom{\rule{0.2em}{0ex}}\mathrm{GHz}$. Utilizing the wide tunability of the device, we demonstrate that two resonant modes can be adjusted such that they strongly hybridize, exhibiting an avoided-level crossing with a coupling strength of $51\phantom{\rule{0.2em}{0ex}}\mathrm{MHz}$. Implementing such voltage-tunable resonators is the first step toward realizing wafer-scale continuous voltage control in superconducting circuits for qubit-qubit coupling, quantum limited amplifiers, and quantum memory platforms.

Cryogenic memory technologies

The surging interest in quantum computing, space electronics, and superconducting circuits has led to new developments in cryogenic data storage technology. Quantum computers promise to far extend our processing capabilities and may allow solving currently intractable computational challenges. Even with the advent of the quantum computing era, ultra-fast and energy-efficient classical computing systems are still in high demand. One of the classical platforms that can achieve this dream combination is superconducting single flux quantum (SFQ) electronics. A major roadblock towards implementing scalable quantum computers and practical SFQ circuits is the lack of suitable and compatible cryogenic memory that can operate at 4 Kelvin (or lower) temperature. Cryogenic memory is also critically important in space-based applications. A multitude of device technologies have already been explored to find suitable candidates for cryogenic data storage. Here, we review the existing and emerging variants of cryogenic memory technologies. To ensure an organized discussion, we categorize the family of cryogenic memory platforms into three types: superconducting, non-superconducting, and hybrid. We scrutinize the challenges associated with these technologies and discuss their future prospects.

Quantum memories for fundamental science in space

Investigating and verifying the connections between the foundations of quantum mechanics and general relativity will require extremely sensitive quantum experiments. To provide ultimate insight into this fascinating area of physics, the realization of dedicated experiments in space will sooner or later become a necessity. Quantum technologies, and among them quantum memories in particular, are providing novel approaches to reach conclusive experimental results due to their advanced state of development backed by decades of progress. Storing quantum states for prolonged time will make it possible to study Bell tests on astronomical baselines, to increase measurement precision for investigations of gravitational effects on quantum systems, or enable distributed networks of quantum sensors and clocks. We here promote the case of exploiting quantum memories for fundamental physics in space, and discuss both distinct experiments as well as potential quantum memory platforms and their performance.

Optimal Thresholds for Fracton Codes and Random Spin Models with Subsystem Symmetry.

Fracton models provide examples of novel gapped quantum phases of matter that host intrinsically immobile excitations and therefore lie beyond the conventional notion of topological order. Here, we calculate optimal error thresholds for quantum error correcting codes based on fracton models. By mapping the error-correction process for bit-flip and phase-flip noises into novel statistical models with Ising variables and random multibody couplings, we obtain models that exhibit an unconventional subsystem symmetry instead of a more usual global symmetry. We perform large-scale parallel tempering MonteCarlo simulations to obtain disorder-temperature phase diagrams, which are then used to predict optimal error thresholds for the corresponding fracton code. Remarkably, we found that the X-cube fracton code displays a minimum error threshold (7.5%) that is much higher than 3D topological codes such as the toric code (3.3%), or the color code (1.9%). This result, together with the predicted absence of glass order at the Nishimori line, shows great potential for fracton phases to be used as quantum memory platforms.

A server bypass architecture for hopscotch hashing key–value store on DRAM-NVM memories

Non-volatile memories (NVMs), along with DRAMs, provide key–value (KV) stores with strong support in persisting data and storing it in memories. The remote direct memory access (RDMA) technology has been employed to boost remote data access to KV stores, since it provides kernel-bypass, zero-copy and low-latency features. Meanwhile, existing KV stores on DRAM-NVM memories suffer from performance bottlenecks; extra costs still need to be spent in accessing data in memories and keeping data consistency. This paper introduces Reno, a server bypass architecture for KV stores on DRAM-NVM memories. Reno is a server–client architecture for KV stores. It is equipped with two techniques: (1) a hopscotch hashing technique that allows KV stores on DRAM-NVM memories to perform latch-enabled append operations and (2) a fully server-bypass read/write paradigm. These techniques help eliminate network round trips of the server(s) and as well reduce hash conflicts, allowing clients to access the KV stores much more efficiently. We evaluate Reno on an Intel’s Optane DC Persistent Memory platform. The results show that Reno outperforms its counterparts by 1.1∼3.3× for remote reads and 1.9∼4.8× for remote writes in latency; the speedups of concurrent throughput are up to 2.33×, 2.36×, 3.09× and 5.08× for read-only, read-heavy, write-heavy and write-only YCSB workloads, respectively.

Re]-appearances online: photography, mourning and new media ecologies for representing the Southern Cone’s disappeared on two digital memory platforms

The practice of enforced disappearances fundamentally alters memorialisation rituals as relatives do not have a body to localise mourning as is possible with processes of death. Families in the Southern Cone of South America (Chile/Argentina) have sought new ways to remember the dictatorship missing who remain in a liminal space between life and death. As a vehicle to represent public grief, photography became vital; families marched with photographs of their disappeared relatives on placards or pinned to their chests. Studies on the importance of photography and disappearance have come some way in elucidating the photographic medium’s unique role of in representing the disappeared. However, little scholarship has looked at the role of photography and new media in these histories. Charting the use of photographs in Chile and Argentina to represent the disappeared and their families’ grief, this article engages with their suspended mourning drawing on content and visual analysis alongside expert interview data. By analysing two websites that reproduce photographs of the disappeared: www.memoriaviva.com and www.recordatorios.com.ar, the article looks at the use of photography in the digital ecology. Both sites show photography’s continued importance for rituals of remembrance and to demand accountability in the present and for the future.

High-performance cavity-enhanced quantum memory with warm atomic cell

High-performance quantum memory for quantized states of light is a prerequisite building block of quantum information technology. Despite great progresses of optical quantum memories based on interactions of light and atoms, physical features of these memories still cannot satisfy requirements for applications in practical quantum information systems, since all of them suffer from trade-off between memory efficiency and excess noise. Here, we report a high-performance cavity-enhanced electromagnetically-induced-transparency memory with warm atomic cell in which a scheme of optimizing the spatial and temporal modes based on the time-reversal approach is applied. The memory efficiency up to 67 ± 1% is directly measured and a noise level close to quantum noise limit is simultaneously reached. It has been experimentally demonstrated that the average fidelities for a set of input coherent states with different phases and amplitudes within a Gaussian distribution have exceeded the classical benchmark fidelities. Thus the realized quantum memory platform has been capable of preserving quantized optical states, and is ready to be applied in quantum information systems, such as distributed quantum logic gates and quantum-enhanced atomic magnetometry.

High density hexagonal MTJ array with 72 nm pitch and 30 nm CD by using advanced DRAM patterning solution and ion beam etch

A hexagonal honeycomb magnetic tunneling junction array with 72 nm pitch and 30 nm MgO critical dimension was successfully fabricated on a 1× nm dynamic random access memory platform by using a mature dynamic random access memory patterning solution and ion beam etch. To our knowledge, both pitch size and critical dimension size are the world’s smallest ones for industrial magnetic tunneling junction arrays. To obtain such a high density and small sized magnetic tunneling junction array, a cross self-aligned double patterning technique, a triple layer hard mask scheme, and an optimized ion beam etch condition were adopted. During the optimization of the ion beam etch process, the dependence of a magnetic tunneling junction pillar profile on ion beam etch parameters for a high density hexagonal magnetic tunneling junction array has also been systematically studied. The depth of oxide recess and the magnetic tunneling junction sidewall angle increased with the ion beam etch amount, while magnetic tunneling junction critical dimension and hard mask remainder thickness decreased with increasing ion beam etch amount.

Quantum Interference between Photons and Single Quanta of Stored Atomic Coherence.

Essential for building quantum networks over remote independent nodes, the indistinguishability of photons has been extensively studied by observing the coincidence dip in the Hong-Ou-Mandel interferometer. However, indistinguishability is not limited to the same type of bosons. For the first time, we hereby observe quantum interference between flying photons and a single quantum of stored atomic coherence (magnon) in an atom-light beam splitter interface. We demonstrate that the Hermiticity of this interface determines the type of quantum interference between photons and magnons. Consequently, not only the bunching behavior that characterizes bosons is observed, but counterintuitively, fermionlike antibunching as well. The hybrid nature of the demonstrated magnon-photon quantum interface can be applied to versatile quantum memory platforms, and can lead to fundamentally different photon distributions from those occurring in boson sampling.

An Online and Scalable Model for Generalized Sparse Nonnegative Matrix Factorization in Industrial Applications on Multi-GPU

Generalized sparse nonnegative matrix factorization (SNMF) has been proven useful in extracting information and representing sparse data with various types of probabilistic distributions from industrial applications, e.g., recommender systems and social networks.However, current solution approaches for generalized SNMF are based on the manipulation of whole sparse matrices and factor matrices, which will result in large-scale intermediate data.Thus, these approaches cannot describe the high-dimensional and sparse matrices in mainstream industrial and big data platforms, e.g., graphics processing unit (GPU) and multi-GPU, in an online and scalable manner. To overcome these issues, an online, scalable, and single-thread-based SNMF for CUDA parallelization on GPU (CUSNMF) and multi-GPU (MCUSNMF) is proposed in this article. First, theoretical derivation is conducted, which demonstrates that the CUSNMF depends only on the products and sums of the involved feature tuples. Next, the compactness, which can follow the sparsity pattern of sparse matrices, endows the CUSNMF with online learning capability and the fine granularity gives it high parallelization potential on GPU and multi-GPU. Finally, the performance results on several real industrial datasets demonstrate the linear scalability of the time overhead and the space requirement and the validity of the extension to online learning. Moreover, CUSNMF obtains speedup of 7X on a P100 GPU compared to that of the state-of-the-art parallel approaches on a shared memory platform.