Logic Memory Research Articles

Reconfigurable logic-in-memory circuits with ferroelectric nanosheet field-effect transistors

Abstract To accommodate the requirements of small device dimensions and the application of ferroelectric field-effect transistors (FeFETs) in logic-in-memory circuits, we realize the reconfigurable logic-in-memory circuits with ferroelectric nanosheet field-effect transistors (FeNSFETs) through simulation. By evaluating the memory window and logic performances of the devices, it is demonstrated that the key to constructing logical functions are the magnitudes of the drain current at program (PGM) and erase (ERS) state when V G = 0 V. We find that appropriately increasing the number of nanosheets can enhance the current at PGM state, and appropriately increasing the write voltage can decrease the current at ERS state, which are both beneficial for the achievement of reconfigurable circuits. Thus, it is necessary to take into consideration the trade-offs between the process complexity, power consumption, and logical function realization. This work contributes to the prospective design for ferroelectric reconfigurable logic-in-memory circuits.

Investigation of the TaOx unipolar switching memory on high efficiency computing

Memristor has shown great potential application for data storage, neuromorphic computing chip, and memory logic, but its bi-directional operation from setting in positive bias voltage region to resetting in a negative bias voltage region would introduce a complex control circuit. Herein, a memristor with the structure of Au/TaOx/F-doped SnO2 presents unipolar switching behavior, enabling the memristor to operate the set and reset processing in a single voltage direction. By comparison with bipolar switching memristor, using this unipolar switching memristor to operate the logic expression of the letter “D” based on American standard code for information interchange (ASCII) can reduce power consumption by 55.56 % while switching the logic state from “0” to “1” and then back to “0” can save up to 48 % of power consumption. This work provides a feasible method for the low power consumption computing as well as a road to simplify circuit design.

Evolution of Tribotronics: From Fundamental Concepts to Potential Uses.

The intelligent sensing network is one of the key components in the construction of the Internet of Things, and the power supply technology of sensor communication nodes needs to be solved urgently. As a new field combining tribo-potential with semiconductor devices, tribotronics, based on the contact electrification (CE) effect, realizes direct interaction between the external environment and semiconductor devices by combining triboelectric nanogenerator (TENG) and field-effect transistor (FET), further expanding the application prospects of micro/nano energy. In this paper, the research progress of tribotronics is systematically reviewed. Firstly, the mechanism of the CE effect and the working principles of TENG are introduced. Secondly, the regulation theory of tribo-potential on carrier transportation in semiconductor devices and the research status of tribotronic transistors are summarized. Subsequently, the applications of tribotronics in logic circuits and memory devices, smart sensors, and artificial synapses in recent years are demonstrated. Finally, the challenges and development prospects of tribotronics in the future are projected.

On the Energy Behaviors of the Bellman–Ford and Dijkstra Algorithms: A Detailed Empirical Study

The Single-Source Shortest Paths (SSSP) graph problem is a fundamental computation. This study attempted to characterize concretely the energy behaviors of the two primary methods to solve it, the Bellman–Ford and Dijkstra algorithms. The very different interactions of the algorithms with the hardware may have significant implications for energy. The study was motivated by the multidisciplinary nature of the problem. Gaining better insights should help vital applications in many domains. The work used reliable embedded sensors in an HPC-class CPU to collect empirical data for a wide range of sizes for two graph cases: complete as an upper-bound case and moderately dense. The findings confirmed that Dijkstra’s algorithm is drastically more energy efficient, as expected from its decisive time complexity advantage. In terms of power draw, however, Bellman–Ford had an advantage for sizes that fit in the upper parts of the memory hierarchy (up to 2.36 W on average), with a region of near parity in both power draw and total energy budgets. This result correlated with the interaction of lighter logic and graph footprint in memory with the Level 2 cache. It should be significant for applications that rely on solving a lot of small instances since Bellman–Ford is more general and is easier to implement. It also suggests implications for the design and parallelization of the algorithms when efficiency in power draw is in mind.

Effect of tDCS combined with virtual reality for post-stroke cognitive impairment: a randomized controlled trial study protocol

BackgroundPost-stroke cognitive impairment (PSCI) not only increases patient mortality and disability, but also adversely affects motor function and the ability to perform routine daily activities. Current therapeutic approaches for, PSCI lack specificity, primarily relying on and medication and traditional cognitive therapy supplemented by a limited array of tools. Both transcranial direct current stimulation (tDCS) and virtual reality (VR) training have demonstrated efficacy in improving cognitive performance among PSCI patients. Previous findings across various conditions suggest that implementing a therapeutic protocol combining tDCS and VR (tDCS - VR) may yield superior in isolation. Despite this, to our knowledge, no clinical investigation combining tDCS and VR for PSCI rehabilitation has been conducted. Thus, the purpose of this study is to explore the effects of tDCS - VR on PSCI rehabilitation.MethodsThis 4-week, single-center randomized clinical trial protocol will recruit 200 patients who were randomly assigned to one of four groups: Group A (tDCS + VR), Group B (tDCS + sham VR), Group C (sham tDCS + VR), Group D (sham tDCS + sham VR). All four groups will receive conventional cognitive rehabilitation training. The primary outcome measurement utilizes the Mini-Mental State Examination (MMSE). Secondary outcome measures include the Montreal Cognitive Assessment, Frontal Assessment Battery, Clock Drawing Test, Digital Span Test, Logic Memory Test, and Modified Barthel Index. Additionally, S-YYZ-01 apparatus for diagnosis and treating language disorders assesses subjects’ speech function. Pre- and post-four-week intervention assessments are conducted for all outcome measures. Functional near-infrared spectroscopy (fNIRS) is employed to observe changes in oxygenated hemoglobin (HbO), deoxy-hemoglobin (HbR), and total hemoglobin (HbT) in the cerebral cortex.DiscussionOur hypothesis posits that the tDCS - VR therapy, in opposed to individual tDCS or VR interventions, could enhance cognitive function, speech ability and daily living skills in PSCI patients while concurrently augmenting frontal cortical activity. This randomized study aims to provide a robust theoretical foundation supported by scientific evidence for the practical implementation of the tDCS - VR combination as a secure and efficient PSCI rehabilitation approach.Trial registrationChictr.org.cn Identifier: ChiCTR2300070580. Registered on 17th April 2023.

Reconfigurable aJ-Level Ferroelectric Transistor-Based Boolean Logic for Logic-in-Memory.

Logic-in-memory (LIM) architecture holds great potential to break the von Neumann bottleneck. Despite the extensive research on novel devices, challenges persist in developing suitable engineering building blocks for such designs. Herein, we propose a reconfigurable strategy for efficient implementation of Boolean logics based on a hafnium oxide-based ferroelectric field effect transistor (HfO2-based FeFET). The logic results are stored within the device itself (in situ) during the computation process, featuring the key characteristics of LIM. The fast switching speed and low power consumption of a HfO2-based FeFET enable the execution of Boolean logics with an ultralow energy of lower than 8 attojoule (aJ). This represents a significant milestone in achieving aJ-level computing energy consumption. Furthermore, the system demonstrates exceptional reliability with computing endurance exceeding 108 cycles and retention properties exceeding 1000 s. These results highlight the remarkable potential of a FeFET for the realization of high performance beyond the von Neumann LIM computing architectures.

Unraveling the negative charge-to-spin conversion in the Heusler alloy Co2FeSi

Recent discoveries of Heusler alloy achieve a strong advantage of the chemically disordered sample in the charge-to-spin conversion and attracted interests for spintronics applications. Here, we observe the negative charge-to-spin conversion in single magnetic layer of Co2FeSi/MgO and prove generations of σy and σx by spin-torque ferromagnetic resonance (ST-FMR). We also report that the change in charge-to-spin conversion efficiency could be controlled by chemical disordering. Furthermore, the thickness dependents of Co2FeSi demonstrated bulk effect is responsible for the generation of spin current. This study contributes to understanding the mechanisms of spin current generation from magnetic full Heusler alloy and also paves the way for the applications of magnetic memory and nonvolatile spin logic technologies.

Ferroelectricity-controlled magnetic ordering and spin photocurrent in NiCl2/GeS multiferroic heterostructures

Controlling magnetism solely through electrical means is indeed a significant challenge, yet holds great potential for advancing information technology. Herein, our investigation presents a promising avenue for electrically manipulating magnetic ordering within 2D van der Waals NiCl2/GeS heterostructures. These heterostructures, characterized by their unique magnetic-ferroelectric (FE) layer stacking, demonstrate spin-constrained photoelectric memory, enabling low-power electrical writing and non-destructive optical reading. The two orientations of the polarization in the GeS FE layer bring about changes in the ground state configuration, transitioning from ferromagnetic (FM) to antiferromagnetic (AFM) orderings within the NiCl2magnetic layer. Correspondingly, the light-induced charge transfer prompts either spin-polarized or unpolarized currents from the FM or AFM states, serving as distinct '1' or '0' states, and facilitating applications in logic processing and memory devices. This transition stems from the interplay of interfacial charge transfer mechanisms and the influence of the effective electric field (Eeff), bringing a non-volatile electric enhancement in the magnetic anisotropy energy within the NiCl2/GeS heterostructure. Overall, our study highlights the NiCl2/GeS heterostructure as an optimal candidate for realizing spin-dependent photoelectric memory, offering unprecedented opportunities for seamlessly integrating memory processing capabilities into a single device through the utilization of layered multiferroic heterostructures.

Evidence of multifunctional properties of ferromanganite La0.5Ca0.5Mn0.5Fe0.5O3

Synthesis and characterization of the magnetic and electrical properties of the perovskite-type ferro-magnetite La0.5Ca0.5Mn0.5Fe0.5O3 are reported. Structural analysis reveals crystallization of the material in an orthorhombic structure, space group Pbnm (#62). The optical response suggests semiconductor-type behavior with bandgap Eg=2.3 eV. Susceptibility curves as a function of temperature and magnetization as a function of applied field suggest a soft ferromagnetic type response below room temperature, with evidence of disorder characterized by magnetic irreversibility at low temperatures and low applied fields. Resistivity measurements as a function of temperature and corroborate the semiconductor nature of the material and hysteretic I-V curves enhance its applicability in programmable logic memory devices. Band structure calculations around the Fermi level result in two different band gap values for the two spin up and spin down polarizations, as expected in ferromagnetic semiconductor materials. The hybridizations observed in the density of states curves as a function of energy suggest that the ferromagnetic character is due to double exchange mechanisms, coexisting with antiferromagnetic super-exchange, which is essentially due to the disorder of Fe3+ and Mn4+ cations in the octahedra along the three crystallographic axes.

Vortex beam induced spatial modulation of quantum-optical effects in a coherent atomic medium

We have studied two-dimensional absorption, gain, and corresponding refractive index profiles in a ladder-type three-level atomic system interacting with three coherent fields. One is a weak probe field considered as a plane wave, while the other two are the control fields taken as two Laguerre–Gaussian doughnut beams. Position dependence of two vortex beams induces the spatially modulated coherence at the condition of resonance, which enables us to obtain space-dependent absorption, transparency, gain without inversion (GWI), and refractive index enhancement in the present scheme. The azimuthal modulation of coherence effects is attributed to the presence of optical angular momentum of the vortex beams. Under the influence of an additional travelling wave field with the presence of two vortex beams, the present model leads us to obtain an ultra-large enhancement of refractive index at the resonant detuning of the fields. This phenomenon makes the atom-field system to play the equivalent role of a high-refractive-index prism. The role of near dipole–dipole (NDD) interaction on the modulation of position-dependent coherence effects has also been investigated. It has been shown that, without any inclusion of the travelling wave field in the system, the phenomenon of resonant enhancement of refractive index may also occur in the presence of NDD effect. The new way of generating spatially controlled GWI and nonlinear refractive index enhancement is specific to the present model. This work seems to be useful for finding its applications in spatially modulated coherence controlled electromagnetically induced transparency-based quantum devices like quantum optical memory, switches, and quantum logic gates, where the refractive index switching phenomenon is a prerequisite.

Can 2D Semiconductors Be Game-Changers for Nanoelectronics and Photonics?

2D semiconductors have interesting physical and chemical attributes that have led them to become one of the most intensely investigated semiconductor families in recent history. They may play a crucial role in the next technological revolution in electronics as well as optoelectronics or photonics. In this Perspective, we explore the fundamental principles and significant advancements in electronic and photonic devices comprising 2D semiconductors. We focus on strategies aimed at enhancing the performance of conventional devices and exploiting important properties of 2D semiconductors that allow fundamentally interesting device functionalities for future applications. Approaches for the realization of emerging logic transistors and memory devices as well as photovoltaics, photodetectors, electro-optical modulators, and nonlinear optics based on 2D semiconductors are discussed. We also provide a forward-looking perspective on critical remaining challenges and opportunities for basic science and technology level applications of 2D semiconductors.

Recent advances on reliability of FPGAs in a radiation environment

In recent years, SRAM-based Field-Programmable Gate Arrays (FPGAs) have seen a surge in deployment within aerospace applications. Despite their widespread use, these FPGAs, particularly their embedded Static Random Access Memory (SRAM) and user logic, exhibit a notable susceptibility to Single Event Upsets (SEU), a phenomenon leading to erroneous connections or routing discrepancies. This paper presents an exhaustive survey of fault-tolerance methodologies pertinent to SRAM-based FPGAs operating in radiation-intensive environments. Initially, we delineate the architecture of the SRAM-based FPGAs, elucidating the mechanisms underlying SEU occurrences and their subsequent malfunctions. This is followed by a detailed exploration of various strategies employed to assess the resilience of SRAM-based FPGAs against SEU-related disruptions, mainly including the Triple Module Redundancy (TMR) and the configuration scrubbing technology. Collectively, this survey aspires to function as an instructive compendium for engineers and researchers specializing in the development of fault-tolerance mechanisms for SRAM-based FPGAs, particularly in the context of aerospace applications.

Logic-in-memory application of ferroelectric-based WS2-channel field-effect transistors for improved area and energy efficiency

In this study, we applied ferroelectrics to the gate stack of Field Effect Transistors (FETs) with a 2D transition-metal dichalcogenide (TMDC) channel, actively researching for sub-2nm technology node implementation. Subsequently, we analyzed the circuit characteristics of Logic-in-Memory (LiM) operation and utilized LiM features after applying ferroelectrics to achieve a single-device configuration. Based on well-calibrated simulations, we performed compact modeling in a circuit simulator to depict the temperature-dependent electrical characteristics of ferroelectric FETs with a double gate structure and 2D channel (DG 2D-FeFET) in sub-2nm dimensions. Through this, we have confirmed that the 2D FeFET-based LiM technology, designed for the 2 nm technology node, exhibits superior characteristics in terms of delay, power/energy consumption, and circuit area under all temperature conditions, compared to the conventional CMOS technology based on 2D FETs. This verification serves as proof of the future technological potential of 2D-FeFET in extremely scaled-down technology nodes.

Analyzing Various Structural and Temperature Characteristics of Floating Gate Field Effect Transistors Applicable to Fine-Grain Logic-in-Memory Devices.

Although the von Neumann architecture-based computing system has been used for a long time, its limitations in data processing, energy consumption, etc. have led to research on various devices and circuit systems suitable for logic-in-memory (LiM) computing applications. In this paper, we analyze the temperature-dependent device and circuit characteristics of the floating gate field effect transistor (FGFET) source drain barrier (SDB) and FGFET central shallow barrier (CSB) identified in previous papers, and their applicability to LiM applications is specifically confirmed. These FGFETs have the advantage of being much more compatible with existing silicon-based complementary metal oxide semiconductor (CMOS) processes compared to devices using new materials such as ferroelectrics for LiM computing. Utilizing the 32 nm technology node, the leading-edge node where the planar metal oxide semiconductor field effect transistor structure is applied, FGFET devices were analyzed in TCAD, and an environment for analyzing circuits in HSPICE was established. To seamlessly connect FGFET-based devices and circuit analyses, compact models of FGFET-SDB and -CSBs were developed and applied to the design of ternary content-addressable memory (TCAM) and full adder (FA) circuits for LiM. In addition, depression and potential for application of FGFET devices to neural networks were analyzed. The temperature-dependent characteristics of the TCAM and FA circuits with FGFETs were analyzed as an indicator of energy and delay time, and the appropriate number of CSBs should be applied.

Intelligent electroactive material systems with self-adaptive mechanical memory and sequential logic

By synthesizing the requisite functionalities of intelligence in an integrated material system, it may become possible to animate otherwise inanimate matter. A significant challenge in this vision is to continually sense, process, and memorize information in a decentralized way. Here, we introduce an approach that enables all such functionalities in a soft mechanical material system. By integrating nonvolatile memory with continuous processing, we develop a sequential logic-based material design framework. Soft, conductive networks interconnect with embedded electroactive actuators to enable self-adaptive behavior that facilitates autonomous toggling and counting. The design principles are scaled in processing complexity and memory capacity to develop a model 8-bit mechanical material that can solve linear algebraic equations based on analog mechanical inputs. The resulting material system operates continually to monitor the current mechanical configuration and to autonomously search for solutions within a desired error. The methods created in this work are a foundation for future synthetic general intelligence that can empower materials to autonomously react to diverse stimuli in their environment.

Binary and ternary logic-in-memory using nanosheet feedback field-effect transistors with triple-gated structure

In this study, we demonstrate binary and ternary logic-in-memory (LIM) operations of inverters and NAND and NOR gates comprising nanosheet (NS) feedback field-effect transistors (FBFETs) with a triple-gated structure. The NS FBFETs are reconfigured in p- or n-channel modes depending on the polarity of the gate bias voltage and exhibit steep switching characteristics with an extremely low subthreshold swing of 1.08 mV dec–1 and a high ON/OFF current ratio of approximately 107. Logic circuits consisting of NS FBFETs perform binary and ternary logic operations of the inverters and NAND and NOR gates in each circuit and store their outputs under zero-bias conditions. Therefore, NS FBFETs are promising components for next-generation LIM.

IGZO charge trap flash device for reconfigurable logic functions

We fabricated an indium gallium zinc oxide (IGZO) charge trap flash (CTF) device for logic-in-memory (LIM) applications. Initially, the nonvolatile memory characteristics of the IGZO CTF device were investigated under charge trapping and detrapping states in 104 s retention tests. Next, we constructed a common-source amplifier circuit containing the IGZO CTF device and demonstrated various input–output signal relationships by modulating the memory state of the device. Finally, we used interconnected IGZO CTF devices to demonstrate reconfigurable logic functions. Using series- and parallel-connected IGZO CTF devices, we developed 2-input NAND and 2-input NOR gates, respectively. Our experimental results showed that the IGZO CTF device is a promising future memory device and a tool for LIM technology.

Effect of metal insertion on the magnetic properties and anomalous Hall effect in MgO/CoFeB/Ta/MgO films

CoFeB-based nano-magnetic multilayers can be applied in magnetic sensors, magnetic random access memory and other logic devices, which have attracted wide attention. The magnetic properties and interface structure of the magnetic multilayers still need further research for future applications. The effects of Pt insertion on the perpendicular magnetic anisotropy (PMA) and the anomalous Hall effect (AHE) of MgO/CoFeB/Pt/Ta/MgO multilayers were studied. It is found that the sample with 0.2 nm Pt insertion at the CoFeB/Ta interface and annealed at 250 °C can transform the films from in-plane magnetic anisotropy to PMA. The effective magnetic anisotropy K eff can reach 1.82 × 106 erg cm−3. The Pt insertion and annealing heat treatment can promote the migration of oxygen from MgO at the top layer to CoFeB/Ta interface and combine with Fe to generate iron oxide, and improve the orbital hybridization of Fe 3d and O 2p, thus successfully inducing the PMA of the film samples. In addition, Pt insertion and annealing treatment can improve the side-jump mechanism and the skew scattering mechanism which contribute to the AHE. This work provides guidance for the application of PMA materials in magnetic sensor and memory devices.

Logic-in-memory application of silicon nanotube-based FBFET with core-source architecture

The performance of a silicon nanotube-based feedback field-effect transistor (SiNT FBFET) with a core-source architecture has been explored in this work for the use in logic-in-memory (LIM) applications. Both n-channel and p-channel FETs with extremely symmetric transfer characteristics and a high ON/OFF current ratio of 109 are implemented in a single structure using the core and outer gates. SiNT FBFET exhibits significant data retention attributes during memory operations for up to 103 s. The SiNT FBFET-based inverter circuit retains output logic states of “1” and “0” for 1.705 s and 1.948 s, respectively, at megahertz operating frequency without standby power consumption. Additionally, SiNT FBFET has also been used to build ternary NAND/NOR logic gates with memory functionality. Numerical mixed-mode simulations of the circuits have been carried out using the commercially available Synopsys “Sentaurus” TCAD tool for examining the performance and memory characteristics of SiNT FBFETs. This study demonstrates the possible use of SiNT FBFET in multivalued logic systems and the development of next-generation memory devices.

Analytical expression of negative differential thermal resistance in a macroscopic heterojunction

Heat flux (J) generally increases with temperature difference in a material. A differential coefficient of J against temperature (T) is called differential thermal conductance (k), and an inverse of k is differential thermal resistance (r). Although k and r are generally positive, they can be negative in a macroscopic heterojunction with positive T-dependent interfacial thermal resistance (ITR). The negative differential thermal resistance (NDTR) effect is an important effect that can realize thermal transistor, thermal memory, and thermal logic gate. In this paper, we examine analytical expressions of J, k, r, and other related quantities as a function of parameters related to thermal conductivity (κ) and ITR in a macroscopic heterojunction to precisely describe the NDTR effect.