Maximum Breakdown Voltage Research Articles

Design and experimental verification of a novel high-reliability variation of lateral doping (VLD) termination

Abstract A novel two-dimensional mesh-like variation of lateral doping (VLD) termination (M-VLD) is proposed, which modifies the conventional ring-shaped track VLD termination (R-VLD) mask into an interconnected mesh-like structure. The comparative simulations and experiments show that M-VLD can achieve better blocking capability and reliability than R-VLD. Vertical double diffusion MOSFET (VDMOS) with M-VLD achieves a maximum breakdown voltage ( B V max ) of 1588 V, which is 62 V higher than that of VDMOS with R-VLD. Furthermore, the devices with M-VLD exhibit lower leakage currents in 150 °C reverse-biased I − V test and successfully pass 1000 h-125 °C-1200 V high-temperature reverse bias (HTRB) test, while the devices with R-VLD fail to pass both tests.

Expanding the dose window of step-etched space-modulated JTE for ultrahigh voltage 4H-SiC devices

A step-etched space-modulated junction termination extension (SE-SM-JTE) is proposed for ultrahigh voltage (≥10 kV) 4H-SiC devices in this work. The proposed structure creates a stepped effective JTE dose profile by introducing the step etching into space-modulated JTE (SM-JTE), which shows great merits in the compromises of the JTE dose window, termination efficiency, termination area, and the complexity of the fabrication process. According to the TCAD simulation results, the SE-SM-JTE with a length of 300 μm (3 times the drift layer thickness) obtains a wide implantation dose window of ±47 % above 12 kV, achieving a wide tolerance to JTE dose and surface fixed charge. The maximum breakdown voltage (BV) of the proposed SE-SM-JTE is 13.8 kV, exhibiting a termination efficiency of 92 %. Moreover, the proposed JTE structure requires only a single ion implantation and subsequent two etchings, which facilitates the fabrication feasibility in ultrahigh voltage 4H-SiC devices.

Optimal design of pseudo-vertical Schottky diode with n-type junction terminal extension structure

In the study, a pseudo-vertical Schottky barrier diode (pVSBD) with n-type junction terminal extension (JTE) is proposed. The impacts of key parameters, including cover distance, junction depth, and stretch distance, are evaluated on the electrical characteristics of the designed pVSBD. In the designed device, the homoepitaxial pn-junction constructed with n-type JTE and p- drift layer can reshape the electric field and alleviate the electric field crowding around the corner of Schottky contact, which enables the p- drift layer withstand the higher reverse bias voltage. Thus, the blocking capacity of the pVSBD device is improved, and the maximum breakdown voltage of 2885 V can be obtained. Meanwhile, it is also shown that the doping concentration of n-type diamond termination can influence the electrical characteristics obviously. The trade-off between the breakdown voltage and the specific ON-state resistance is considered in the paper. The pVSBD device with high blocking voltage can be realized based on the proposed pVSBD structure.

Optimization of Two‐Zone Step‐Etched Junction Termination Structures for Vertical GaN Power Devices

One of the key elements of vertical high‐voltage GaN‐based devices is a properly designed junction termination extension (JTE) structure. One of the approaches to the fabrication of JTE structures is the use of p‐type epitaxial layers and their appropriate shaping to obtain high values of breakdown voltage. In this work, optimization of two‐zone (TZ) step‐etched JTE structures for vertical GaN power devices using technology computer aided design simulations is presented. Two constructions of the device are used, with a single‐zone (SZ‐JTE) and TZ‐JTE (TZ‐JTE) structure. The dependence of the breakdown voltage of SZ‐JTE structure is very sensitive to its thickness. The maximum breakdown voltage of 1654 V is obtained for the SZ‐JTE thickness of 110 nm. The use of a TZ‐JTE with an appropriate segment thickness ratio allows for a breakdown voltage above 75% of the theoretical value (≈1500 V) for a much wider range of JTE thicknesses and to achieve higher values of the breakdown voltage, reaching ≈96% of the theoretical value (1887 V). Finally, the performed simulations allow to map the full dependence on the thickness of the TZ‐JTE areas (2D‐map) and to determine the process window leading to the breakdown voltage above 1500 V.

Analysis of breakdown voltage for GaN MIS-HEMT with various composite field plate configurations and passivation layers

The effects of different field plate designs on the breakdown voltage of GaN Metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs) were examined in this study. The study's primary goal was to determine the dependence of breakdown voltage with respective to composite field plate designs using TCAD simulation. For devices featuring only G-FP, with a fixed gate to drain distance of 15 μm and a fixed G-FP to drain distance of 15 μm, the maximum breakdown voltage was achieved 1 μm G-FP. Breakdown voltage trends were also determined for composite field plate configurations, such as adding a source field plate (S-FP) or a drain field plate (D-FP) with a fixed 1 μm G-FP length. A further enhancement in device breakdown performance was demonstrated by employing a novel D-FP structure. A single D-FP improves the breakdown voltage from 1.4 kV (conventional breakdown voltage with 1um G-FP) to 1.6 kV when combined with 1 μm G-FP, while the novel two-step D-FP achieves a breakdown voltage of about 1.7 kV when combined with 1 μm G-FP. We also investigated the influence of high-k dielectric passivation layers on the breakdown voltage. The breakdown voltage of the devices with optimized G-FP can be further improved by using high-k dielectric material as a passivation layer. The thorough investigations contribute to a better understanding of GaN MIS-HEMT breakdown characteristics and prospective pathways for improving their performance via unique field plate designs and superior dielectric materials.

Mechanistic insights into the thermal–mechanical aging of the interface of cross‐linked polyethylene/silicone rubber

AbstractCable accessory has the interface formed by cross‐linked polyethylene (XLPE)/silicone rubber (SiR), which is prone to surface discharge and thus causes the failure of cable system. This article conducts the simulated experiment of thermal–mechanical aging on the interface of XLPE/SiR. The interfacial breakdown and dielectric properties under different aging states are analyzed. It is found the interfacial aging process of XLPE can be divided into the recrystallization stage and the oxidation reaction stage. The former contributes to the interfacial roughness and thus the better insulating performance, whereas the latter leads to degradation of interface, and thus the worse insulating performance. In addition, combined with the established electric field model for the interface, the differences between thermal–mechanical aging and individual thermal aging on the interface are discussed. The sample under thermal–mechanical aging reaches the maximum interfacial breakdown voltage later than that under individual thermal aging, but their performance tends to be consistent in the later stage of aging.

Nano‐BN/Nano‐TiO2and micro Mg(OH)2loaded hybrid ethylene propylene diene monomer elastomer composites for outdoor high‐voltage insulation application

AbstractThis work deals with the synthesis, characterization of hybrid ethylene propylene diene monomer (EPDM) composites loaded with nano‐boron nitride (nano‐BN)/nano‐titanium dioxide (nano‐TiO2) and micro Mg(OH)2particles for its suitability towards high‐voltage insulation application. The elastomer samples were prepared by carefully dispersing the micro and nano fillers during the mastication process of EPDM polymer using a two roll mill, followed by vulcanization. The samples were characterized for mechanical, morphological, thermal, and electrical insulation properties. The highest tensile strength among the composite samples was noted for 1 phr nanoparticles loaded samples. Fourier Transform Infrared (FTIR) results show no change in the chemical moiety upon addition of nano‐BN/nano‐TiO2in EPDM composites. Enhancement in hydrophobicity is observed for 3 phr nano‐TiO2loaded composites, which shows a maximum static contact angle of 110°. Meanwhile remarkable enhancement in the thermal conductivity and volume resistance of the composites are contributed to the addition of nano‐BN, thereby achieving maximum dielectric breakdown voltage (i.e., ~21 kV/mm for EMB3). Scanning electron microscope images and atomic force microscopy (AFM) topography highlight that low concentration (i.e., 1 phr) based composites have homogeneous dispersion in matrix and excessive nano filler addition deteriorates properties by forming filler aggregates and increasing surface roughness.

Parameter Optimization Design of the Commutation Circuit of a Hybrid DC-Current-Limiting Circuit Breaker

Aimed at the optimization design of the parameters of the commutation circuit of a hybrid DC-current-limiting circuit breaker (HDCCLCB), a parameter selection model considering the short-time withstand of the thyristor and the volume of the commutation circuit is proposed by simplifying the object, and the commutation circuit parameters were preliminarily obtained. In order to verify the correctness of the method of selecting the commutation circuit parameters, the circuit simulation model of the HDCCLCB was built. The experimental platform was built, and the breaking experiment was completed under the fault condition with the current rising rate of 20 A/μs. The correctness of the simulation model and parameter design method was verified by comparing the circuit model simulation results with the experimental results. In order to further optimize the parameters of the commutation circuit, a mathematical model for optimization design was established. Taking the maximum critical breakdown voltage under unit capacitance energy as the objective function, the arcing time before commutating and the current-limiting inductance and capacitance are enumerated to obtain the optimized commutation circuit parameters. By comparing this result with the result of the preliminary design, the objective function is improved by 20.7%, laying a solid foundation for further research and the development of current-limiting circuit breakers for medium-voltage DC systems.

1.7-kV vertical GaN p-n diode with triple-zone graded junction termination extension formed by ion-implantation

Edge termination has emerged as an important area in the design and realization of vertical GaN power electronic devices. While the material properties of GaN are promising for high-performance devices, in practice the breakdown voltage can be compromised by inadequate edge termination (ET). While solutions in other materials (e.g. Si, SiC) are well-known, these are challenging to implement in GaN due to inherent difficulties in p-type doping GaN. In this work, we report a etch-free triple-zone graded junction termination extension (JTE) for vertical GaN diodes formed by Nitrogen ion implantation. The triple-zone design offers lower peak fields for effective field control. In addition, the proposed triple-zone JTE is beneficial for increasing the fabrication process window and allowing for more variability in epitaxial wafer growth in terms of p-GaN doping and thickness while maintaining high breakdown voltage. The fabricated GaN p-n diodes with triple-zone JTE obtain a maximum breakdown voltage of 1.73 kV with specific on-resistance Ron of 0.4 mΩcm2. Temperature-dependent reverse characteristics show that the devices have a positive temperature coefficient of the breakdown voltage indicating an avalanche breakdown mechanism. These results suggest that vertical GaN p–n diodes with N-implanted triple-zone JTE are promising for power applications.

(Invited) Fabrication and Device Performance of 2.7 Kv/2.5A NiO/Ga2O3 Heterojunction Power Rectifiers

In this study, The fabrication of a p-n junction NiO/Ga2O3 rectifier in which we employ a bilayer NiO structure with two different doping levels to achieve both high breakdown voltage and low on-state resistance was described. The band alignment of the NiO to the Ga2O3 was measured. Selective wet and dry etch processes for removing NiO from the underlying Ga2O3 was developed. Finally, the dc and switching performance of the rectifiers was characterized. The maximum breakdown voltage was 2.7 kV for a 1 mm diameter rectifier, with 2.5 A forward current and on/off ratio > 108 over a broad range of switching voltages. The reverse recovery time was limited by the measurement circuit but was < 100 µs. These results show the promise of heterojunction rectifiers based on Ga2O3 for future generations of power switching applications. Figure 1

(Invited) NiO/ β-(Al x Ga1-x )2O3 /Ga2O3 Heterojunction Lateral Rectifiers with Reverse Breakdown Voltage > 7kV

There is significant recent interest in development of Ga2O3 power devices due to their capability for high temperature operation, reduced on-state and switching losses due to lower on-resistance for high voltage devices, and potentially higher frequency switching capability. These are targeted for renewable energy transmission systems, electric vehicle (EV) traction inverter and motor control systems, fast charging stations and more electric aircraft. Since the efficiency of EV powertrain inverters is partially determined by the efficiency of the switching transistors, it is of interest to examine ultra-wide-bandgap semiconductor electronics. The successful development of these power transistors is expected to significantly increase the longevity of a battery charge and the resultant cost of an EV.In this work, NiO/ β-(Al x Ga1-x )2O3 /Ga2O3 heterojunction lateral geometry rectifiers with diameter 50-100 µm exhibited maximum reverse breakdown voltages >7kV, showing the advantage of increasing the bandgap using the β-(Al x Ga1-x )2O3 alloy. This Si-doped alloy layer was grown by Metal Organic Chemical Vapor Deposition with an Al composition of ~20%. On state resistances were in the range 50-2180 Ω.cm2, leading to power figures-of-merit up to 0.72 MW.cm-2. The forward turn-on voltage was in the range 2.3-2.5 V, with maximum on/off ratios >700 when switching from 5V forward to reverse biases up to -100V. Transmission line measurements showed the specific contact resistance was 0.12 Ω.cm2. The breakdown voltage is among the highest reported for any lateral geometry Ga2O3-based device. Figure 1

A novel substrate Voltage-assisted RESURF technique in SOI LDMOS with a heavily doped drift region

A novel substrate voltage-assisted (SVA) reduced surface field (RESURF) technique in SOI lateral double-diffused Metal-Oxide-Semiconductor (LDMOS) with a heavily doped drift region is proposed. Without any additional masks and processes, an external control circuit is designed to adaptively control the substrate voltage in the technique. The co-simulation based on TCAD and the circuit is implemented to explore the mechanism of the SVA RESURF technique. In the off-state, a negative bias is applied to the substrate, which induces positive charges to compensate for the heavily doped ionizing acceptors in the drift region. The breakdown voltage is improved and remains at the same level as the conventional RESURF device. In the on-state, a zero bias is applied to the substrate, and heavy doping in the drift region can achieve low specific on-resistance compared to the RESURF device with a lightly doped drift region. As a result, the proposed technique reconstructs the charge balance and the conventional RESURF condition. The simulation results show reduced specific on-resistance, low drain leakage current, large saturation current, high transconductance and cut-off frequency, decreased turn-on/off characteristics and improved FOM and BFOM compared with the conventional RESURF technique. Furthermore, an analytical model is developed to optimize the substrate voltage for the maximum breakdown voltage in the external control circuit design of the proposed technique.

β-Ga2O3 MOSFETs electrical characteristic study of various etching depths grown on sapphire substrate by MOCVD

β-Ga2O3 thin films with both a 45 nm Si-doped conductive epilayer and unintentionally doped epilayer were grown on c-plane sapphire substrate by metalorganic chemical vapor deposition. β-Ga2O3 based metal–oxide–semiconductor field-effect transistors (MOSFETs) were fabricated with gate recess depths of 20 nm and 40 nm (it indicated gate depth with 70 nm and 50 nm, respective), respectively, and without said recessing process. The conductivity of β-Ga2O3 epilayers was improved through low in situ doping using a tetraethoxysilane precursor to increase MOSFET forward current density. After recessing, MOSFET operation was transferred from depletion to enhanced mode. In this study, the maximum breakdown voltage of the recessed 40 nm transistor was 770 V. The etching depth of a recessed-gate device demonstrates its influence on device electrical performance.

Ultra-high voltage silicon pixel sensor with less soft-breakdown for X-ray free electron laser

X-ray free electron laser (XFEL) requires operation of an advanced silicon pixel sensor (SPS) under ultra-high voltage for detection of fast electron–hole pairs. In this study, a high-voltage tolerant SPS is designed and fabricated by considering suppressing the soft-breakdown of the current collection ring (CCR) and increasing the breakdown voltage of the pixel array after dicing the sensor. It is found that a soft-breakdown behavior of CCR in one diced SPS occurred before a hard breakdown happening in the pixel and it may cause the degradation of maximum hard breakdown voltage in pixel region, which, in particular, turns worse as the increasing of the number of guard rings. An optimized method with the expansion of the non-sensitive area is used to effectively prevent the occurrence of soft-breakdown and increase the operation voltage of the SPS. Ultimately, a high performance SPS with a maximum breakdown voltage exceeding 1000 V and reversed leakage of ∼1.5 pA per pixel at bias 500 V is obtained. Together with the optimized multi-guard ring structure, a record ultra-high avalanche breakdown voltage of over 2100 V is obtained, which provides a promising approach to develop ultra-fast detector in an XFEL.

Ion-implanted triple-zone graded junction termination extension for vertical GaN p-n diodes

We demonstrate an ion-implanted triple-zone junction termination extension (JTE) for vertical GaN p-n diodes. Due to the spatial distribution of fixed charge in the triple-zone JTE structure, the peak electric fields at the contact metal edge and at the edge of the JTE are significantly reduced compared to conventional approaches. The forward and reverse characteristics of diodes with conventional single-zone JTE and the triple-zone JTE explored here have been studied and compared experimentally. GaN p-n diodes fabricated using the triple-zone JTE obtain an experimentally measured maximum breakdown voltage of 1.27 kV, appreciably higher than the 1.01 kV achieved using the single-zone JTE structure. The triple-zone JTE design also provides a wider window for fabrication processing and epitaxial wafer growth to achieve the high breakdown voltage compared to single-zone designs. The triple-zone JTE is promising for cost-effective fabrication of GaN power electronics.

(Invited) NiO/ β-(Al x Ga1-x )2O3 /Ga2O3 Heterojunction Lateral Rectifiers with Reverse Breakdown Voltage > 7kV

NiO/ β-(Al x Ga1-x )2O3 /Ga2O3 heterojunction lateral geometry rectifiers with diameter 50-100 µm exhibited maximum reverse breakdown voltages >7kV, showing the advantage of increasing the bandgap using the β-(Al x Ga1-x )2O3 alloy. This Si-doped alloy layer was grown by Metal Organic Chemical Vapor Deposition with an Al composition of ~21 %. On state resistances were in the range 50-2180 Ω.cm2, leading to power figures-of-merit up to 0.72 MW.cm-2. The forward turn-on voltage was in the range 2.3-2.5 V, with maximum on/off ratios >700 when switching from 5V forward to reverse biases up to -100V. Transmission line measurements showed the specific contact resistance was 0.12 Ω.cm2. The breakdown voltage is among the highest reported for any lateral geometry Ga2O3-based rectifier.

NiO/β-(AlxGa1−x)2O3/Ga2O3 heterojunction lateral rectifiers with reverse breakdown voltage &amp;gt;7 kV

NiO/β-(AlxGa1−x)2O3/Ga2O3 heterojunction lateral geometry rectifiers with diameter 50–100 μm exhibited maximum reverse breakdown voltages &amp;gt;7 kV, showing the advantage of increasing the bandgap using the β-(AlxGa1−x)2O3 alloy. This Si-doped alloy layer was grown by metal organic chemical vapor deposition with an Al composition of ∼21%. On-state resistances were in the range of 50–2180 Ω cm2, leading to power figures-of-merit up to 0.72 MW cm−2. The forward turn-on voltage was in the range of 2.3–2.5 V, with maximum on/off ratios &amp;gt;700 when switching from 5 V forward to reverse biases up to −100 V. Transmission line measurements showed the specific contact resistance was 0.12 Ω cm2. The breakdown voltage is among the highest reported for any lateral geometry Ga2O3-based rectifier.

Enhanced Performance of Series Microexploding Bridge Planar Discharge Switch Integrated With Exploding Foil

To achieve the low energy, miniaturization, and low cost of the exploding bridge foil initiator, single and series microexploding bridge planar discharge switch (MEB-PDS) coplanar and cocathode integrated with exploding bridge foil is fabricated by magnetron sputtering and photolithography forming etching in this work. The maximum electrostatic field strength and breakdown voltage of the MEB-PDS are calculated by multiphysics field theory. The breakdown voltage, conduction performance, MEB electrical explosion performance, and integrated exploding foil initiator (EFI) of the MEB-PDS have been tested. The relationship between breakdown voltages and design parameters, variation law between conduction time and design parameters, operating voltages and trigger voltages, and the matching between operating voltages and trigger voltages of MEB-PDS are analyzed. The results show that the breakdown voltages of single-bridge and three-series MEB-PDS can meet the insulation requirements at the operating voltage. The plasma clouds generated by the three-series MEB-PDS converge and superimpose, which results in its better conduction performance and operating reliability than single MEB-PDS. Based on the optimization of MEB structure parameters, the breakdown voltage of the three-series MEB-PDS is 2.848 kV at a trigger voltage of 0.600 kV. The 50% ignition voltage sensitivity U (50%) of the corresponding integrated exploding foil initiator is 1.191 kV, and the 99.9% ignition voltage sensitivity U (99.9%) is 1.269 kV. Compared with other types of spark gap discharge switches, U (99.9%) is reduced by 11.07%. The trigger voltage of the switch is reduced from ∼1.5 to 0.6 kV.

Physical design guidelines to minimize area-specific ON-resistance for rated ON-current and breakdown voltage of GaN power HEMTs

In this article, we report on the development of an analytical model to estimate area-specific ON-state resistance (R ds,on) of GaN-based power high electron mobility transistor (HEMT) using rated device specifications—ON-state drain current (I ON) and maximum operating drain-to-source voltage (V DSO)—as input parameters. The rated I ON and V DSO are considered as fractions k and S, of the maximum possible drain current (I DS,max) and breakdown voltage (V BR), respectively, deliverable by the power device. The developed model is utilized to obtain the optimal physical design space parameters for a comb-like power HEMT design. Due consideration has been given to the trade-off between R ds,on and area-specific R ds,on of the transistor, device processing limitations for all the physical device parameters. The developed model has been validated with experimental results of prior literature. Our calculations impose a lower-bound for the best possible R ds,on as well as the area-specific on-resistance product (R ds,on AA) that can be obtained for a given starting channel sheet resistance in the comb architecture for a desired I ON − V DSO rating.

Analysis of Operational Characteristics of AlGaN/GaN High-Electron-Mobility Transistor with Various Slant-Gate-Based Structures: A Simulation Study.

This study investigates the operational characteristics of AlGaN/GaN high-electron-mobility transistors (HEMTs) by applying a slant-gate structure and drain-side extended field-plate (FP) for improved breakdown voltage. Prior to the analysis of slant-gate-based HEMT, simulation parameters were extracted from the measured data of fabricated basic T-gate HEMTs to secure the reliability of the results. We suggest three different types of slant-gate structures that connect the basic T-gate electrode boundary to the 1st and 2nd SiN passivation layers obliquely. To consider both the breakdown voltage and frequency characteristics, the DC and RF characteristics of various slant-gate structures including the self-heating effect were analyzed by TCAD simulation. We then applied a drain-side extended FP to further increase the breakdown voltage. The maximum breakdown voltage was achieved at the FP length of 0.4 μm. Finally, we conclude that the slant-gate structures can improve breakdown voltage by up to 66% without compromising the frequency characteristics of the HEMT. When the drain-side FP is applied to a slant-gate structure, the breakdown voltage is further improved by up to 108%, but the frequency characteristics deteriorate. Therefore, AlGaN/GaN HEMTs with an optimized slant-gate-based structure can ultimately be a promising candidate for high-power and high-frequency applications.