Main Circuit Research Articles

Interpretable Anomaly Detection in the LHC Main Dipole Circuits With Nonnegative Matrix Factorization

Interpretable Anomaly Detection in the LHC Main Dipole Circuits With Nonnegative Matrix Factorization

A Real-Time Fault Diagnosis Method for Grid-Side Overcurrent in Train Traction System Using Signal Time Series Feature Pattern Recognition

Grid-side overcurrent (GSOC) is a common anomaly state in traction drive system (TDS). Once GSOC occurs, to protect the train, traction control units (TCU) will trip the main circuit breaker and stop the train in a short time. Since TCU cannot locate the source of the GSOC fault, troubleshooting can only be done by inspecting the components one by one after the train stops, which greatly affects the availability and maintenance efficiency of train. Therefore, this paper proposes a real-time fault diagnosis method based on time series feature pattern recognition of signals in TCU. Firstly, the time series pattern of GSOC caused by different fault sources are established. Secondly, the feature extraction method of time series pattern is carried out based on the fusion of engineering knowledge, variational mode decomposition and signal selection. Thirdly, the time series feature patterns of GSOC are identified to determine the most likely fault type of GSOC by Gaussians mixture model-Hidden Markov model (GMM-HMM). Finally, the proposed real-time fault diagnosis method is verified by the field test data. The results show that the proposed algorithm can realize real-time diagnosis of GSOC and trace the fault source effectively.

Study of hybrid energy storage system with energy management for electric vehicle applications

This paper conducts an in-depth study on the on-board energy storage system for electric vehicles. We analyze the advantages and disadvantages of domestic and foreign energy storage systems including battery, flywheel, superconductor and supercapacitor. We propose a hybrid energy storage system composed of battery and supercapacitor as the on-board power supply system. It adopts a two-phase staggered parallel bidirectional DC-DC converter as the main control circuit of the storage system. And we adopt the power outer loop and current inner loop control strategy. Then the rate limiter prevents the sudden change of battery power and realizes that the instantaneous power is provided by the supercapacitor individually. The purpose is to extend the battery life and achieve the purpose of reasonable and efficient utilization of energy. Finally, the simulation verification is carried out by Matlab/Simulink. And the results show that the energy management strategy is more efficient for both power and energy management, which meets the design expectation and achieves better experimental results.

A Feature Vector Learning-Based Method for Diagnosing Main Circuit Ground Faults in Electrical Traction Drive Systems

A Feature Vector Learning-Based Method for Diagnosing Main Circuit Ground Faults in Electrical Traction Drive Systems

Design of Short Circuit Detection and Destruction Equipment for Electronic Components and Circuits

This research aims to design and understand the working principles of short circuit detection and destruction devices in electronic circuits and components. The short circuit detector and destroyer uses a voltage injection method which is applied to the electronic circuit path and detects short components. Changes in temperature, voltage and current values produced by the DC Buck Converter were observed using supporting fluids, namely rosin and wax. The results obtained on electronic components and circuits are more efficient using liquid wax compared to liquid rosin (Flux). This tool is designed to use a DC Buck Converter as the main circuit and a Volt Meter as a voltage display and can be used effectively to detect short circuits, check DC voltage values, source DC voltage input and increase the voltage value on the battery (1.3-12 VDC).

Finite Element Analysis of Different Transverse Flux Linear Induction Motor Models to Improve the Performance of the Main Magnetic Circuit

This paper delves into the knowledge of transverse flux linear induction motors using three-dimensional finite element simulation tools. Original linear induction motors have a useful magnetic flux perpendicular to the movement. We propose some geometric changes to improve the main magnetic circuit of the machine and to ensure simultaneous operation between longitudinal and transverse magnetic fluxes. To obtain the main parameters of the equivalent electrical circuit in a steady state, we propose two steps. Firstly, replicate the classic indirect tests used in rotating machines. This represents a significant advantage since it allows several models to be experimentally tested to obtain the values of electrical parameters. Secondly, use the data from these tests to solve a particular system of equations using numerical methods. The solution provides the electrical elements necessary to generate the equivalent circuit proposed by the authors. A quantitative analysis of the main electrical parameters is also carried out, confirming the advantages of the changes introduced. With them, a significant improvement in thrust force is obtained, especially in stationary conditions and low speeds. Finally, we study, in detail, a set of specific phenomena of linear machines using two parameters: the secondary equivalent air gap and the secondary equivalent conductivity.

DEVELOPMENT OF DC-DC BUCK CONVERTER FOR SOLAR PANEL ENERGY STORAGE THROUGH LOAD OPTIMIZATION AND FEEDBACK CIRCUIT

Solar panels are crucial components in converting sun radiation into electrical energy through the photovoltaic effect. A solar panels cannot be connected directly to the load due to its low energy conversion efficiency and low output voltage. One of the methods used to control solar cells to operate efficiently at their maximum power point is MPPT. In this paper, we design a DC-DC converter by modifications of the Butterworth filter circuit and feedback circuit in the MPPT system for storing solar panel electrical using the Hill Climbing (HC) method. The device consists of a DC-DC buck converter circuit, two pieces of INA219 sensors, a DS18B20 temperature sensor, a MAX44009 light intensity sensor, a SD card module and a DS3231 RTC. The DC-DC buck converter circuit simulation is carried out to determine the optimal load. The load optimization was conducted by analyzing the AC simulation using Ltspice software. The magnitude of the output voltage ripple in nine different loads was observed. From the simulations performed, it was found that the 50 Ω load has an output voltage ripple of 8.96 mV and is smaller than the other loads. The main DC-DC buck converter circuit is designed using a butterworth low pass filter with a cut-off frequency of 1000 Hz (R = 50 Ω, L = 33.8 mH and C = 750 nF) and a feedback circuit with a cut-off frequency of 500 Hz is added. From the prototype measurement, it was found that the average output power was 3249,7 milliwatts and the average input power was 4779 milliwatts, thus the average efficiency was 68%. With these results, the DC-DC converter circuit configuration is suitable for use in electrical energy storage systems from solar panels that have high efficiency.

An Energy-Feed Type Split-Capacitor Three-Phase Four-Wire Power Electronic Load Compatible with Various Load Demands

Energy-feed power electronic loads can precisely control the phase and magnitude of the power supply output current, achieving the emulation of loads. Moreover, they can feed energy back to the grid for energy regeneration, demonstrating significant research value. This article proposes an energy-fed power electronic load topology and control method that can realize the static and dynamic simulation of linear and non-linear loads and take into account the simulation needs of single-phase, three-phase three-wire, and three-phase four-wire loads. The main circuit uses a two-stage back-to-back AC/DC/AC structure: the front side is a three-phase four-wire split capacitor PWM rectifier bridge, which is used to simulate loads under various operating conditions; the back side is a three-phase three-wire PWM inverter bridge, which realizes the energy feeding back to the grid and reduces the waste of energy; and the intermediate side uses a split capacitor to equalize the voltage and achieve voltage stabilization. The topology is analyzed under the simulation demands of three-phase balanced, three-phase unbalanced, single-phase and non-linear loads. Finally, a MATLAB(R2022a)/Simulink simulation platform is built for a power electronic load with a rated capacity of 200 kVA. The simulation results verify the effectiveness, feasibility, and advancement of the power electronic load proposed in this article.

Electrical impedance tomography: a review on hardware systems and circuits

Abstract Electrical impedance tomography (EIT) is a widely used functional imaging technology in the field of biomedical engineering with the characteristics of non-radiation, high temporal resolution, real-time, miniaturization, and low cost, but with relatively poor spatial resolution, which makes it become an effective complementary imaging alternative in conjunction with structural imaging technologies such as MRI and CT for bedside monitoring. The hardware systems and circuits (HSC) are the physical basis for EIT, and have major impacts on imaging speed, accuracy, cost and other key performance specifications. This review attempts to provide researchers with a relatively comprehensive picture of HSC for different EIT systems, which is organized as follows. Firstly, the general EIT hardware systems are classified as serial, fully parallel and semi-parallel types, respectively, according to their hardware architecture. Secondly, the main analogy front-end circuits of EIT hardware systems are summarized, in which the current drive circuits are divided into open loop, linear closed-loop and nonlinear closed-loop based on different feedback types. Thirdly, the common error sources and evaluation indicators on EIT measurements are summarized. Finally, the future development trends and research challenges of EIT are discussed. This review is expected to promote the development of EIT technology, especially on the design of HSC.

A Mechanism and Data Hybrid-Driven Method for Main Circuit Ground Fault Diagnosis in Electrical Traction System

Ground faults can be caused by abnormal grounding of several different modules in the electrical traction drive system, leading to vulnerable train operation. Therefore, rapid and accurate diagnosis of ground faults is of great significance to improve safety and reliability of electric locomotives and electric multiple units (EMU). This paper proposes a mechanism and data hybrid driven method to diagnose the ground faults. Firstly, according to ground fault mechanism analysis, characteristic variables are constructed and several fault features are extracted by using signals selected from existing control system. Secondly, according to historical data, the probability membership function associated with fault features and typical ground fault types is established offline by fuzzy logic theory. Then, the probability information of fault features is fused using Dempster-Shafer (D-S) evidence theory and a decision-making method based on the basic probability number is applied to classify faults. Finally, field experiments are performed and the results show that compared with canonical correlation analysis (CCA) based method and on-board fault diagnosis method, the proposed method has better performance in the presence of large measurement noise and transient condition changes, and it is also promising for practical applications.

Cascade tri-neuron hopfield neural network: Dynamical analysis and analog circuit implementation

This paper studies a cascade tri-neuron Hopfield neural network (CTN-HNN) with no connection between the first neuron and the third neuron. Such incompletely connected neuronal structure may be part of complex neural networks with negligible inputs, and may be present in abnormal neural networks with some neurological diseases. It was proved that the stable point, limit cycle, single-scroll chaotic attractor and double-scroll chaotic attractor were observed in the network by adjusting the synaptic weight from the second neuron to itself. To further dynamic analysis, we first demonstrate that this three-dimensional (3D) autonomous nonlinear dynamical system is symmetric about the origin and bounded ultimately, and has one unstable saddle-focus zero point and two symmetric nonzero points with different stability types. Afterwards, taking two synaptic weights as adjustable parameters, the numerical analysis reveals that the CTN-HNN exhibits coexisting chaotic and periodic attractors, coexisting bursting firings and long-term transient chaos by employing multiple numerical methods. Finally, an analog printed circuit is built using one main circuit module and three activation function modules, thus effectively demonstrating the complex dynamics of the network.

A Novel Refined Regulation Method with Modified Genetic Commutation Algorithm to Reduce Three-Phase Imbalanced Ratio in Low-Voltage Distribution Networks

The three-phase imbalance in low-voltage distribution networks (LVDNs) seriously threatens the security and stability of the power system. At present, a standard solution is automatic phase commutation, but this method has limitations because it does not address the branch imbalance and premature convergence or instability of the commutation algorithm. Therefore, this paper proposes a novel refined regulation commutation system, combined with a modified optimized commutation algorithm, and designs a model and simulation for feasibility verification. The refined regulatory model incorporates branch control units into the traditional commutation system. This effectively disperses the main controller’s functions to each branch and collaborates with intelligent fusion terminals for precise adjustment. The commutation algorithm designed in this paper, combined with the above model, adopts strategies such as symbol encoding, cubic chaotic mapping, and adaptive adjustment based on traditional genetic algorithms. In addition, in order to verify the effectiveness of the proposed method, this paper establishes a mathematical model with the minimum three-phase imbalance and commutation frequency as objectives and establishes a simulation model. The results of the simulation demonstrate that this method can successfully lower the three-phase imbalance of the low-voltage distribution network. It leads to a decrease of the main circuit’s three-phase load imbalance rate from 27% to 6% and reduces each branch line’s three-phase imbalance ratio to below 10%. After applying the method proposed in this paper, the main and branches circuit three-phase imbalance are both lower than the limit ratio of the LVDNs, which can improve the quality and safety of electricity consumption. Additionally, the results also prove that the commutation algorithm under this method has faster convergence speed, better application effect, and better stability, which has promotion and application value.

Retracted: Main Circuit Topology and Electromagnetic Interference of Electric Vehicle Bidirectional Charger

Retracted: Main Circuit Topology and Electromagnetic Interference of Electric Vehicle Bidirectional Charger

Research on the current compensation mechanism of FJTL in ERSFQ

Energy-efficient rapid single flux quantum (ERSFQ) devices have unique energy advantages with a power consumption of less than 0.001fJ per single-bit switch, even considering the energy required for the refrigeration system, achieving ultra-low energy consumption of sub-fJ/bit. Combined with its typical operating frequency in the tens of GHz range, ERSFQ circuits have the potential to realize computing chips with extremely high computational power and energy efficiency, making them highly promising for applications in the post-Moore era. However, the performance improvement of ERSFQ circuits faces two challenges. One is how to reduce the size of their feeding Josephson transmission line (FJTL), which is required to stabilize the voltage bias of the ERSFQ circuits. The second challenge is how to improve their bias margin. The measured bias margin of ERSFQ circuits is relatively smaller than for Rapid Single Flux Quantum (RSFQ) circuits. This study investigates the current compensation mechanism of the FJTL and derives a formula for the compensating current ΔI in the main logic circuit by each pulse input to the FJTL. Based on the formula, a method is proposed to enhance the bias margin of ERSFQ circuits while reducing the size of FJTL by applying feeding pulses into the FJTL. We applied this method to an 8-bit ERSFQ shift register (SR), where the size of its FJTL is 4 JTLs (each JTL consists of 2 Josephson junctions). The measurement demonstrated an improvement of the bias margin from [84 %, 104 %] to [38 %, 104 %], confirming the feasibility of the proposed method. Furthermore, by comparing the measurement results of an 8-bit ERSFQ SR, where the size of its FJTL is 6 JTLs, it is demonstrated that applying this method can also reduce the size of the FJTL while maintaining a large margin.

Solar Radiation Tracking Design Based on Photoelectric Sensor for Tracing Signal Reconstruction Algorithm

Due to the high precision, low power requirements, and maintenance-free nature, the four-quadrant photoelectric sensor (FQPS) and the laser displacement sensor are employed in the development of the two-axis solar tracker. Among them, when designing the optical path of the FQPS, a cavity-wandering optical path is introduced to control the spot size of the direct sunlight falling on the sensor. The sensor interface has five data transmission lines, of which four positive poles correspond to the four quadrants of the planar two-dimensional coordinate system. AD7793 is used as the signal collector and a differential amplifier with small clutter is integrated. A laser displacement sensor is installed in the solar radiation tracker to realize the self-correction of movement error. The main control circuit adopts DSP chip TMS320F28335 for the whole dual-axis sun tracker. In the experiment, Code Composer Studio was used for development, and SPA algorithm was used to measure the position. A number of error correction variables, such as year, month, day, time, minute, second, ΔT, time zone, longitude, latitude, etc., are added to the algorithm. After debugging the hardware and software, the sunrise and sunset times of a certain place on the solar terms such as spring equinox, summer solstice, autumn equinox and winter solstice in 2022 are tested, and compared with those released by the Meteorological Bureau. The tracking signal is rebuilt using proximal gradient descent technology. The results demonstrate that the signal-to-noise ratio under the reconstruction algorithm is continuously enhanced and tends to stabilize with an increase in sampling rate without noise, and it exhibits good signal reconstruction performance in the presence of noise and growing noise.

A single-phase full-bridge soft-switching inverter circuit with an auxiliary resonant circuit

A new topological structure is proposed in this article for the traditional single-phase full-bridge inverter circuit by adding an auxiliary synchronizing resonant circuit. Without extra switching transistors, the complexity of the control circuit is simplified while enabling zero voltage switching (ZVS) functionality. The significance of this proposed topology is that the switching transistors of all bridge arms are sharing one common synchronizing unit which is constructed with an absorbing inductor and capacitor. In this way, the added-on components can be substantially reduced for the main switching transistor circuit. By utilizing a big-volume capacitor as the constant voltage source, the sourceless energy feedback unit can minimize the switching losses. In the meantime, the proportional-resonant feedback circuit can modify the sinusoidal pulse width modulation (SPWM) duty ratio to stabilize the output current. In the PSIM power electronic simulation software environment, the operation of the soft-switching inverter circuit is analyzed to demonstrate our proposed topology can reduce the on-off switching losses as expected for the switching transistors of the soft-switching inverter circuit.

Research on dual‐winding permanent magnet generator system with integrated dual‐channel controller

AbstractThis article presents a dual‐winding permanent magnet generator (PMG) system with integrated dual‐channel controller to meet the requirements of high power density, high reliability, and high output performance of aircraft electric power system. The dual‐winding of the PMG are designed to have the same phase spatially, with which the same rotor position can be applied in independent vector control. In addition, a dual‐channel controller is applied to control the two sets of windings, which achieves high‐performance control under normal state and fault‐tolerant control under fault state. The integrated dual‐channel controller integrates two sets of main power circuits into one controller and uses a main control unit, which simplifies the PMG system leading to reduction in the overall volume and weight. Reliability analysis of dual‐winding PMG system is proposed to be compared with that of the single‐winding PMG system. A dual‐winding cooperative control strategy and a fault‐tolerant control strategy are proposed to achieve high‐performance control of DC‐link voltage under normal condition and redundant functions under fault condition. As a result, the reliability of the PMG system is improved. The experimental results validate the effectiveness of the proposed PMG system and the control strategy.

Presynaptic gating of monkey proprioceptive signals for proper motor action

Our rich behavioural repertoire is supported by complicated synaptic connectivity in the central nervous system, which must be modulated to prevent behavioural control from being overwhelmed. For this modulation, presynaptic inhibition is an efficient mechanism because it can gate specific synaptic input without interfering with main circuit operations. Previously, we reported the task-dependent presynaptic inhibition of the cutaneous afferent input to the spinal cord in behaving monkeys. Here, we report presynaptic inhibition of the proprioceptive afferent input. We found that the input from shortened muscles is transiently facilitated, whereas that from lengthened muscles is persistently reduced. This presynaptic inhibition could be generated by cortical signals because it started before movement onset, and its size was correlated with the performance of stable motor output. Our findings demonstrate that presynaptic inhibition acts as a dynamic filter of proprioceptive signals, enabling the integration of task-relevant signals into spinal circuits.

Molecular Mechanisms Underpinning Immunometabolic Reprogramming: How the Wind Changes during Cancer Progression.

Metabolism and the immunological state are intimately intertwined, as defense responses are bioenergetically expensive. Metabolic homeostasis is a key requirement for the proper function of immune cell subsets, and the perturbation of the immune-metabolic balance is a recurrent event in many human diseases, including cancer, due to nutrient fluctuation, hypoxia and additional metabolic changes occurring in the tumor microenvironment (TME). Although much remains to be understood in the field of immunometabolism, here, we report the current knowledge on both physiological and cancer-associated metabolic profiles of immune cells, and the main molecular circuits involved in their regulation, highlighting similarities and differences, and emphasizing immune metabolic liabilities that could be exploited in cancer therapy to overcome immune resistance.

Design of current steering logic CMOS circuit

The current-mode CMOS technology has many positive identities, while traditional current-mode CMOS circuits designing methods is comparatively more complex than voltage-mode CMOS. In this paper, using threshold logic, a current-mode CMOS circuits designing method based on spectral techniques is proposed. The proposed method is capable of designing combinational logic current-mode CMOS circuits. The sequential logic current-mode CMOS circuits can also be designed with the designed combinational logic current-mode CMOS circuit. The designed circuit is steered only by current signals. By using both simulations and real circuit tests, we proved the effectiveness of the proposed circuit designing method. Using HSPICE simulations, the designed circuit is proven to have advantages including lower circuit power consumption and higher stability of the current through power supply compared with voltage-mode CMOS and other main current-mode CMOS circuits, and the designed circuits require less control signals than other major current-mode CMOS circuits.