Low Leakage Current Density Research Articles

Comparative study of Single Crystal (SC)-Diamond and 4H-SiC bulk radiation detectors for room temperature alpha spectroscopy

In this work, the fabrication, electrical characterization and alpha spectral characterization of single-crystal (SC) diamond bulk radiation detector have been carried out. The performance metrics of the SC-diamond bulk detector such as the leakage current density, charge collection efficiency, spectral resolution and polarization effects are studied and are compared with a bulk detector fabricated using High-Pure Semi-Insulating (HPSI) 4H-SiC. It is found that the SC-diamond detector exhibits lower leakage current density, higher μτ product, better spectral resolution and no polarization effects in comparison to the HPSI 4H-SiC detector. The time response analysis of the SC-diamond detector is carried out to study the effect of alpha particles on the operation of the SC-diamond detector. Accordingly, the stability of the SC-diamond detector is tested by evaluating the total counts versus real time and the performance of the diamond detector is found to be stable during the alpha-time spectroscopy. Hence, diamond bulk detectors using commercially available electronic grade diamond may be better suited for alpha particle spectroscopy compared to HPSI 4H-SiC of nearly equivalent thickness.

Seed layer mediated growth of high dielectric and low leakage BaTiO3 thin film using two-step sputtering process

In this study, we demonstrated the seed layer mediated growth of high-quality BaTiO3 (BTO) thin films using a two-step radio frequency (RF) magnetron sputtering process. Since the as-grown BTO thin films obtained by RF magnetron sputtering at the deposition temperatures of 300–500 °C were amorphous with a low dielectric constant of 20, it is necessary to develop a fabrication process for obtaining crystalline high-k BTO thin films without sacrificing other film properties such as morphology and leakage current. First, it was revealed that ex-situ post-deposition annealing (PDA) at high temperatures in the 700–800 °C range led to the crystallization of BTO films and a high dielectric constant of 121. However, the film morphology deteriorated significantly during PDA, and consequently, a high leakage current was observed due to the rough and discontinuous surface containing voids and micro-cracks. To achieve an excellent leakage current characteristic as well as a high dielectric constant for a crystalline BTO thin film, in-situ crystallization was carried out through local epitaxial growth using a crystalline seed layer. The crystalline BTO seed layer was formed by annealing a 5-nm-thick amorphous BTO film at 700 °C on which the in-situ crystallized BTO main layer was deposited at 500 °C. The in-situ crystallization method resulted in a smooth and uniform surface and a high dielectric constant of 113. In addition, the in-situ crystallized BTO film exhibited a low leakage current density of 10−6 A/cm2 (at 0.8 V) displaying an improvement by a factor of 103 compared to the ex-situ crystallized BTO film.

High-quality remote plasma enhanced atomic layer deposition of aluminum oxide thin films for nanoelectronics applications

Here, we report comprehensive investigations of aluminum oxide (Al2O3) high-κ gate oxides deposited via remote plasma enhanced atomic layer deposition (Re-PEALD) with mesh configuration in a commercial 100 mm ALD reactor. Trimethylaluminum (Al(CH3)3), dioxygen (O2) plasma, and Argon (Ar) are used as the metal precursor, oxidant, and carrier/purge, respectively. The growth rate per cycle and non-uniformity of Al2O3 thin films is analyzed with the variation in duration of (Al(CH3)3) pulse, O2 plasma, post-precursor purge, post-oxidant purge, RF power, and substrate temperature. High-quality monolayer type Al2O3 thin films with a growth rate of ~ 1.1 Å/cycle are achieved for a wide temperature range from ~ 100 °C to ~ 300 °C suitable for various nanoelectronics applications ranging from flexible substrates to low thermal budget and high mobility alternate semiconductor substrates. Further, the Al/Re-PEALD-Al2O3/p-Si, metal-oxide-semiconductor (MOS) structures are investigated for capacitance-voltage, capacitance-frequency, and leakage current-voltage characteristics to demonstrate the quality of Re-PEALD-Al2O3 thin films. The Al/Re-PEALD-Al2O3/p-Si, MOS structures revealed excellent electrical characteristics with ultralow minimum interface trap density (Dit) ~ 9.9 × 109 eV−1cm−2, negative effective oxide charges (Neff) ~ 5.52 × 1012 cm−2, low leakage current density of ~ 4.1 nA/cm2 at −1 V, hysteresis-free, insignificant Vth shift, and trivial frequency dispersion. Moreover, the chemical analysis using XPS depth profiling disclosed that Re-PEALD deposited Al2O3 thin films results in a high-quality gradient Al2O3/SiOx/Si interface rather than an abrupt Al2O3/Si interface, and the oxygen rich thin films due to the oxygen (O2−) interstitials close to the interface are the sources of negative fixed oxide charges in Re-PEALD-Al2O3/Si, system. These results intend to boost the investigations of Re-PEALD Al2O3 ultrathin films for low thermal budget high mobility alternate semiconductor substrates for nanoelectronics applications.

Impact of electrode materials on microstructure, leakage current and dielectric tunable properties of lead-free BSZT thin films

Lead-free ferroelectric sol-gel thin films derived from barium strontium titanate (Ba0.85Sr0.15Zr0.1Ti0.9O3, BSZT) were deposited onto two types of electrode: (i) noble metallic Pt- and (ii) conductive oxides LaNiO3- and SrRuO3-coated silicon substrates. The present studies demonstrate that electrode materials impact significantly on morphology, crystallographic orientation, lattice mismatch-induced microstrains and electrical properties of BSZT thin films. Highly (100)-textured BSZT thin films with the highest crystallinity and lowest microstrain were found on conductive oxide electrodes, whereas Pt electrodes showed polycrystalline. Capacitors with oxide LaNiO3 electrode display predominated Schottky emission with a rather low leakage current density ~4.68 × 10−8 A/cm2, while Pt electrode capacitors indicate space-charge limited conduction. Dielectric characterizations in the frequency range of 103–5 × 106 Hz and the dc electric field up to ±800 kV/cm show that the permittivity, loss tangent, and tunability of BSZT films also strongly depend on the electrode materials used. The optimal dielectric tunability with a large figure of merit (FOM ≈ 22.53) and low dielectric loss (tanδ ≈ 2.9%), was found to be 66% for BSZT thin films on the conductive LaNiO3 electrode, suggesting that the as-deposited ferroelectric films are promising candidates for applications in tunable microwave elements and related electronic devices.

Increasing Stability of SnO2-Based Perovskite Solar Cells by Introducing an Anionic Conjugated Polyelectrolyte for Interfacial Adjustment.

Despite the fact that power conversion efficiency (PCE) has been greatly improved in recent years, perovskite solar cells (PSCs) need to overcome some challenges, like stability, for the commercial application. Herein, an anionic conjugated polyelectrolyte, sulfonic-containing polyfluorene (abbreviated to SPF), has been developed to modify the interface between the electron-transporting layer (ETL) SnO2 and the optoelectronic active layer MAPbI3 in the n-i-p cells. After 40 days of storage in atmospheric environment in the dark with exposure to a controlled humidity of about 10%, PCE of the SPF-modified cells with the structure of ITO/SnO2/SPF/MAPbI3/spiro-OMeTAD/Au still remained 94% of the initial value. In contrast, the control cell without SPF only remained 31.1% of its initial efficiency after 29 days. The main reason for the stability enhancement is the adjustment of interfacial energy level, the crystallinity enhancement, and the removal of the interfacial defect of the perovskite layer by introducing the hydrophobic and smooth SPF interfacial layer. Deep electrical study on the PSCs discloses that the cell has low carrier transfer resistance, low leakage current density, and minor interfacial charge accumulation. What's more, the short-circuit current density is improved, and PCE of 20.47% is achieved.

Enhanced temperature stable dielectric response and high dielectric strength observed in (CaZr)0.65(SrTi)0.35O3 thin film

Crystalline (CaZr)0.65(SrTi)0.35O3 (CSZT) thin film was prepared on Pt/SiO2/Si substrate by using RF-magnetron sputtering. The XRD result shows that the CSZT thin film has an orthorhombic perovskite structure. The uniform, dense and crake -free cross-section morphology and surface morphology of CSZT thin film are verified by Scanning electron microscope (SEM) and Atomic force microscope (AFM), respectively. The dielectric response depends on frequency, voltage and temperature were investigated experimentally. A record-small temperature coefficient of capacitance (TCC), ~ −23.3 ppm/°C, is achieved ranging from −55–205 °C in the (CaZr)0.65(SrTi)0.35O3 thin films. All the prepared (CaZr)0.65(SrTi)0.35O3 thin films show a very low leakage current density of 1.1 × 10−7 A/cm2 at the bias voltage of 80 V(0.88 MV/cm) at room temperature and also an enhanced dielectric constant (εr~56.4) and a low tan δ of 0.003 at 1 MHz. The results show that the (CaZr)0.65(SrTi)0.35O3 thin film should be a great potential thin film material for advanced thin film capacitor applications.

Spin-coating for fabrication of high-entropy high-k (AlTiVZrHf)Ox films on Si for advanced gate stacks

Spin-coating was performed to fabricate amorphous high-entropy oxide (HEO) (AlTiVZrHf)Ox films on Si substrates. The films were evaluated through X-ray photoelectron spectroscopy and through transmission electron microscopy (TEM)-based energy-dispersive spectroscopy (EDS) mapping, which respectively revealed all constituent elements and the homogenous distributions and no aggregation of those elements. TEM analysis revealed four distinct layers—a crystalline Al metal gate, an amorphous Al2O3 interfacial layer, amorphous (AlTiVZrHf)Ox, and native amorphous SiO2—in a patterned metal–oxide–semiconductor (MOS) gate stack on the Si substrate. The resulting stack exhibited a low leakage current density (JL) and no frequency dispersion in its capacitance–voltage characteristics after undergoing forming gas annealing. The obtained dielectric constant (k ≈ 32) for the HEO film is promising for advanced gate stacks and transistor applications. Although the film exhibited minor nanocrystallinity and the stack exhibited no interfacial Al2O3 layer after rapid thermal annealing at 900 °C, a low JL, distinct layers, and a clearly defined interface between the (AlTiVZrHf)Ox and SiO2 were observed, indicating no substantial diffusion among these layers. EDS mapping revealed the homogenous distribution of each constituent element without aggregation. Medium-entropy-oxide films and their MOS devices were fabricated for comparison; however, they exhibited inferior performance.

One‐Step Fabricated and Solution‐Processed Hybrid Gate Dielectrics for Low‐Voltage Organic Thin‐Film Transistors

Here, we report the facile one‐step fabrication of rationally designed hybrid gate dielectric films for low‐voltage organic thin‐film transistors. To generate facile one‐step fabricated and solution‐processed organic–inorganic hybrid dielectric films with high dielectric properties, we designed the multicomponent precursor solution by employing high‐k oxide materials to attain a large capacitance and cross‐linkable agents to allow for processability and reducing the surface energy of dielectric films. After spin‐coating with the precursor solution and the subsequent thermal annealing process, we obtained cross‐linked organic–inorganic hybrid dielectric films, exhibiting excellent dielectric properties with a low leakage current density (~10−5 A/cm2) and high capacitance (295 nF/cm2). The effectiveness of the hybrid dielectrics was demonstrated by realizing high‐performance organic thin‐film transistors at low operating voltages, mobility up to 0.31 cm2/V/s, high on/off current ratio (~105), and low threshold voltage (−0.8 V).

Formation and characterization of holmium oxide on germanium‐based metal‐oxide‐semiconductor capacitor

The influence of different thermal oxidation/nitridation durations (5, 10, 15, and 20 minutes) at 400°C for transforming metallic Ho sputtered on Ge substrate in N2O gas ambient have been systemically investigated to develop Ho2O3/Ge based on metal-oxide-semiconductor (MOS) device. The structural and chemical properties of the film were characterized using X-ray diffraction spectroscopy, X-ray photoelectron spectroscopy (XPS), and high-resolution transmission electron microscopy. Cubic-Ho2O3 dielectric layer has been formed along with sandwiched interfacial layer (IL) between substrate Ge and high-k interface comprising tetragonal-GeO2, GeOx, and cubic-Ge3N4 compounds. Energy band alignment for Ho2O3/IL/Ge MOS stack has been determined from XPS spectrum where 10-minute sample exhibited maximum conduction band offset, ΔEc ~ 2.47 eV and valance band offset, ΔEv ~ 4.67 eV, inducing lower leakage current density, J ~ 10−5 A cm−2 at the higher electrical breakdown, EBD ~ 8.59 MV cm−1. The electrical results of this sample also revealed higher dielectric constant k ~ 13.60, lowest effective oxide charge, slow trap density, and interface trap density which has been attributed to the confinement of Ho2O3 dielectric interface and densification Ge3N4 interfacial compound. An oxidation/nitridation model related to Ho2O3/IL/Ge stack growth is being proposed. It has been anticipated that Ho2O3 could serve as a gate dielectric oxide for Ge-based MOS systems such as a capacitor.

Two stage sintering behaviour of Er2O3 doped high performance ZnO varistors

High performance Er2O3 doped ZnO-V2O5 based varistors were prepared by two stage sintering (TSS) method at T1 = 1050 °C for 1/6 h and T2 = 750 and 800 °C for 2.5, 10, 20 and 40 h duration. The microstructural features and electrical properties were studied by XRD, SEM, EDS and a high voltage source unit. The combined effect of TSS and Er2O3 doping is very beneficial to restrain the grain coarsening of varistors. The effect of grain size reduction on nonlinear electrical properties was investigated. The results showed that superior electrical properties were obtained in doped samples via TSS than single stage one. A typical fine-grained (1.7 μm, 97.5 %TD) varistor with sufficiently high nonlinear exponent (α = 154), breakdown field (EB = 15.2 kV cm−1) and reasonably low leakage current density (JL = 0.13 mA cm-2) could be prepared with 0.5 mol.% Er2O3 doping at an optimum sintering condition of T1/T2 = 1050/750 °C for 40 h.

Solution-processed amorphous gallium oxide gate dielectric for low-voltage operation oxide thin film transistors

Here, gallium oxide (Ga2O3) thin films were investigated as gate dielectric for thin-film transistors (TFTs) using the solution process method. The optical, microstructure, morphology, oxygen vacancy defect states and electrical performance metrics of Ga2O3 thin films annealed at different stages of temperature were explored. The excellent dielectric property of amorphous Ga2O3 thin films was found, but it was deteriorated after crystallization when the annealing temperature increased. The optimized Ga2O3 thin film exhibits a low leakage current density of 1.9 × 10–6 A cm−2 at 1.5 MV cm−2 and a large dielectric constant of 10.8. Furthermore, low-voltage operation oxide TFTs were demonstrated using this optimized amorphous Ga2O3 as gate dielectric. The device exhibits excellent bias stress stability with a high mobility of 8.5 cm2/Vs, a threshold voltage of -1.4 V, a current on/off ratio of 104 and a subthreshold swing of 0.41 mV/Dec.

Enhanced ferroelectric properties of (Zn, Ti) equivalent co-doped BiFeO3 films prepared via the sol-gel method

High-quality BiFe1-2xZnxTixO3 (BFZTO with x = 0, 0.01, 0.02, 0.03, 0.04, and 0.05) films were successfully prepared on fluorine-doped tin oxide (FTO)/glass substrates via the sol-gel method. The influence of (Zn, Ti) equivalent co-doping on the structure, surface morphology, and ferroelectric properties of BFZTO films was investigated systematically. X-ray diffraction (XRD) and Raman spectra analysis indicate that co-doping results in structural transformations. Scanning electron microscope (SEM) images show that BFZTO films with x = 0.02 exhibit uniform fine grains and higher density, which is instrumental for the development of ferroelectric properties. X-ray photoelectron spectroscopy (XPS) analysis reveals that BiFe0.96Zn0.02Ti0.02O3 film can inhibit the conversion of Fe3+ into Fe2+, thereby greatly reducing oxygen vacancy concentration. Therefore, under the electric field strength of 150 kV/cm, BiFe0.96Zn0.02Ti0.02O3 film was found to have the lowest leakage current density, J = 1.13 × 10−6 A/cm2, which is five orders of magnitude lower than that of pure BiFeO3 (BFO) film. Furthermore, this film exhibits the largest remnant polarization at room temperature, Pr = 131.9 μC/cm2, which is more than twice as large as that of pure BFO (Pr = 52.6 μC/cm2). Additionally, by comparing P-E hysteresis loops of different regions on the surface of BiFe0.96Zn0.02Ti0.02O3 film, it was found that the film has high uniformity and stable overall performance. Dielectric and magnetic properties were also enhanced via (Zn, Ti) co-doping.

Mn-doped (Bi0.5Na0.5) TiO3 thin film with low leakage current density and high ferroelectric performance

Mn-doped (Bi0.5Na0.5) TiO3 thin film with low leakage current density and high ferroelectric performance

Comparison of high-k Y2O3/TiO2 bilayer and Y-doped TiO2 thin films on Ge substrate

Y2O3/TiO2 bilayer thin films and Y-doped TiO2 (YTO) thin films were deposited on a Ge substrate by atomic layer deposition at a substrate temperature of 250 °C. They were used as gate insulators to examine the electrical properties of Pt/TiN/TiO2/Y2O3/p-Ge and Pt/TiN/YTO/p-Ge metal–oxide–semiconductor capacitors. A 7 nm thick bilayer thin film showed a lower leakage current density by more than one order of magnitude compared to a YTO thin film with the same thickness due to the high conduction band offset between the Y2O3 layer and Ge substrate. However, the bilayer thin film showed a large hysteresis of 950 mV. On the other hand, the YTO thin film showed significantly reduced hysteresis of 120 mV due to the smaller slow trap density. The voltage acceleration factors of the bilayer thin film and YTO thin film were 1.12 and 1.25, respectively, higher in the YTO thin film. The interfacial trap density of the 7 nm thick bilayer and YTO thin films were 3.5 × 1011 cm−2 eV−1 and 2.7 × 1011cm−2 eV−1, respectively. The equivalent oxide thickness of the YTO film could be scaled down to 0.9 nm, and a leakage current density of 1.4 × 10−4A cm−2 at flat band voltage −1 V was achieved. This study confirmed that the YTO film can be used as a promising ternary high-k oxide for a Ge-based field-effect-transistor.

Relaxation peaks of ZnO varistors and their correlations with electrical properties

Many dielectrics exhibit a (polarization) relaxation response when a time-varying electric field is applied. In some frequency bands, the amplitude of the polarization changes rapidly, with a significant dielectric loss; the maxima in the change rate are referred to as relaxation peaks. ZnO varistors exhibit a dielectric response with several relaxation peaks, but the relationship between the relaxation peaks and electrical properties has not been established. To understand this relationship, dielectric spectroscopy measurements of ZnO varistors were conducted in the temperature range of −110 °C to 200 °C in the frequency range of 10−1–106 Hz. By changing two important dopants of Bi2O3 and Sb2O3, four relaxation peaks, named Peak A, Peak B, Peak C, and Peak D, were detected. It was found that peaks A, B, and D are indispensable for higher nonlinearity and lower leakage current density. The detection of all four peaks implies that ZnO varistors possess excellent electrical properties, that is, a high breakdown field (235.2 V mm−1), nonlinear coefficient (76.2), and low leakage current density (0.065 μA cm−2).

Inverted-Type InAlAs/InAs High-Electron-Mobility Transistor with Liquid Phase Oxidized InAlAs as Gate Insulator.

An inverted-type InAlAs/InAs metal-oxide-semiconductor high-electron-mobility transistor (MOS-HEMT) with liquid phase oxidized (LPO) InAlAs as the gate insulator is demonstrated. A thin InAs layer is inserted in the sub-channel layers of InGaAs to enhance the device performance. The proposed inverted-type InAlAs/InAs MOS-HEMT exhibits an improved maximum drain current density, higher transconductance, lower leakage current density, suppressed noise figures, and enhanced associated gain compared to the conventional Schottky-gate HEMT. Employing LPO to generate MOS structure improves the surface states and enhances the energy barrier. These results reveal that the proposed inverted-type InAlAs/InAs MOS-HEMT can provide an alternative option for device applications.

High‐Current‐Density Enhancement‐Mode Ultrawide‐Bandgap AlGaN Channel Metal–Insulator–Semiconductor Heterojunction Field‐Effect Transistors with a Threshold Voltage of 5 V

Enhancement‐mode ultrawide‐bandgap Al0.65Ga0.35N/Al0.4Ga0.6N metal–insulator–semiconductor heterojunction field‐effect transistors are demonstrated using fluorine‐plasma treatment for threshold voltage control and Al2O3 as gate dielectric. The device exhibits a threshold voltage of 5 V, a maximum drain current density of 105 mA mm−1, and a transconductance of 19 mS mm−1. In addition, the capability to achieve low off‐state current density at 3–4 × 10−9 mA mm−1, an exceptionally low gate leakage current density of 1.4 × 10−8 mA mm−1 even at a high forward gate bias of VGS = 12 V, and a current on/off ratio >1010 is shown. Small signal measurement shows that the device has a unity current gain cutoff frequency fT of 3.8 GHz and power gain cutoff frequency fmax of 4.5 GHz.

Low Leakage and High Forward Current Density Quasi-Vertical GaN Schottky Barrier Diode With Post-Mesa Nitridation

In this brief, a high-performance quasi-vertical GaN Schottky barrier diode (SBD) on sapphire substrate with post-mesa nitridation process is reported, featuring a low damaged sidewall with extremely low leakage current. The fabricated SBD with a drift layer of 1 μm has achieved a very high ON/OFF current ratio (ION/IOFF) of 1012 with a low leakage current of ~10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-9</sup> A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> @-10 V, high forward current density of 5.2 kA/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> at 3 V in dc, a low differential specific ON-resistance (RON,sp) of 0.3 mΩ·cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , and ideality factor of 1.04. In addition, a transmission-line-pulse (TLP) I-Vtest was carried out and 53 kA/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> at 30 V in pulsed measurement was obtained without device failure, exhibiting a great potential for high power applications.

Graphene oxide charge blocking layer with high K TiO2 nanowire for improved capacitive memory

Glancing angle deposition technique was adopted to fabricate TiO2 nanowire (NW) over spin coated graphene oxide (GO) thin-film (TF) for capacitive memory application. The formation of hybrid structure was studied using field emission scanning electron microscope. High accumulation capacitance of 0.994 nF/cm2 at 7 MHz frequency was obtained for fabricated Au/TiO2 NW/GO TF/Si device as compared to Au/TiO2 NW/Si device (0.4014 nF/cm2). A theoretical study using delta depletion model was done, which further validated the relative permeability and flat band voltage of the devices at higher frequency. The memory window of Au/TiO2 NW/Si was found to be 1.36 V at±10 V, which increased to 3.72 V for Au/TiO2 NW/GO TF/Si hybrid device. Also, a large charge storage capacity with good retention (105 s) and endurance (1000 cycles) was observed for the hybrid device. Moreover, Au/TiO2 NW/GO TF/Si device exhibited low leakage current density of 1.6 µA/cm2 at +1 V as compared to Au/TiO2 NW/Si device (11.3 µA/cm2 at +1 V). The GO TF layer at the bottom increased the potential difference between TiO2 and GO, which acted as a charge trapping layer and thus demonstrated as a good candidate for non-volatile memory application.

Tuning the electrical performance of solution-processed In2O3TFTs by low-temperature with HfO2-PVP hybrid dielectric

Here in, we investigated the solution-processed and hysteresis-free indium oxide (In2O3) thin-film transistors (TFTs) fabricated with hafnium oxide-poly(vinyl)phenol (HfO2-PVP) hybrid thin film as gate dielectric by a low temperature sol-gel method. The hybrid dielectric thin film exhibits unique dielectric properties of a low leakage current density of 1.2 × 10−8 A/cm2, gate areal capacitance of 44.4 nF/cm2 and a dielectric constant (k) of 6.5 at 1 kHz. In addition, the hybrid films show a high-quality homogeneous and pin-hole free surface with a low surface roughness (Rq) of 0.75-nm and display a low surface energy of 36.7 mJ/m2 with hydrophobic behavior. This dielectric material is then used used in In2O3 TFTs as the gate insulator. Here, the In2O3 semiconductor as the channel layer is examined at 200 °C and 230 °C temperatures for TFT characteristics. The final TFT device fabricated at 230 °C showed much improved electrical performance with the mobility (μsat) of 2.6 cm2/V.s, Ion/Ioff ratio of 105, subthreshold swing (SS) of 330 mV/dec, threshold voltage (VT) of 0.1 V at a low operating voltages because of a better interface between dielectric and semiconductor with fewer charge carriers traps. This study could be an effective approach for the next generation of all-solution fabrication of TFTs that could play a vital role in optoelectronics applications.