Low-voltage Circuit Research Articles

2D NUMERICAL SIMULATION OF MAGNETIC FIELD IN LOW-VOLTAGE CIRCUIT BREAKER

Low Voltage Circuit Breakers is used for the switching process in power distribution and control system. This process is accompanied by the occurrence of the electric arc between the fixed and mobile contact pieces of the apparatus. The electric arc is introduced into the quenching chamber formed of ferromagnetic iron splitter plates, divided into short arcs and then the arc may extinguish after passing the current through zero. Behavior of the electric arc in the extinguishing chamber influences the performance of these devices, the ferromagnetic material leading to the improvement of these performances. This article presents the calculation of the magnetic field components in the extinguishing chamber of the low-voltage circuit breaker of the 2000 A, 690 V manufactured by Schneider Electric and to describe the physical phenomenon and mathematical calculation of the electric arc in LVCB. The Ansys Multiphysics program is used to determine the spectrum of magnetic field components. This program is based on the finite element method for solving Maxwell equations.

Experimental Study on Splitter Plate for Improving the Dielectric Recovery Strength of Low-Voltage Circuit Breaker

The low-voltage circuit breakers are widely used to protect loads in the distribution system. Interruption reliability of circuit breakers is important because they are a protective device close to the customer. In particular, the re-ignition phenomenon leads to over-current blocking failure due to the arc re-formed between electrodes despite the normal trip of the circuit breaker. In this paper, in order to improve the interruption performance against re-ignition, the dielectric recovery voltage measurement system of the circuit breaker is used and the experiment of changing the splitter plate is carried out. Two experiments are carried out by changing the splitter plate, especially changing the material of splitter plate and the number of lower plates of the splitter plate. In the case of changing the material of the splitter plate, the analysis is conducted according to the thermal conductance. In the case of changing the number of lower plates of the splitter plate, the number of plates and their spacing are variables. Analyzing the results of the dielectric recovery voltage experiment, in the initial period, copper plates have the best value that shows 102.1% improvement compared to normal and Al shows 59.8% improvement compared to normal. These increases are related to the thermal conductivity of the three electrode materials. In the case of changing the number of lower plates of the splitter plate, the 8-plates and 9-plates show 84.5% and 36.1% increases compared to normal, respectively, in the initial period. It can be seen that too many plates interfere with heat dissipation. Since this study studies performance improvement during the initial period, there is not much difference in the later period. This is consistent with the experimental results. In this study, an experimental basis is provided for the dielectric recovery strength from a low-voltage circuit breaker. It is expected that this will contribute to the research to improve the dielectric recovery capability of the circuit breaker.

Robust and Latch-Up-Immune LVTSCR Device with an Embedded PMOSFET for ESD Protection in a 28-nm CMOS Process

Low-voltage-triggered silicon-controlled rectifier (LVTSCR) is expected to provide an electrostatic discharge (ESD) protection for a low-voltage integrated circuit. However, it is normally vulnerable to the latch-up effect due to its extremely low holding voltage. In this paper, a novel LVTSCR embedded with an extra p-type MOSFET called EP-LVTSCR has been proposed and verified in a 28-nm CMOS technology. The proposed device possesses a lower trigger voltage of ~ 6.2 V and a significantly higher holding voltage of ~ 5.5 V with only 23% degradation of the failure current under the transmission line pulse test. It is also shown that the EP-LVTSCR operates with a lower turn-on resistance of ~ 1.8 Ω as well as a reliable leakage current of ~ 1.8 nA measured at 3.63 V, making it suitable for ESD protections in 2.5 V/3.3 V CMOS processes. Moreover, the triggering mechanism and conduction characteristics of the proposed device were explored and demonstrated with TCAD simulation.

Molded Case Electronically Assisted Circuit Breaker for DC Power Distribution Systems

This article introduces a new dc hybrid circuit breaker (HCB) concept termed electronically assisted circuit breaker (EACB). A conventional ac mechanical molded case circuit breaker (MCCB) is used to interrupt dc fault currents with the assistance of an electronic commutation circuit, which is activated for a short time period only during the late phase of the breaking process. Unlike other prior art HCB concepts, the EACB uses a conventional thermal-magnetic MCCB baseline design with minimal modification on the actuation mechanism, arc chamber, or form factor, and uses an electronic commutation circuit, which only needs to commutate a fault current far below its peak value for a very short duration (~100 μs), both contributing to significant cost savings. Other advantages of the EACB concept include self-powered and autonomous operation, simple installation, inherently low on-resistance, and galvanic isolation. While an EACB does not facilitate arc-free or ultrafast breaking, it does provide a simple and cost-effective way to enhance the dc current interruption capability of the conventional ac MCCBs, which currently dominate the low voltage circuit breaker market. The EACB concept has been validated both experimentally and by simulation. Several 600Vdc/250A (nominal) EACB prototypes are designed and tested. They have experimentally demonstrated a fault current interruption capability of over 8000 A at a dc voltage of 600 V within 6 ms.

Адаптер-трансивер для ВЧ-аппаратуры PLC-технологий

The paper analyses the features of PLC technologies and describes the circuitry solutions for HF equipment adapters used and their operation modes. It also proposes a new type of transceiver adapters based on a new construction principle that implements a magnetoelectric effect in the structure of a composite. One of the main components of the proposed adapters, which actually translates the HF information signal into the phase wires of the power line, is a ferrite core. The physical effects underlying the operation of the proposed transceiver adapter are analyzed. The main distinguishing feature of the proposed adapter is the absence of transformer and galvanic connections between the high-voltage power line of the power supply network and low-voltage information circuits, which ensures that the effect of the operational high voltage of the power supply line on the low-voltage circuits of HF equipment is blocked. This allows for an easy integration of the proposed version of the adapter-transceiver into standard HF equipment for PLC technologies, boosting the level of its function. The developed new types of adapter-transmitter and adapter-receiver were experimentally tested as part of an experimental fire alarm system, which uses two types of transmission channels: based on wireless technologies employing a radio channel and a PLC technologies-based one.

Modeling and Suppression of Electromagnetic Interference Noise on Motor Resolver of Electric Vehicle

Electromagnetic interference (EMI) couplings between motor drive system and resolver circuit induce considerable EMI noise in resolver, which has a serious impact on the excitation and feedback signals of resolver. In order to suppress the EMI noise effectively, it is necessary to study the coupling mechanism between the motor drive system and the resolver circuit. In this article, an EMI estimation model of resolver is proposed. An electric vehicle motor drive system is used for analysis. Coupling effects between permanent-magnet synchronous machine and variable reluctance resolver are investigated and modeled. Impedance measurement and numerical simulation are used to extract model parameters. Based on the estimation model, the conversion of common-mode (CM) noise to differential-mode (DM) noise in resolver circuit is analyzed. The estimation model is validated by comparing simulated results and measured results. Then, a CM choke is designed in the resolver circuit to suppress the coupled EMI noise. This modeling method is applicable for analyzing the EMI noise coupling between motor drive system and other low-voltage sensitive circuits.

Modeling the Characteristics of SOI CMOS Nanotransistors with an Asymmetric Surrounding Gate

An approach to an end-to-end simulation of the electrophysical characteristics of lowly doped sub-25-nm SOI (silicon-on-insulator) CMOS transistors with an asymmetric surrounding gate composed of two sequentially connected materials with different work functions is considered. The approach consists of the consecutive calculation of the 3D potential distribution in the working region, calculation of the current–voltage characteristics, and calculation of the static and dynamic characteristics for a basic logic gate (an inverter). In the context of the discussed approach, the effect of the ratio between the lengths of the gate regions with different work functions on all the key characteristics of the devices (transistors and logic gates based on them) are analyzed. It is demonstrated that the logic gates can operate efficiently at a supply voltage of 0.8 V, which is a prerequisite for the creation of low-voltage circuit engineering.

Performance analysis of multi-scaling voltage level shifter for low-power applications

Purpose In complementary metal-oxide-semiconductor (CMOS) logic circuits, there is a direct square proportion of supply voltage on dynamic power. If the supply voltage is high, then more amount of energy will be consumed. Therefore, if a low voltage supply is used, then dynamic power will also be reduced. In a mixed signal circuit, there can be a situation when lower voltage circuitry has to drive large voltage circuitry. In such a case, P-type metal-oxide-semiconductor of high-voltage circuitry may not be switched off completely by applying a low voltage as input. Therefore, there is a need for level shifter where low-voltage and high-voltage circuits are connected. In this paper the multi-scaling voltage level shifter is presented which overcomes the contention problems and suitable for low-power applications. Design/methodology/approach The voltage level shifter circuit is essential for digital and analog circuits in the on-chip integrated circuits. The modified voltage level shifter and reported energy-efficient voltage level shifter have been optimally designed to be functional in all process voltage and temperature corners for VDDH = 5V, VDDL = 2V and the input frequency of 5 MHz. The modified voltage level shifter and reported shifter circuits are implemented using Cadence Virtuoso at 90 nm CMOS technology and the comparison is made based on speed and power consumed by the circuit. Findings The voltage level shifter circuit discussed in this paper removes the contention problem that is present in conventional voltage level shifter. Moreover, it has the capability for up and down conversion and reduced power and delay as compared to conventional voltage level shifter. The efficiency of the circuit is improved in two ways, first, the current of the pull-up device is reduced and second, the strength of the pull-down device is increased. Originality/value The modified level shifter is faster for switching low input voltage to high output voltage and also high input voltage to low output voltage. The average power consumption for the multi-scaling voltage level shifter is 259.445 µW. The power consumption is very less in this technique and it is best suitable for low-power applications.

Nanodielectrics approaches to low-voltage organic transistors and circuits

In this review, advances in nanoscale dielectric materials for organic field-effect transistors (OFETs) are summarized. OFETs are highly promising device units for ultra-thin, light-weight, flexible, and wearable electronics systems, while the operating voltages of the reported devices are in many cases much higher than what is relevant to modern technological applications. Key aspects behind this issue are clarified in terms of basic transistor device physics, which translate into the important motivations for realizing nanodielectric-based low-voltage OFETs. Different possibilities of a device design are explained in detail by introducing important recent publications on each material class. Finally, several forward-looking remarks on the integration of nanodielectrics into next-generation OFETs are provided.

Low Flicker Dimmable Multichannel LED Driver With Matrix-Style DPWM and Precise Current Matching

A low flicker dimmable four-channel LED driver with precise current balancing is proposed in this paper. It is able to achieve highly linear dimming and low lighting flicker at the same time by utilizing a new matrix-style digital pulsewidth modulation (DPWM) along with LED string rotation. Only one LED string needs to be modulated to reduce the total LED current variation and switching loss. To avoid color shift and reduce the effect of subharmonic flicker, a fourth-order common centroid layout is applied to match the current-controlling MOSFETs for precise current balancing. Low-voltage and high-temperature protection circuits as well as a temperature-compensated relaxation oscillator are all integrated to complete the driver design and reduce the overall cost for practical applications. The chip is designed in a TSMC 0.25-μm 1P3M 60-V high-voltage CMOS process with a chip size of 1.76 × 1.37 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The current mismatch among LED strings is measured to be only ±0.28% along with four times reduction in lighting flicker.

Integrated low-voltage charging circuit with active power decoupling function for onboard battery chargers

This paper proposes a novel method to reduce the DC-link capacitor in the single-phase onboard battery chargers. A low-voltage charging circuit is used as a two-parallel buck–boost converter to absorb ripple in the DC link. Thus, the required DC-link capacitance of the onboard battery charger can be reduced significantly without adding additional switches, heat sinks, and gated drivers. In addition, the voltage of the auxiliary capacitor can be controlled to be higher than the DC-link voltage. This allows for a further reduction of the capacitance of the auxiliary capacitor. As a result, small film capacitors can be used at the DC link instead of bulky capacitor banks or additional active power decoupling circuit. Therefore, the cost and volume of the onboard battery charger are reduced significantly. By experimental results for a 2-kW SiC-based prototype, the effectiveness of the proposed circuit has been verified.

Experimental Studies of Arc Motion Between Two Parallel Runners with Splitter Plates

In this paper, we present an experimental study in a simplified arc chamber geometry of Low-Voltage Circuit Breaker (LVCB). The influence of vent aperture on arc motion and the influence of splitter plates on arc voltage drop and arc motion are studied. The arc chamber is composed by two parallel arc runners and following the configuration chosen by one or two splitter plates. The experimental setup is completed by a generator (capacitor bench with triggered switch), a high-speed camera and electrical measurements. The arc ignition, arc displacement, arc splitting and arc re-strike have been observed. The results will be described and discussed for different experimental configurations.

Surrogate Assisted Optimization for Low-Voltage Low-Power Circuit Design

Low-voltage low-power (LVLP) circuit design and optimization is a hard and time-consuming task. In this study, we are interested in the application of the newly proposed meta-modelling technique to alleviate such burdens. Kriging-based surrogate models of circuits’ performances were constructed and then used within a metaheuristic-based optimization kernel in order to maximize the circuits’ sizing. The JAYA algorithm was used for this purpose. Three topologies of CMOS current conveyors (CCII) were considered to showcase the proposed approach. The achieved performances were compared to those obtained using conventional LVLP circuit sizing techniques, and we show that our approach offers interesting results.

Low-voltage cold-start circuit for energy harvesting suitable for indoor sunlight

This paper proposes a low-voltage cold-start circuit suitable for indoor sunlight energy harvesting in TSMC 40nm CMOS process. The circuit can work normally when the input voltage is as low as 200mV and is compatible with a wide input power range. Pulse-skipping modulation (PSM) is used to control the circuit’s operation and sleep. The main structure includes a ring oscillator, a two-phase clock drive circuit, a linear charge pump, a low-power voltage reference, and a hysteresis comparator. Compared with other cold-start circuits, the structure proposed in this paper can realize the function of voltage rise without the aid of external machinery or voltage. Simulation results show that when the input voltage is in the range of 200mV to 700mV, the cold-start circuit can stably output 800mV to power the subsequent circuit.

A Digital-Intensive Extended-Range Dual-Mode BLE5.0 and IEEE802.15.4 Transceiver SoC

The proposed fully integrated digital-intensive system on chip (SoC) allows dual-mode protocols of Bluetooth low energy (BLE) 5.0 and IEEE802.15.4 with extended-range wireless connectivity and ad hoc mesh networks for Internet-of-Things (IoT) systems in wireless sensor networks. The SoC fully integrates a dc–dc converter, LDOs, a digitally controlled crystal oscillator (DCXO), a PHY, a microcontroller (MCU), a security engine, an SRAM, and an eFlash memory. A triple-supply configuration and low-voltage circuit design enable the SoC to be applied for a wide range of battery-powered systems energy-efficiently and to extend battery lifetime. The TRX employs a low insertion-loss on-die TRX switch with impedance matching circuits, a pseudodifferential current-mode class-D PA with HD2 calibration, a low-IF RX architecture with fast AGC algorithm and complex CT- $\Delta \Sigma $ ADCs, and a low-power all-digital phase-locked loop (ADPLL) with fast settling injection LDOs and an LMS-based two-point direct frequency modulation structure. The TRX implemented in a 28-nm CMOS process achieves an output power of +10 dBm with a calibrated HD2 of −63 dBc while consuming 45 mW and sensitivities of −98 dBm in 2-Mb/s BLE and −102 dBm in 256-kb/s IEEE802.15.4 at ${10}^{-3}$ BER while consuming 6 mW.

Comparison between [formula omitted] integration and [formula omitted] derivation methods dedicated to fast short-circuit 2D diagnosis for wide bandgap power transistors

This study presents and compares two original high-speed protection circuit methods, namely, ig integration and vgs derivation, against short-circuit types, referred to as, the hard switch fault and fault under load. Since the gate–drain capacitor Cgd of a power device depends on the drain to source voltage vds, it can become an original native sensor to monitor the switching operation and so detect the unwanted vds transition or the absence of the vds transition by monitoring only vgs. The use of only low-voltage monitoring, such as vgs, is an essential step to integrate fast and embedded new detection methods into a low-voltage application-specific integrated circuit gate driver, in particular for wide bandgap power transistors. The Cgd capacitor plays a major part in the two detection methods. The first method is based on dedicated two-dimensional monitoring of the gate charge transferred in a time interval combined with gate voltage monitoring. The second method consists of the reconstruction of the dvgs/dt by means of a capacitive current sensing to provide the vgs derivation combined with the vgs monitoring. Comparison and simulation of the methods based on a C2M0025120D SiC MOSFET device under LTspice™ are made to verify the validity of the methods. In terms of detection speed of the short circuit, a detection time of 200 ns is obtained for both methods. Experimental waveforms based on C3M0120090J SiC MOSFET device were included into LTspiceTM to push furthermore the methods to their limits and validate the approaches. Both methods are easy to design and to integrate. However, the robustness and the speed of detection trade-off of all these methods should be analysed and compared relative to the critical functionalities.

Effect of viscosity on the volumetric oscillations of a non-equilibrium bubble in free-field and near a free-surface

The effect of viscosity on the behavior of a non-equilibrium bubble is investigated experimentally, in two scenarios; firstly, when the bubble is generated in the bulk of the fluid (termed as “free-field” bubble) and secondly when the bubble is generated near a free-surface (termed as “free-surface” bubble). The bubble is created using a low-voltage spark circuit and its dynamics is captured using a high-speed camera with backlit illumination. The viscosity of the surrounding fluid is varied by using different grades of silicone oil. For a “free-field” bubble, the bubble oscillates radially and as the viscosity of the liquid increases, the number of oscillations, as well as the time period of each oscillation, are increased. At high viscosities, the bubble also becomes stable and does not disintegrate into smaller bubbles. The volumetric oscillations also show good agreement with the Rayleigh-Plesset model incorporating energy loss and viscous effects. For “free-surface” bubbles, two parameters, namely, the initial distance of the bubble from the free-surface and the viscosity of the surrounding fluid are varied. It is observed that beyond a certain initial distance of the bubble from the free-surface, the bubble behaves as a “free-field” bubble with negligible influence of the free-surface on its dynamics. This limiting initial distance decreases as the liquid viscosity is increased and is not dependent on the bubble radius. For these bubbles, different behaviors of the free-surface in each liquid are also presented for distances up to the limiting initial distance. These free-surface behaviors are classified into four different regions on a plot of the Reynolds number (based on the bubble expansion) versus the non-dimensional distance of the bubble from the free-surface.

High-PSRR, Low-Voltage CMOS Current Mode Reference Circuit Using Self-Regulator with Adaptive Biasing Technique

High-PSRR, Low-Voltage CMOS Current Mode Reference Circuit Using Self-Regulator with Adaptive Biasing Technique

A Low Power, High Speed 1.2 V Dynamic Comparator for Analog-to-Digital Converters

Abstract The ever-growing demand for high speed, power-efficient and low voltage circuits used in analog to digital converters (ADCs) is driving advancements aimed at increasing power efficiency and speed of dynamic regenerative comparators. This paper proposes a power-efficient, high speed, and low voltage dynamic comparator. The comparator consisting of two operational phases aids in reduction of the mismatch effect of the circuit, thus resulting in a reduced offset voltage. Exhaustive statistical analysis is carried out to determine the delay and offset voltage of the comparator. Thorough and punctilious Monte-Carlo simulation is carried out for the calculation and verification of the designed comparator at various process corners. There is a significant reduction in delay and power consumption of the comparator operating at 3.07 GHz while consuming 0.3 µW. The standard deviation of the offset is found to be 19.01 mV at 1.2 V supply voltage.

Hysteresis-Free, High-Performance Polymer-Dielectric Organic Field-Effect Transistors Enabled by Supercritical Fluid.

Organic field-effect transistors (OFETs) are of the core units in organic electronic circuits, and the performance of OFETs replies critically on the properties of their dielectric layers. Owing to the intrinsic flexibility and natural compatibility with other organic components, organic polymers, such as poly(vinyl alcohol) (PVA), have emerged as highly interesting dielectric materials for OFETs. However, unsatisfactory issues, such as hysteresis, high subthreshold swing, and low effective carrier mobility, still considerably limit the practical applications of the polymer-dielectric OFETs for high-speed, low-voltage flexible organic circuits. This work develops a new approach of using supercritical CO2 fluid (SCCO2) treatment on PVA dielectrics to achieve remarkably high-performance polymer-dielectric OFETs. The SCCO2 treatment is able to completely eliminate the hysteresis in the transfer characteristics of OFETs, and it can also significantly reduce the device subthreshold slope to 0.25 V/dec and enhance the saturation regime carrier mobility to 30.2 cm2 V−1 s−1, of which both the numbers are remarkable for flexible polymer-dielectric OFETs. It is further demonstrated that, coupling with an organic light-emitting diode (OLED), the SCCO2-treated OFET is able to function very well under fast switching speed, which indicates that an excellent switching behavior of polymer-dielectric OFETs can be enabled by this SCCO2 approach. Considering the broad and essential applications of OFETs, we envision that this SCCO2 technology will have a very broad spectrum of applications for organic electronics, especially for high refresh rate and low-voltage flexible display devices.