Low-temperature Polysilicon Research Articles

Effects of Grain Size on Various Electrical Trap Extraction Methods in Low-Temperature Polysilicon Thin Films

Effects of Grain Size on Various Electrical Trap Extraction Methods in Low-Temperature Polysilicon Thin Films

Research on Characteristics Matching of Micro-LED Devices

This paper presents the design of a 40 × 40 micro-light-emitting (micro-LED) test array based on a 20 mm × 20 mm substrate. A study of the relationship between luminous brightness, driving current, and driving voltage revealed that the data voltages of the red, green, and blue micro-LED array from 0 to 255 grey levels are 0.31 V, 0.29 V, and 0.30 V, respectively, under the condition that the target brightness of the white field is 1000 nits and the color temperature is 9300 K. The brightness range of the red micro-LED array is 64.8–101.2%, the brightness range of the green micro-LED array is 66.5–102.8%, and the brightness range of the blue micro-LED array is 53.5–129.2%. In order to overcome the luminance nonuniformity, a grey level depth of 12 -bit is required. A 10T3C pixel driver circuit based on low-temperature polysilicon (LTPS) with a depth of 12 bits greyscale is designed and fabricated into the micro-LED display. A brightness uniformity of 84.1–97.1% can be achieved by brightness correction combined with a 12-bit greyscale depth system for micro-LED display. This provides a valuable reference point for subsequent improvements in the quality of micro-LED displays.

64‐1: Protrusion‐free LTPS Using the CMP Process and Its OLED Application

Low Temperature Polysilicon (LTPS) is the most popular channel material used in the thin film transistor and it has the protrusions due to the volume expansion of Si and the presence of its native oxide. The protrusions cause the negative effects such as interface trap, hysteresis and so on. In that sense, the heights need to be lowered or eventually flattened.In this study, we used the chemical mechanical planarization (CMP) technique to reduce the surface roughness of LTPS to the 1nm and even lower. One of the most difficult problmes in the large sized CMP process is the removal of slurry residues after CMP and we successfully overcome the issue by using the hydrophilic angent.Finally, we are succesfully able to prepare AMOLED panel with reduced gate insulator thickness by using the CMP process and it shows less hysteresis results.

6‐1: Pragmatic low‐temperature polycrystalline thin‐film transistor technologies for high‐brightness and high‐temperature environments in AMOLED displays

This paper presents experimental and theoretical analysis of electrical characteristics for recent process‐based low‐temperature polysilicon (LTPS) thin‐film transistors (TFTs) in AMOED displays, focusing on high‐temperature and high‐luminance device characteristics. All off‐state current (Ioff) components in such conditions, which include gate‐induced drain leakage (GIDL), thermal generation, photo generation currents, are in detail analyzed. Exploring the effects of process technologies and device design in small‐size TFTs, in conjunction of reduced defect density‐of‐state (DOS) in the polycrystalline and its interface of gate oxide, we investigate optimal device and process design for reliable polycrystalline thin‐film transistor technologies in high‐brightness and high‐temperature situations. Numerical device simulations, supplemented by physics‐based analysis, confirm experimental results for our optimized device/process and gain diligent process/ design co‐optimization insights.

P‐168: Development of Conformal Anti‐diffraction Transparent LTPS TFT Pixel Arrays on Two‐axis Surface

This study shows the electrical and optical results of anti‐diffraction and high aperture ratio low‐temperature poly‐silicon (LTPS) TFT on bending surface. The resistance maintenance rate of the signal metal wiring is up to 90.4%. Our work gives rise to the results of stretchable LTPS TFT device, and indicates the excellent electrical maintenance stability of the metal wiring on a two‐axis bending surface with radius of Rx/Ry=600 mm/800 mm. The results also imply the high‐transparent anti‐diffraction pixel design on two‐axis surface could show clearer background image than traditional pixel design, which can be used as a basis for future development of different applications with conformal stretchable transparent displays.

P‐23: Low Power A‐PWM μLED Pixel Circuit of Progressive‐mode Using Single Sweep Signal for Mobile Displays

An analog pulse‐width‐modulation (A‐PWM) Micro‐LED (μLED) pixel circuit based on low‐temperature‐polysilicon (LTPS) thin‐film transistors (TFTs) for mobile displays is proposed. The progressive‐emission mode is implemented using a single Sweep (SW) signal by in‐pixel logic operation circuits. By adjusting the emission time of the progressive‐emission mode, the μLED is biased with the maximum quantum efficiency (EQE). Consequently, the static power consumption of proposed pixels is reduced by 29.2%, compared with conventional schemes.

High-performance tin perovskite transistors through formate pseudohalide engineering

The lack of high-performance p-type semiconducting materials hinders the integration of complementary metal-oxide semiconductors with well-established n-type metal-oxide counterparts. Although tin halide perovskites are promising p-type material candidates, their practical implementation is hindered by excessive hole concentrations and difficulties in precisely controlling crystallization, which leads to poor device performance and yield. In this paper, we propose a formate pseudohalide engineering method to overcome these issues and demonstrate high-performance tin perovskite thin-film transistors (TFTs). The incorporation of formate anion greatly suppresses the vacancy defects at the surfaces of the perovskite films with an increase in crystallinity and grain size. This reduces the hole concentration and eliminates the dependence on the addition of excessive tin fluoride for hole suppression. Hence, high-performance TFTs with a high average field-effect hole mobility of 57.34 cm2 V−1 s−1 and on/off current ratios surpassing 108 can be achieved, approaching p-channel low-temperature polysilicon devices.

47.5‐inch 8K inkjet printing AMOLED monitor with local boosting gate driver on array design

AbstractIn this paper, we presented a 47.5 in. 8K2K AMOLED MNT employing a low temperature poly‐silicon (LTPS) backplane, top emissive inkjet printing (IJP) OLED devices, and gate driver on array (GOA) supporting independent 32 * 9 zone control and internal compensation driving. By combining printed RGB units with a common evaporative blue stack, we proposed the hybrid tandem IJP devices that improved both device efficiency and operation load balance. In the local boosting GOA design, a novel architecture for independent display partition control was developed. The GOA cascading and timing scheme was carefully considered by reusing several clock signals to support both TFT internal compensation and display zone control. It is so far the first prototype AMOLED MNT integrating inkjet printing process and local high frame rate (up to 960 Hz) driving. Thanks to the 8K2K high resolution, local frame rate data processing, and IJP OLED EL reaching HDR brightness up to 580 nits with superior optical performance, it shows a brand‐new approach to deliver a premium display.

The fabrication and characterization of direct conversion flat panel X-ray imager with TlBr film

The novel direct conversion flat panel detectors (FPDs) utilizing thallium bromide (TlBr) films are developed and characterized in this study. Thin TlBr films, deposited using an evaporation technique, achieved thicknesses of 10 μm and 50 μm. A pixel sensor array, with a pixel size of 235 × 235 μm2 and a sensitive area of 29.61 × 39.48 mm2, was developed using low-temperature polysilicon thin-film transistor (LTPS TFT) technology as the initial study to explore performance characteristics of developed imaging system. The TlBr film was characterized based on the current-voltage (I–V) profile, showing a resistivity of 2.78 × 1010 Ω·cm. The LTPS TFT showed a leakage current of about 10−13 A, while the noise of TlBr FPD system was around 104 e− rms, primarily limited by the readout system. The detector system was characterized using radiation from an X-ray tube with a voltage in the range of 30 kV–100 kV and a current of 2 mA, involving an X-ray test chart as the object with the processing time of 18.15–18.30 ms per frame. Based on the contrast and contrast-to-noise ratio (CNR) values, the 10 μm and 50 μm TlBr FPD clearly captured the image in operation between 30 kV and 100 kV. The 50 μm TlBr FPD demonstrated improved sensitivity, showing pixel values with 10 times higher intensity and enhanced line pair detail at 30 kV X-ray operation. The 10 μm TlBr achieved spatial resolution of 267 μm full width at half maximum (FWHM), while the 50 μm TlBr achieved 250 μm FWHM. In the X-ray imaging demonstration, the shape and structure of anchovy was clearly distinguished. The TlBr film FPD presents promising potential for a room temperature X-ray imager.

A 6T1C pixel circuit compensating for TFT electrical characteristics variations, voltage drop, and OLED degradation

A voltage-programmed pixel circuit based on low-temperature poly-silicon (LTPS) thin-film transistors (TFTs) is presented for active-matrix organic light-emitting diode (AMOLED) displays. The circuit consists of six p-type transistors and one capacitor (6T1C). During the extraction stage, the circuit extracts the driving TFT’s threshold voltage and the power supply voltage. During the data input stage, the circuit generates a charging voltage, which is associated with the driving TFT’s mobility and the OLED’s threshold voltage. Consequently, the pixel circuit, using only one capacitor, compensates not only for the TFT’s electrical characteristics variations, i.e., the threshold voltage variation and mobility variation, but also for the power supply voltage drop and the OLED degradation. The circuit simulation results reveal that the OLED current error rates (CERs) are lower than 5.09% when the threshold voltage varies by ±0.5V, lower than 3.61% when the mobility varies by ±30%, and lower than 9.16% when the voltage drop varies by −0.5V in the data voltage range.

High Precision Control System for Micro-LED Displays

This paper proposes a Field Programmable Gate Array (FPGA)-based control system to implement micro-light-emitting diode (micro-LED) real-time display. The control system includes the interface control, video processing, memory management, image data transmission, control signal generation and correction. Then, we implement the micro-LED real-time display via memory management. We propose the brightness correction to achieve high grey-scale and high uniformity display. The LEDs are mounted on the glass substrate prepared using low-temperature polysilicon (LTPS) technology, and then we find the 24 × 46 pixels micro-LED panel. And the control system has been successfully applied to the panel of glass-based micro-LED displays. A new grey control method is proposed in this work, which can effectively improve the refresh rate of the micro-LED displays. The high grey-scale refresh rate is 2100 Hz, and the low grey-scale refresh rate is 300 Hz. The uniformity of the panel is increased to 85% after brightness correction.

Tin perovskite transistors and complementary circuits based on A-site cation engineering

Tin halide perovskites have the general chemical formula ASnX3, where A is a monovalent cation and X is a monovalent halide anion. These semiconducting materials can be used to fabricate p-type transistors at low cost and temperature and could be potentially integrated with n-type oxide-based transistors to create complementary circuits. However, the materials suffer from low crystallization controllability and high film defect density, resulting in uncompetitive device performance. Here we show that pure-tin perovskite thin-film transistors can be created using triple A cations of caesium–formamidinium–phenethylammonium. The approach leads to high-quality cascaded tin perovskite channel films with low-defect, phase-pure perovskite/dielectric interfaces. The optimized thin-film transistors exhibit hole mobilities of over 70 cm2 V−1 s−1 and on/off current ratios of over 108, which are comparable with commercial low-temperature polysilicon transistors. The transistors are fabricated using solution-processing methods at temperatures no higher than 100 °C. We also integrate the devices with n-type metal oxide transistors to create complementary inverters with voltage gains of 370, and NOR and NAND logic gates with rail-to-rail switching performance.

40‐3: Distinguished Paper: Reliable low‐power high‐performance low‐temperature polycrystalline thin‐film transistor technologies in bottom gate‐controlled device architectures for AMOLED displays

This paper presents recent process for bottom gate‐controlled low‐temperature polysilicon (LTPS) TFT technologies for reliable low‐power high‐performance AMOLED displays. Experimental and physics‐based analysis leads to the pragmatic device design concept for LTPS TFT performance enhancement. Process integration of bottom (second) gate and top (first) gate metals, controlled by optimal two gates‐based device structures, is explored in conjunction of improved poly crystallization and poly‐Si/gate‐oxide interface by reducing defect density‐of‐state (DOS), especially in the grain boundaries of the channel region. We obtain optimal device performance such as optimal sub‐threshold slope, high driver current (Ion), and low leakage current (Ioff), in addition to enhanced device reliability characteristics. Numerical device simulations, supplemented by physics‐based analysis, are performed to corroborate experimental results in fabricated TFTs, as well as gain more physical insight in the bottom‐gate LTPS device configuration, to enable reliable low‐power high‐performance AMOLED display applications.

Large-Scale Terahertz Sensor Array Module With Antenna-Coupled Microbolometers on Glass Substrate With Sigma–Delta ADC Readout ASIC

We describe the design, fabrication and demonstration of a terahertz sensor array module, designed to operate over 250-350GHz. The antenna coupled microbolometer was fabricated on a glass substrate with an integrated array of pixel switches and row multiplexing circuitry implemented with LTPS (Low Temperature PolySilicon) thin film transistors. While other microbolometer arrays have been reported for the upper Terahertz bands, we focus on lower frequencies where adequate semiconductor sources are available potentially enabling important medical and security applications. The devices were fabricated in a Gen 3.5 flat panel manufacturing facility implementing what we call Large Area MEMS Platform (LAMP) surface micromachining process, providing a path to low-cost manufacturing. Individual pixels were defined on a 0.7mm pitch across an array of 128x128 pixels in this first demonstration. Since flat panel fabrication capabilities use large, single-shot reticle masks and large glass substrates, physically larger arrays can be manufactured without mask stitching. An ROIC (readout integrated circuit) was demonstrated to support the THz sensor panel with 648 input channels, each providing an independent sigma delta ADC with excellent uniformity and 12 effective number of bits. An early demonstration of the sensor array is described, imaging a metallic knife hidden in a cardboard envelope.

Reliable low‐power high‐performance low‐temperature polycrystalline thin‐film transistor technologies in bottom gate‐controlled device architectures for AMOLED displays

AbstractThis paper presents a recent process for bottom gate‐controlled low‐temperature polysilicon (LTPS) TFT technologies for reliable low‐power high‐performance AMOLED displays. The experimental and physics‐based analysis leads to the pragmatic device design concept for LTPS TFT performance enhancement. The process integration of bottom (second) gate and top (first) gate metals, controlled by optimal two gates‐based device structures, is explored in conjunction with improved poly crystallization and poly‐Si/gate‐oxide interface by reducing defect density‐of‐state (DOS), especially in the grain boundaries of the channel region. We obtain optimal device performance, such as optimal sub‐threshold slope, high driver current (Ion), and low leakage current (Ioff), in addition to enhanced device reliability characteristics. Numerical device simulations, supplemented by physics‐based analysis, are performed to corroborate experimental results in fabricated TFTs and gain more physical insight into the bottom‐gate LTPS device configuration to enable reliable low‐power high‐performance AMOLED display applications.

38.2: An Accurate and Stable PWM Pixel Circuit Based on LTPO TFTs for AM‐Micro‐LED Display

A pulse-width-modulation (PWM) pixel circuit for Micro-LED displays is proposed based on low-temperature poly-silicon and oxide (LTPO) thin-film transistors (TFTs). The pixel circuit features fast PWM transition, as the PWM falling-time is less than 20 μs thanks to the high-gain dynamic inverter. Furthermore, the proposed pixel circuit can compensate the degradation and non- uniformities of TFT characteristics of LTPO TFTs through auto- zeroing configuration of the dynamic inverter and a diode- connected threshold voltage compensation structure. The error rate of luminous time is less than 3.2% and the error rate of current is less than 1% under VTH shift of oxide TFT ±2 V or LTPS TFT ±1 V.

38.3: Compact Gate Driver on Array for Progressive‐mode PWM Micro‐LED Display using LTPS TFTs

A compact gate driver on array (GOA) was proposed for Micro‐Light Emitting diodes (Micro‐LED) display based on progressive‐mode pulse‐width modulation (PWM) using low‐temperature‐polysilicon (LTPS) thin‐film transistors (TFTs). Thanks to outputting line‐by‐line scanning (Scan) and emission control signals (EM) to address switching‐and emission‐transistors in Micro‐LED pixel circuit, the proposed GOA circuit enables an increased emission time by 60% with the frame rate of 120 Hz, compared with the conventional GOA circuit of simultaneous operating mode. Furthermore, the pulse‐width of EM signals are programmable simply by adjusting the number of input pulses.

Gate Driver on Array With Multiple Outputs and Variable Pulse Widths for Low-Temperature Polysilicon and Oxide (LTPO) TFTs Driven AMOLED Displays

A gate driver on array (GOA) circuit was proposed for low-temperature polysilicon and oxide (LTPO) thin-film transistor (TFT) hybrid-driven active matrix organic light-emitting diode (AMOLED) displays with both high and low refresh rate operation. The GOA generates multiple types of scanning signals by reusing shift registers so that three signal pulses are output parallelly within a single stage to scan p- and n-type switching TFTs and emission TFT of the AMOLED pixels, respectively, leading to a 30% reduction in the layout area. Furthermore, the pulse-width of the scan signals for the emission TFT can be programed simply by changing the number of input pulses to vary refresh rates. The fabricated GOAs work well even with the pulse width reduced to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2.9 \mathbf {\mu }\text{s}$ </tex-math></inline-formula> .

Effects of Static and Repetitive Uniaxial Bending Strains on the Electrical Properties and Trap Characteristics of Flexible Low-Temperature Polysilicon Thin-Film Transistors

Changes in the electrical properties and trap characteristics of flexible low-temperature polysilicon thin-film transistors (TFTs) under the application of uniaxial bending strains and during repetitive bending cycles were investigated. When the bending strain increased, the transfer curve showed a negative shift, the output current decreased, and the subthreshold slope increased. After the bending strains were removed, the electrical performance showed recovery behavior, but the device performance could not return fully to its original state. The devices were also subjected to repetitive bending cycles. The transfer curves showed a positive shift after <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10^{{4}}$ </tex-math></inline-formula> bending cycles and the output current increased. Using the transient current method, it was established that the detrapping time constant of the traps decreased and the peak amplitudes increased as a result of both the bending strain and the bending cycles. However, while the trap activation energy was not changed by static bending, it did decrease after the repetitive bending cycles. Both the changes in the electrical properties and the time constant spectra confirm that the trap state density increased as a result of the bending processes. However, the different trapping behaviors contributed to different degradations in the device’s electrical properties.

Highly Robust Flexible Poly-Si Thin Film Transistor Under Mechanical Strain With Split Active Layer for Foldable Active Matrix Organic Light Emitting Diode Display

We report a novel active split structure of low-temperature polysilicon (LTPS) thin film transistor (TFT) on polyimide (PI) substrate showing robust electrical performance under mechanical strain. The compressive and tensile bending tests were carried out with cylinders of radii 3, 2 and 1 mm respectively. The active split TFT exhibits much more stable electrical performance than the conventional TFT. The conventional LTPS TFT shows electrical failure due to the crack generation during tensile or compressive bending test carried out with 1 mm radius cylinder. The split poly-Si islands could resist crack formation/propagation, resulting in a robust electrical performance.