Low-temperature Polycrystalline Silicon Thin-film Transistors Research Articles

Drain-Induced Barrier Lowering in Short-Channel Poly-Si TFT After Off-Bias Stress Using Metal-Induced Crystallization of Amorphous Silicon

We report the effect of off-bias stress on the transfer characteristics of short-channel ( <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</i> = 0.95 μm) low-temperature polycrystalline silicon (poly-Si) thin-film transistor (TFT). The poly-Si TFT using metal-mediated crystallization of a-Si exhibited a field-effect mobility of 93.07 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V·s . In addition to the reduction of off-state leakage currents, threshold voltage shifts of 2.28 and 3.45 V were observed after off-bias stress at the drain voltages of -0.1 V and - 1 V, respectively. This is attributed to the reduction of the effective channel length and to drain-induced barrier lowering effect, which lead to different current-voltage characteristics when the source/drain electrodes are exchanged.

Reduced leakage current of nickel induced crystallization poly-Si TFTs by a simple chemical oxide layer

Ni-metal-induced crystallization (MIC) of amorphous Si (α-Si) has been used to fabricate low-temperature polycrystalline silicon (poly-Si) thin-film transistors (TFTs). However, the leakage current of MIC-TFT is high. In this study, a chemical oxide layer was used to avoid excess of Ni atoms into α-Si layer during MIC process, which was simple and without extra expensive instrument. The minimum leakage current and on/off current ratio were significantly improved.

Electrical Degradation and Recovery of Low-Temperature Polycrystalline Silicon Thin-Film Transistors in Polycrystalline Silicon Plasma Process

The plasma-process-induced damage (PPID) of low-temperature polycrystalline silicon (poly-Si) thin-film transistors (TFTs) during the etching of the poly-Si film was investigated in this paper. The results reveal the relationship between the device degradation and the PPID during TFT liquid-crystal-display fabrication. This degradation is caused in part by the damage at the edge of the poly-Si film in plasma exposure. The trapped-state densities Ntrap are measured to clarify the relationship between instability and plasma etching damages. The plasma-process condition substantially affects the PPID of the poly-Si etching process. The main mechanism is the generation of charge trapping states at the poly-Si grain boundary in the damaged edge of the TFT channel active region. The electrical recovery from the plasma damage is also studied with various postetching treatments. Hydrogen-base plasma treatment and laser anneal process are revealed to improve the device characteristics due to reduction of charge trapping states.

NBTI Degradation in LTPS TFTs Under Mechanical Tensile Strain

This letter investigates the negative-bias temperature instability (NBTI) degradation of p-channel low-temperature polycrystalline-silicon thin-film transistors (LTPS TFTs) under mechanical tensile stress. Experimental results reveal that the interface state density Nit and grain boundary trap density Ntrap of tensile-strained LTPS TFTs are more pronounced than those of unstrained LTPS TFTs. Extracted density of states and conduction activation energy Ea both show increases due to the strained Si-Si bonds, which implies that strained Si-Si bonds are able to react with dissociated H during NBTI stress. Therefore, NBTI degradation is more significant after tensile strain than in an unstrained condition.

A novel optical diagnostic technique for analyzing the recrystallization characteristics of polycrystalline silicon thin films following frontside and backside excimer laser irradiation

Excimer laser annealing (ELA) is a widely used technique for producing polycrystalline silicon (poly-Si) thin films. An optical inspection system with simple optical arrangements for rapid measurement of recrystallization results of poly-Si thin films is developed in this study. The recrystallization results after both frontside ELA and backside ELA can be easily visible from the profile of peak power density distribution using the optical inspection system developed with an optimized moving velocity of 0.312 mm/s of the specimen. The method of backside ELA is suggested for batch production of low-temperature polycrystalline silicon thin-film transistors due to higher laser beam utilization efficiency and lower surface roughness of poly-Si films.

Thin-BOX Poly-Si Thin-Film Transistors for CMOS-Compatible Analog Operations

This paper presents device models and optimization methodology for reducing short-channel effects in low-temperature polycrystalline-silicon thin-film transistors (LTPS TFTs), which are suitable for standard complementary metal-oxide-semiconductor (CMOS)-compatible analog operations. We analyze channel-length modulation to determine appropriate channel length having a single grain boundary in the channel fabricated using excimer laser-annealed crystallization under low-temperature constraint. Furthermore, buried-oxide-induced barrier lowering (BIBL) is investigated in poly-Si TFTs. BIBL makes the effective channel length shorter, resulting in difficulty to use LTPS TFTs for analog applications due to small output resistance rout. We show that, with scaling of the buried-oxide (BOX) thickness Tbox and an appropriate channel length, rout and the normalized transconductance gm/Id (with Tbox = 10 nm) can be improved by 103% and 8%, respectively, compared with thicker BOX (Tbox = 50 nm). In addition, due to the decrease in leakage currents, the Ion/Ioff ratio of the thin-BOX device can be three times larger than that of the thicker BOX device. Based on the process-constrained optimized device, we designed a 417-μW 65-dB folded-cascode operational amplifier with 2-V supply for CMOS-compatible operations.

P‐52: A New Current Programming Pixel Circuit for Compensating Luminance Degradation of AMOLED

AbstractA new pixel circuit using low‐temperature polycrystalline‐silicon (LTPS) thin‐film transistors for Active Matrix Organic Light Emitting Diodes (AMOLEDs) is presented. The proposed current programming circuit without charging time problem at low gray level compensates for the threshold voltage variation of TFT as well as OLED luminance decay. The simulation results demonstrate driving current of this circuit is independent of the variation of TFT and maintain luminance for long term operation.

Anomalous on-current and subthreshold swing improvement in low-temperature polycrystalline-silicon thin-film transistors under Gate bias stress

This work investigates an improvement in anomalous on-current and subthreshold swing (SS) in Low-temperature polycrystalline-silicon thin-film transistors after positive gate bias stress. The experimental results reveal that the improved electric properties are due to the hole trapping at SiO2 above the lightly doped drain regions, which causes a strong electric field at the gate corners. The effect of the hole trapping is to reduce the effective channel length and the SS. Besides, the stress-related electric field was also simulated by TCAD software to verify the mechanism above.

Water-Related Instability in Low-Temperature Polycrystalline Silicon Thin-Film Transistors Caused by Self-Heating

It was observed that the bias stressing of low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) gave rise to anomalous instabilities in device characteristics, such as negative threshold voltage shifts in both n- and p-channel TFTs, and the recovery of the shift even under stress. From detailed investigations of these phenomena, it was found that the instability is caused by self-heating due to the drain current, and is related to hydrogen and/or water diffusing into the gate oxide from the interlayer dielectric. It is considered that these phenomena will become more significant in future scaled TFTs; therefore, it is important that low-temperature processes taking account of water-related components are carefully introduced.

Pixel-Level Digital-to-Analog Conversion Scheme with Compensation of Thin-Film-Transistor Variations for Compact Integrated Data Drivers of Active Matrix Organic Light Emitting Diodes

The previous pixel-level digital-to-analog-conversion (DAC) scheme that implements a part of a DAC in a pixel circuit turned out to be very efficient for reducing the peripheral area of an integrated data driver fabricated with low-temperature polycrystalline silicon thin-film transistors (LTPS TFTs). However, how the pixel-level DAC can be compatible with the existing pixel circuits including compensation schemes of TFT variations and IR drops on supply rails, which is of primary importance for active matrix organic light emitting diodes (AMOLEDs) is an issue in this scheme, because LTPS TFTs suffer from random variations in their characteristics. In this paper, we show that the pixel-level DAC scheme can be successfully used with the previous compensation schemes by giving two examples of voltage- and current-programming pixels. The previous pixel-level DAC schemes require additional two TFTs and one capacitor, but for these newly proposed pixel circuits, the overhead is no more than two TFTs by utilizing the already existing capacitor. In addition, through a detailed analysis, it has been shown that the pixel-level DAC can be expanded to a 4-bit resolution, or be applied together with 1:2 demultiplexing driving for 6- to 8-in. diagonal XGA AMOLED display panels.

Pixel-Level Digital-to-Analog Conversion Scheme with Compensation of Thin-Film-Transistor Variations for Compact Integrated Data Drivers of Active Matrix Organic Light Emitting Diodes

The previous pixel-level digital-to-analog-conversion (DAC) scheme that implements a part of a DAC in a pixel circuit turned out to be very efficient for reducing the peripheral area of an integrated data driver fabricated with low-temperature polycrystalline silicon thin-film transistors (LTPS TFTs). However, how the pixel-level DAC can be compatible with the existing pixel circuits including compensation schemes of TFT variations and IR drops on supply rails, which is of primary importance for active matrix organic light emitting diodes (AMOLEDs) is an issue in this scheme, because LTPS TFTs suffer from random variations in their characteristics. In this paper, we show that the pixel-level DAC scheme can be successfully used with the previous compensation schemes by giving two examples of voltage- and current-programming pixels. The previous pixel-level DAC schemes require additional two TFTs and one capacitor, but for these newly proposed pixel circuits, the overhead is no more than two TFTs by utilizing the already existing capacitor. In addition, through a detailed analysis, it has been shown that the pixel-level DAC can be expanded to a 4-bit resolution, or be applied together with 1:2 demultiplexing driving for 6- to 8-in. diagonal XGA AMOLED display panels.

A single-clock-driven gate driver using p-type, low-temperature polycrystalline silicon thin-film transistors

A single-clock-driven shift register and a two-stage buffer are proposed, using p-type, low-temperature polycrystalline silicon thin-film transistors. To eliminate the clock skew problems and to reduce the burden of the interface, only one clock signal was adopted to the shift register circuit, without additional reference voltages. A two-stage, p-type buffer was proposed to drive the gate line load and shows a full-swing output without threshold voltage loss. The shift register and buffer were designed for the 3.31″ WVGA (800×480) LCD panel, and the fabricated circuits were verified via simulations and measurements.

Water-Related Instability in Low-Temperature Polycrystalline Silicon Thin-Film Transistors Caused by Self-Heating

Water-Related Instability in Low-Temperature Polycrystalline Silicon Thin-Film Transistors Caused by Self-Heating

3.4-Inch Quarter High Definition Flexible Active Matrix Organic Light Emitting Display with Oxide Thin Film Transistor

In this paper, we report a 3.4-in. flexible active matrix organic light emitting display (AMOLED) display with remarkably high definition (quarter high definition: QHD) in which oxide thin film transistors (TFTs) are used. We have developed a transfer technology in which a TFT array formed on a glass substrate is separated from the substrate by physical force and then attached to a flexible plastic substrate. Unlike a normal process in which a TFT array is directly fabricated on a thin plastic substrate, our transfer technology permits a high integration of high performance TFTs, such as low-temperature polycrystalline silicon TFTs (LTPS TFTs) and oxide TFTs, on a plastic substrate, because a flat, rigid, and thermally-stable glass substrate can be used in the TFT fabrication process in our transfer technology. As a result, this technology realized an oxide TFT array for an AMOLED on a plastic substrate. Furthermore, in order to achieve a high-definition AMOLED, color filters were incorporated in the TFT array and a white organic light-emitting diode (OLED) was combined. One of the features of this device is that the whole body of the device can be bent freely because a source driver and a gate driver can be integrated on the substrate due to the high mobility of an oxide TFT. This feature means “true” flexibility.

Flexibility of Low Temperature Polycrystalline Silicon Thin-Film Transistor on Tungsten Foil

We have studied the mechanical bending effect of low-temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) on flexible tungsten foil. The p-channel TFTs on tungsten foil, using the poly-Si obtained by metal induced crystallization, exhibited a field-effect mobility of 88.8 cm2 V-1 s-1, threshold voltage of -4.8 V, subthreshold swing of 0.64 V/decade, and a minimum off current of <10-12 A/µm. The tungsten foil was chosen because its thermal expansion coefficient is similar to that of the Si thin film. The TFTs on flexible tungsten foil is extremely stable until the bending radius of 5 mm, which corresponds to the strain of 0.58%. Additionally, the devices can be repetitively flexed with a strain of 0.58% for 5,000 times of bending.

Improved Electrical Performance and Reliability of Poly-Si TFTs Fabricated by Drive-In Nickel-Induced Crystallization with Chemical Oxide Layer

Ni-metal-induced crystallization (MIC) of amorphous Si (α-Si) has been employed to fabricate low-temperature polycrystalline silicon thin-film transistors (TFTs). However, the Ni residues degrade the device performance. In this study, a new method for manufacturing MIC–TFTs using drive-in Ni-induced crystallization with a chemical oxide layer (DICC) is proposed. Compared with that of MIC–TFTs, the on/off current ratio (I on/I off) of DICC–TFTs was increased by a factor of 9.7 from 9.21 × 104 to 8.94 × 105. The leakage current (I off) of DICC–TFTs was 4.06 pA/μm, which was much lower than that of the MIC–TFTs (19.20 pA/μm). DICC–TFTs also possess high immunity against hot-carrier stress and thereby exhibit good reliability.

An AMOLED AC-Biased Pixel Design Compensating the Threshold Voltage andI-RDrop

We propose a novel pixel design and an AC bias driving method for active-matrix organic light-emitting diode (AM-OLED) displays using low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs). The proposed threshold voltage andI-Rdrop compensation circuit, which comprised three transistors and one capacitor, have been verified to supply uniform output current by simulation work using the Automatic Integrated Circuit Modeling Simulation Program with Integrated Circuit Emphasis (AIM-SPICE) simulator. The simulated results demonstrate excellent properties such as low error rate of OLED anode voltage variation (&lt;0.7%) and low voltage drop ofVDDpower line. The proposed pixel circuit effectively enables threshold-voltage-deviation correction of driving TFT and compensates for the voltage drop ofVDDpower line using AC bias on OLED cathode.

Electrical performance and thermal stability of MIC poly-Si TFTs improved using drive-in nickel induced crystallization

Ni-metal-induced crystallization (MIC) of amorphous Si (α-Si) has been used to fabricate low-temperature polycrystalline silicon (poly-Si) thin-film transistors (TFTs). The current crystallization technology, however, often leads to trap Ni and NiSi 2 precipitates, which degrade the device performance. In this study, a new manufacturing method for poly-Si TFTs using drive-in Ni induced crystallization (DIC) was proposed. In DIC, F + implantation was used to drive Ni in the α-Si layer. It was found that the electrical performance (especially leakage current) and thermal stability of DIC-TFTs were improved due to the reduction of Ni concentration and passivation of trap states near the SiO 2/poly-Si interface.

Investigation of Polysilicon Thin-Film Transistor Technology for RF Applications

The low-temperature polycrystalline silicon (LTPS) thin-film transistor (TFT) is an emerging technology to manufacture active matrix liquid crystal displays. With the TFT's maximum frequency of oscillation f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> exceeding 3.5 GHz, it becomes feasible to develop integrated circuits (ICs) in LTPS TFT technology to facilitate system on panel or system on display. This paper investigates the LTPS TFT characteristics for developing RF ICs. The dc and ac equivalent-circuit models were developed for LTPS TFT RF integrated-circuit design. A phase-locked loop (PLL) was demonstrated using the 3-μm LTPS TFT technology. The supply voltage and power consumption of the PLL are 8.4 V and 25 mW, respectively. The operation frequency range of the TFT PLL is from 2 to 10 MHz, and the measured root-mean-square jitter is 235 ps.

Polycrystalline Silicon TFTs Threshold Voltage Compensated Bias Current Generator for Analog Circuit Design

A new bias current generator (BCG) with threshold voltage compensation for analog circuit design implemented with low-temperature polycrystalline silicon thin-film transistors (LT poly-Si TFTs) is proposed. The proposed topology can be used in AMOLED display applications or in other poly-Si TFTs current mode analog circuits. The functionality of the proposed circuit has been verified through simulations with HSpice. In order to obtain realistic simulations, parameters extraction in fabricated LT poly-Si TFTs was made. The simulation results indicate that the output current is independent from the transistors threshold voltage, without requiring additional capacitors or control signals for the threshold voltage compensation. Furthermore, low supply voltage is needed (10 V) and the impact of the threshold voltage variations was reduced from 54% to 3% for an output current of 2.5 μA.