Low Power Phase Research Articles

Silicon photonics foundry fabricated, slow-light enhanced, low power thermal phase shifter

In this research, we developed a low-power silicon photonics foundry-fabricated slow-light thermal phase shifter (SLTPS) where the slow-light (SL) effect is achieved using an integrated Bragg grating (BG) waveguide. Heating the grating induces a red shift in the transmission spectrum, leading to an increased group index ng during operation, which facilitates a further reduction in the voltage needed for a π phase shift, i.e., Vπ. Additionally, we investigated a compact Mach–Zehnder Interferometer (MZI) that incorporates the SLTPS in both arms with a phase shifter length of 50 μm. A detailed theoretical analysis was conducted to address the non-idealities of the SL-MZI due to uneven optical power splitting and unbalanced loss in the two MZI arms. Vπ and power consumption for a π phase shift (Pπ) of the SL-MZI were quantified for operation in the slow-light regime, demonstrating a Vπ of 1.1 V and a Pπ of 3.63 mW at an operational wavelength near the photonic band edge. The figure of merit Pπ×τ is commonly used to assess the performance of thermal optical switches. The SL-MZI in this work has achieved a low Pπ×τ of 5.1 mW μs with an insertion loss of 4.4 dB, indicating a trade-off with the Vπ reduction.

Design and Implementation of PLL with Dead Zone-Less Low-Power Phase Frequency Detector

This project introduces a Phase-Frequency Detector (PFD) that includes a dedicated circuit for removing the dead zone. This design utilizes Pass Transistor Logic (PTL) and Delay Cells (DCs) to effectively address this issue. Additionally, a Low-Pass Filter is integrated into the system and connected with charge pump, employing a technique that replaces resistors with transistors, thereby significantly reducing the overall circuit area. Furthermore, a Phase-Locked Loop (PLL) serves to eliminate the dead zone and significantly reduce the circuit's size. This project aims to advance circuit design methodologies by enhancing performance and minimizing area requirements.

Optical attenuator-oriented quantum hacking on continuous-variable quantum key distribution with local local oscillator

Continuous-variable quantum key distribution with local local oscillator (LLO-CVQKD) eliminates the security loophole caused by transmitting high power local oscillator (LO). However, in order to establish a common phase frame between the sender and receiver, a low power phase reference needs to be transmitted with quantum signals, which may bring in new security problems for eavesdroppers to obtain information illegally. Especially in trusted phase noise model, phase noise associated with detectors is regarded as trusted noise in order to obtain a higher secret key rate and transmission distance, which further provides opportunities for eavesdroppers. To this end, we propose an optical attenuator-oriented attack strategy against the LLO-CVQKD system under the trusted phase noise model, where Eve can inject suitable light into the optical attenuator in reference light path to reduce the attenuation level of it, thereby controlling the intensity of the reference pulses and resulting in an underestimated excess noise. Simulation results show that the proposed attack strategy can render the estimated secret key rate much higher than the actual values. When the transmission distance exceeds 25 km, the eavesdropper can obtain approximately 90% of the key information by adjusting the intensity of the reference pulses to twice the original value.

Investigation of shaded pole stator topology for low power AC motors design

PurposeThis paper aims to investigate the features of single phase shaded pole stator with squirrel–cage rotor or permanent magnet rotor, that leads to an investigation of these topoloties as induction motor or synchronous motor. The comparative analysis is realised for the following three topologies: single phase shaded pole induction motor (SPIM) with squirrel–cage rotor, the second topology (single phase synchronous motor) has the same stator configuration but with permanent magnet rotor and the third investigated topology is similar to the second one, where the stator poles instead of iron steel are made of soft composite material.Design/methodology/approachThe investigation in this work starts with a performance analysis of single-phase SPIM. Afterwards for the same stator topology the squirrel rotor is replaced with a two-pole permanent magnet rotor and the same performance analysis is realised for this topology. Finally, the second topology is improved bay replacing the iron steel stator poles with stator poles made of soft magnetic composite material and performance analysis is realised for this third type of topology as well. The performance analysis of all topologies is realised by implementation of finite element method and finite element analysis.FindingsThe presented data and diagrams from the realized investigation show that single phase synchronous motor with shaded pole stator has an improved characteristics in comparison with the initial single-phase SPIM. Finally, the third topology realized on the bases of the single-phase synchronous motor has the best performance characteristics due to the implementation of soft magnetic material in the realization of the stator poles. The proposed methodology for structural and performance improvement of a single-phase SPIM topology opens the possibility for additive manufacturing application and significant cost reduction.Originality/valueThe focus was put on exploration the possibilities of the single-phase shaded pole stator topology for application in low-power and low-cost single phase self-starting motors. By simple replacement of the squirrel–cage rotor, in the reference AKO-16 motor, with one-piece ferrite permanent magnet rotor, the self-starting single phase synchronous motor was derived. In the next step, owing to simplify the SPPM motor production process and manufacturing, the stator poles instead of iron steel lamination were made of soft composite material Somaloy®. It opens the possibility for additive manufacturing application and significant cost reduction.

Design and Simulation of VCO for RF Transceivers with Low Power, Low Phase Noise and Wider Tuning Range using Silterra 130nm CMOS Technology

The performance of low-power transceivers is required to meet stringent specifications for an advanced wireless radio frequency (RF) application. The design topology in this paper is simulated to meet the specifications and operation of VCO for low power, low phase noise and wide tuning range in complementary metal oxide semiconductor (CMOS) 130nm technology for RF transceivers. The relationship between the phase noise, power consumption and frequency turning range is fully analyzed to further improve the performance of the voltage-controlled oscillator (VCO). The architecture of the VCO employs two sets of symmetrical cross-couple split NMOS and PMOS with biased current sources operating in the triode region, and a resonator tank that achieves the desired low phase noise performance of about -110 dB/Hz at a tuning range of 4.1 to 4.5 GHz with a supply of 0.9 V. The control of the DC bias point reduces the conduction angle, which improves the current efficiency, power consumption and phase noise. The topology generates sufficient –gm for the oscillator incorporation to mitigate the start-up issue of the VCO. At the center frequency of 4.38 GHz, the VCO serves as a promising solution for improving low power and low phase for wireless communication systems and RF transceiver applications. The design consumes a very low power of 0.138 mW, achieves a phase noise of -110.53 dBc/Hz at 1 MHz offset, and a figure of merit (FoM) of -191.90 dBc/Hz.

Radiation Hardened by Design-based Voltage Controlled Oscillator for Low Power Phase Locked Loop Application

Radiation Hardened by Design-based Voltage Controlled Oscillator for Low Power Phase Locked Loop Application

Design of low power and low phase noise LC-VCO for Bluetooth/WLAN applications

The proposed Inductor-Capacitor Voltage-Controlled Oscillator (LC-VCO) prototype design generates 2.45 GHz to 4.58 GHz of frequency using the Cadence UMC 180 nm process with a 1.8V supply. This architecture carried a new viewpoint on tank design put forth by enhancing the varactor tuning. Here, the circuit employs a CMOS differential cross-coupled pair, and rail-to-rail DC biasing achieves a higher voltage swing. Simulation analysis parameters are measured at 2.45 GHz frequency, phase noise is −123.5 dBc/1 MHz offset, power is 3.5 mW, jitter is 0.232 fsec, and it occupies 0.118 μm2 layout area. Additionally, the simulations have been extended for analysis under Process Voltage and Temperature Corners, Monte-Carlo, and Worst-Case Corners. This study obtained a better FoM of -200.94 dBc/Hz. The simulation results and FoM of the proposed design show a considerably improved than state-of-the-art framework. This LC-VCO circuit study will be suitable for implementing the sub-6 GHz charge pump phase-locked loops (CP-PLLs) system for 5G applications.

A wideband and low-power mm-wave variable-gain phase shifter based on a source-switching scheme

This article presents a low-power and wideband variable-gain phase shifter (VGPS) designed and simulated in a CMOS 65 nm technology. It introduces a source-switching scheme for designing a variable gain amplifier (SSVGA) characterized by invariant linearity, impedance, and phase characteristics, showcasing improved gain and bandwidth compared to conventional VGAs. The current-reuse and staggered-tuning techniques are used to reduce power consumption and extend the bandwidth, respectively. The proposed VGPS enables gain tuning without the need for an additional gain tuning block, resulting in reduced chip area and sidelobe levels in phased array radar systems. The proposed VGPS, with a 5-bit resolution, achieves a 3-dB bandwidth of 18 GHz (53.5–71.5 GHz) and exhibits RMS gain error range from 0.23 to 0.5 dB and RMS phase error range from 0.54° to 2.65° with phase calibration based on simulation results. It achieves a peak average gain of 1.2 dB at 58.5 GHz while consuming a DC power consumption of only 5 mW with a 1.2 V power supply voltage. Moreover, it demonstrates a wide gain tuning of 20.6 dB, allowing for flexible gain adjustments.

Pre-test analysis of low power operations of STEAM, the EU-DEMO steam generator mock-up facility

While nuclear fusion reactors hold promise, their realization faces significant complexities, not only in the construction but also in managing the auxiliary systems required for safely operating plasmas. Pulsed plasma regime, integral to reactor normal operations, determines atypical operative conditions that can cause high thermal stresses on the components and generate instabilities. R&D activities are therefore required to characterize the components behavior in the extremely severe conditions of pressure and temperatures associated with fusion, especially during sudden power transitions. ENEA, as part of the EUROfusion consortium, is planning the construction of STEAM, an experimental facility aimed at qualifying the DEMO Steam Generator during pulse-dwell-pulse transitions within the W-HYDRA platform. Dedicated experimental campaigns will reproduce the low-power phase associated with the only material activation (dwell), the full-power phase (pulse) and the corresponding power transitions. This paper focuses on the low-power phase, presenting the performed RELAP5/Mod3.3 simulations, investigating the thermal-hydraulic performances of the system at 1 %, 5 % and 10 % of the nominal power, hence in conditions considerably different from fission standard practices. The simulation results are essential for defining regulation strategies for the SG test section and ensuring the correct operation of the entire system.

H3DM: A High-bandwidth High-capacity Hybrid 3D Memory Design for GPUs

Graphics Processing Units (GPUs) are widely used for modern applications with huge data sizes. However, the performance benefit of GPUs is limited by their memory capacity and bandwidth. Although GPU vendors improve memory capacity and bandwidth using 3D memory technology (HBM), many important workloads with terabytes of data still cannot fit in the provided capacity and are bound by the provided bandwidth. With a limited GPU memory capacity, programmers should handle the data movement between GPU and host memories by themselves, causing a significant programming burden. To improve programming ease, GPUs use a unified address space with the host that allows over-subscribing GPU memory, but this approach is not effective in terms of performance once GPUs encounter memory page faults. Many recent works have tried to remedy capacity and bandwidth bottlenecks using dense non-volatile memories (NVMs) and true-3D stacking. However, these works mainly focus on one bottleneck or do not provide a scalable solution that fits future requirements. In this paper, we investigate true-3D stacking of dense, low-power, and refresh-free non-volatile phase change memory (PCM) on top of state-of-the-art GPU configurations to provide higher capacity and bandwidth within the available area and power budget. The higher density and lower power consumption of PCM provide higher capacity through integrating more cells in each 3D layer and enabling stacking more layers. However, we observe that stacking more than six layers of pure-PCM memory violates the thermal constraint and severely harms the performance and power efficiency due to its higher write latency and energy. Further, it degrades the lifetime of GPU to less than one year. Utilizing a hybrid architecture that leverages the benefits of both DRAM and PCM memories has been widely studied by prior proposals; however, true-3D integration of such a hybrid memory architecture especially on top of state-of-the-art powerful GPU architecture has not been investigated yet. We experimentally demonstrate that by covering 80% of write requests in DRAM and eliminating refresh overhead, true-3D stacking of eight 32GB layers of PCM along with two 8GB layers of DRAM is possible resulting in a total of 272GB memory capacity. Based on the explored design requirements, We propose a 3D high-bandwidth high-capacity hybrid memory (H3DM) system utilizing a hybrid-3D (H3D)-aware remapping scheme to reduce expensive PCM writes to under 20% while avoiding DRAM refresh overhead. H3DM improves the performance up to 291% compared to the baseline GPU architecture while remaining within only 3% of an ideal case with DRAM-like access latency, on average. Moreover, by increasing the dataset size above the baseline GPU memory space, H3DM improves performance and power up to 648% and 87% compared to the baseline GPU architecture since it avoids expensive data transfers through off-chip communication links.

Impact of gas injection location and divertor surface material on ITER fusion power operation phase divertor performance assessed with SOLPS-ITER *

The ITER divertor design and performance assessment, primarily based on the SOLPS-4.3 burning plasma database (Pitts R. et al 2019 Nucl. Mater. Energy 20 100696), assumes the use of beryllium (Be) as the divertor surface material and the injection of gas from the main chamber top. However, the current ITER baseline favors gas injection from the more toroidally symmetric sub-divertor region. This paper evaluates the implications of these assumptions for divertor performance in the ITER fusion power operation phase. The impact of the divertor surface material and the gas injection location on the main ions mirrors the hydrogen only low power phase scenario shown in Park J.-S.et al (2020 Nucl. Fusion 61 016021). However, during burning plasma operation, extrinsic impurity seeding will be required. In the case of neon (Ne), studied here, impurity retention is influenced by both the divertor surface material and the fueling location. Neon leakage increases due to more energetic reflection from tungsten than beryllium, but equivalent divertor performance can be achieved by adjusting the neon seeding rate. While the impurity seeding location does not affect the distributions of impurity or radiation, the fueling location does. Top fueling provides local ionization sources mainly in the mid-SOL under detached conditions, enhancing divergences of the flux there (source-driven flow), bringing stagnation points close to the fueling location, and equilibrating flows towards both targets. In contrast, the global flow pattern (in the absence of fluid drifts) in the case of sub-divertor fueling is biased towards the inner target. Impurity flows, driven by force balance, largely mirror those of the main ion flow, including the stagnation point. The case with top fueling enhances Ne retention and corresponding radiation in the outer divertor, effectively reducing the total and peak target heat fluxes by 20%–40%, compared to the case with divertor fueling. Meanwhile, the case with outer target fueling also achieves similar reductions by enhancing plasma-neutral interactions. These results suggest the possibility that the selection of the fueling location and throughput can be used as an actuator to control impurity divertor retention and divertor radiation asymmetry.

Realization of fast-speed and low-power phase change memory by optimizing Ge10Sb90 film with samarium doping

In this paper, the Sm-doped Ge10Sb90 films were proposed and the effect of Sm doping on the crystal structure and electrical properties were investigated. The crystallization process of materials with different Sm concentrations was carried out by an in situ resistance measurement system, demonstrating that doping Sm can significantly improve the amorphous resistance, thermal stability, and bandgap of Ge10Sb90 film and alleviate the structural relaxation. X-ray diffraction, x-ray photoelectron spectroscopy, and transmission electron microscopy show that the appropriate content of Sm doping can hinder the grain growth process, limiting the grain size to a certain extent. The phase change memory devices with Sm-doped Ge10Sb90 were prepared based on the CMOS process, and their electrical properties were evaluated. The outcomes indicate that Sm doping can remarkably ameliorate the high RESET current required for Sb-rich Ge10Sb90 films during erasing/writing operation.

Preliminary analysis of startup transient for an ultra-small lithium-cooled space reactor power system

A multi-phases startup scheme based on the reactor startup first, followed by the closed Brayton cycle (CBC) machinery was proposed for the startup condition of an ultra-small lithium-cooled space reactor power system (ULCR) with a CBC conversion system concept scheme. The scheme minimizes the auxiliary motor power required for the turbomachinery startup. The overall startup process includes 7 phases. In the low-power operation phase, by controlling the turbomachinery shaft speed and helium-xenon (He–Xe) working fluid mass flow, the turbomachinery output power was balanced with the needed motor power. Therefore, the auxiliary equipment of the power conversion system was minimized. As the turbomachinery speed and He–Xe mass flow increased to the rated conditions, the core was in low temperature and low power steady-state operation, which was conducive to keep system in safety conditions for the automatic control system. With the reactivity insertion, the core temperature was finally increased to the rated operating condition, and the CBC conversion system's output power increased to the rated output power. The transient process of the designed startup scheme was calculated and analyzed by using the developed transient analysis program TACSNR. The results show that the change rate of the core average temperature at the rising phases was less than 1.1 K s−1. During the whole startup process, the parameters of the ULCR system are all in the safe range.

Low power and low phase noise complementary voltage controlled oscillator optimised by a meta‐heuristic algorithm

AbstractThis paper presents a differential complementary metal oxide semiconductor inductor‐capacitor voltage controlled oscillator (LC‐VCO). The VCO is adopted from the gate‐to‐source capacitor feedback Colpitts VCO which has the advantage of large value of negative conductance. Due to the large negative conductance, the VCO has a more reliable startup oscillation at the lower currents. The main characteristics of the VCO such as negative conductance, oscillation frequency and phase noise are discussed and analysed. The value of parameters in this circuit have been determined using Non‐dominated Sorting Genetic Algorithm (NSGA‐II) to have the optimum performance. The designed VCO oscillates at 2.76 GHz under a supply voltage of 1.4 V. Power dissipation of the proposed VCO is 873 μW which is significantly lower than that of some other VCOs. The post‐layout simulation results of the proposed VCO are presented and compared with the performance of some other VCOs.

Low-Power Process and Temperature-Invariant Constant Slope-and-Swing Ramp-Based Phase Interpolator

This article presents a process-and temperature-invariant high-resolution and highly linear low-power phase interpolator (PI) as an enabler for discrete-time spatial signal processors (SSPs) and for various mixed-mode RF transceiver architectures. Using current integration techniques, the proposed PI generates an adaptable constant slope-and-swing ramp signal to achieve significantly lower power suited for multiple antenna elements. Switched-capacitor-based bias generation enables tracking the ramp generator over process, voltage, and temperature enhancing the PI linearity. The 7-bit PI realized in the 65-nm CMOS technology can generate full delay range with a resolution of 4.88 ps at 1.6-GHz input frequency. The PI consumes a power of 503 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu$</tex-math> </inline-formula> W and occupies an active area of 0.021 mm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^2$</tex-math> </inline-formula> with a jitter of 0.410 ps for a 1.6-GHz operation and measured DNL and INL of 0.52 and 0.52 LSB, respectively.

Fused multi-model predictive control with adaptive compensation for proton exchange membrane fuel cell air supply system

Regulating the air supply is crucial for high efficiency and reliable operation of proton exchange membrane fuel cell systems (PEMFCs). In this study, a fused multi-model predictive control (FM-MPC) with an adaptive compensation is proposed for the oxygen excess ratio (OER) regulation of the air supply system. The FM-MPC is designed based on the linearized PEMFC model at low and high power phases, with two linear MPCs implemented and combined using adaptive featured weights. An adaptive compensation strategy is created to address the imbalance of the two MPCs and external load disturbances. The stability of the proposed control is analyzed using Lyapunov's second law. Simulation results demonstrate that the proposed method exhibits less overshoot and faster response than conventional MPCs, with the OER total sum-of-squares error (TSSE) reduced by 59.4% and 87.7% for New European Driving Cycle (NEDC) and Urban Dynamometer Driving Schedule (UDDS) conditions, respectively. Finally, a Hardware-In-the-Loop (HIL) experiment verifies the real-time application potential of the proposed controller, with a mean relative error (MRE) of 1.12% between experiment and simulation.

Fine particulate matter and gas emissions at different burn phases from household coal-fired heating stoves

Household coal burning contributes a large proportion of fine particulate matter (PM2.5), black carbon (BC), organic carbon (OC), and CO emissions in China. Previous lab or field investigations generally measured short-term emissions from heating coal stoves, and only covered the high power phase or the flaming combustion processes, and did not consider smoldering combustion condition, which does not provide full characterization of the actual conditions in most cases. In this study, we investigated air pollutant emissions during the different burn phases of seven types of coal burned in a typical household coal-fired heating stove in the lab with a hood sampling system. We proposed a method to estimate coal consumption at the different burn phases, and thus quantify emission factors (EFs) at different burn phases. The concentrations of CO2, CO, SO2, NOx, and PM2.5 fluctuated over 1 to 4 orders of magnitude during the whole burn cycle. The air pollutant concentration peaks, such as CO and PM2.5, were generally associated with coal addition. EFs of CO2, SO2, total water soluble inorganic ions (TWSIIs) followed the trend: high power phase > low power phase > banked fire phase. However, CO EFs followed the opposite trend, i.e., banked fire phase > low power phase > high power phase. EFs of NOx and EC in high power phase and low power phase were higher than those in banked fire phase. The variation in EFs of PM2.5 and OC in different burn phases across seven types of coal burned in this study is complicated. When using EFs from high power phase or flaming phase to represent EFs from the whole process, CO2, SO2, NOx, EC and TWSIIs emissions will be overestimated, CO emissions will be underestimated, PM2.5 and OC emissions may be overestimated or underestimated, depending on coal types.

GalEPR: A Galvanically Coupled Electron Paramagnetic Resonance Spectrometer for Deep Tissue Hypoxia Diagnosis

This work presents a galvanically coupled electron paramagnetic resonance spectrometer (GalEPR) for deep tissue oximetry and hypoxia diagnosis. Current in vivo EPR spectroscopy directly trades between the operation frequency (equivalent to sensitivity) and the penetration depth due to tissue absorption. Prior art is limited to 1.2 GHz/15 mm and 9 GHz/2 mm. To address this issue, a 30-MHz clock is galvanically coupled through the body to minimize attenuation and up-converted to 14 GHz by a low-power subsampling phase locked loop (SSPLL). The EPR spectrum is measured by an ultrasensitive low-power inductor sensor. The proposed GalEPR spectrometer demonstrates 14 GHz/50 mm frequency/depth (10 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times $ </tex-math></inline-formula> better) with an in vitro hypoxia detection experiment.

Monolithic integration of polymer waveguide phase modulators with silicon nitride waveguides using adiabatic transition tapers.

Polymer waveguide phase modulators (PMs) demonstrate high thermal confinement with outstanding thermo-optic properties and can provide stable low-power phase modulation in optical phased arrays (OPA). On the other hand, silicon nitride (SiN) waveguides produce stronger optical confinement with smaller waveguide core sizes than polymer waveguides and can handle high optical power without nonlinear effects. In this work, a high-performance PM was achieved by monolithic integration of a polymer waveguide and tapered SiN input and output waveguides. The integration of heterogeneous waveguide materials on a single substrate will enable the fabrication of efficient OPAs for advanced imaging, display, sensing, and communications applications.

Dead zone-less low power phase frequency detector, independent of duty cycle variations for charge pump phase locked loop

Dead zone-less low power phase frequency detector, independent of duty cycle variations for charge pump phase locked loop