Low Noise Power Research Articles

GRAPH — an readout ASIC for large MCP based detectors

We present a programmable 16 channel, mixed signal, low power readout ASIC, having the project historically named Gigasample Recorder of Analog waveforms from a PHotodetector (GRAPH). It is designed to read large aperture single photon imaging detectors using micro channel plates for charge multiplication, and measuring the detector's response on crossed strips anodes to extrapolate the incoming photon position. Each channel consists of a fast, low power and low noise charge sensitive amplifier, which provides a myriad of coarse and fine programmable options for gain and shaping settings. Further, the amplified signal is recorded using, to our knowledge novel, the Hybrid Universal sampLing Architecture (HULA) ADC. A kind of mixed signal double buffer memory, that enables concurrent waveform recording, and selected event digitized data extraction. The sampling frequency is freely adjustable between few kHz up to 125 MHz, while the chip's internal digital memory holds a history 2048 samples for each channel, with a digital headroom of 12 bits. An optimized region of interest sample-read algorithm allows to extract the information just around the event pulse peak, while selecting the next event, thus substantially reducing the operational dead time. The chip is designed in 130 nm TSMC CMOS technology, and its power consumption is around 47 mW per channel.

Acid-Induced in Situ Phase Separation and Percolation for Constructing Bi-Continuous Phase Hydrogel Electrodes With Motion-Insensitive Property.

Conductingpolymer hydrogels have gained attention in the bioelectronics field due to their unique combination of biocompatibility and customizable mechanical properties. However, achieving both excellent conductivity and mechanical strength in a hydrogel remains a significant challenge, primarily because of the inherent conflict between the hydrophobic nature of conducting polymers and the hydrophilic characteristics of hydrogels. To address this issue, this work proposes a simple one-step acid-induced approach that not only promotes the gelation of hydrophilic polymers but also facilitates the in situ phase separation of hydrophobic conducting polymers under mild conditions. This results in a distinctive bi-continuous phase structure with exceptional electrical property (906 mS cm-1) and mechanical performance (fracture strain of 1103%). The hydrogel forms robust percolating networks that maintain structural integrity under mechanical stress due to their entropic elasticity, providing remarkable strain insensitivity, low mechanical hysteresis, and an impressive resilience (95%). Electrodes fabricated from the conductive hydrogel exhibit stable and minimal interfacial contact impedance with skin (1-6 kilohms at 1-100Hz) and significantly lower noise power (4.9 µV2). This work believes that the motion-insensitive characteristics and mechanical robustness of this hydrogel will enable efficient and reliable monitoring of biological signals, establishing a new benchmark in the bioelectronics.

Analysis and Design of Low-Noise Radio-Frequency Power Amplifier Supply Modulator for Frequency Division Duplex Cellular Systems

This paper describes an analysis of power supply rejection and noise improvement techniques for an envelope-tracking power amplifier. Although the envelope-tracking technique improves efficiency, its power supply rejection ratio is much lower than that of average power tracking or a fixed-supply power amplifier. In FDD systems with the envelope-tracking technique, the low power supply rejection ratio generates much output noise in the RX band and degrades the receiver’s sensitivity. An SM is designed by using a 130 nm CMOS process, and the chip die area is 2 × 2 mm2 with a 25-pin wafer-level chip-scale package. The designed SM achieved peak efficiencies of 78–83% for LTE signals with a 5.8 dB PAPR and various channel bandwidths. For the low-output-noise-supply modulator, noise reduction techniques using resonant-frequency tuning and a notch filter are employed, and the measured results show maximum 1.8/5/5.3/3.8/3 dB noise reduction in LTE bands B17/B5/B2/B3/B7, respectively.

Mutual Synchronization of Spintronic Nano-Oscillator Ensembles

Introduction. The use of spintronic components significantly enhances the performance, reduces the size, and lowers the power consumption of modern electronic devices. The spintronic oscillator (SO) is an integral part of spintronic devices. Connecting several SOs (> 100) into ensembles with subsequent synchronization mitigates such SO drawbacks as low output power and high phase noise. These drawbacks appear as a result of an increase in the output power of an SO ensemble compared to a single oscillator under a simultaneous decrease in the spectral linewidth of the ensemble.Aim. To investigate the impact of connection topologies, synchronization mechanisms, and oscillator failures on the synchronization of oscillator ensembles.Materials and methods. The Kuramoto phase model was used to simplify the numerical modeling of synchronization of SOs connected into an ensemble.Results. A Kuramoto equation for phases of SOs connected in an ensemble was derived, and the influence of connection topologies and oscillator failures on the synchronization parameters of an ensemble of N connected oscillators was demonstrated.Conclusion. In order to ensure the shortest transition time of an SO ensemble to the synchronous mode, topologies with a higher number of connections between oscillators (e.g., "all-to-all") are preferable. The results obtained confirm the advantages of local connection of an SO ensemble by a common current, thus forming an "all-to-all" topology. This makes the transition time of the SO ensemble to the synchronous mode less dependent on both oscillator failures and the number of synchronized SOs.

Conversion of 30 W laser light at 1064 nm to 20 W at 2128 nm and comparison of relative power noise

Abstract All current gravitational wave (GW) observatories operate with Nd:YAG lasers with a wavelength of 1064 nm. The sensitivity of future GW observatories could benefit significantly from changing the laser wavelength to approximately 2 µm combined with exchanging the current room temperature test mass mirrors with cryogenically cooled crystalline silicon test masses with mirror coatings from amorphous silicon and amorphous silicon nitride layers. Laser light of the order of ten watts with a low relative power noise (RPN) would be required. Here we use a laboratory-built degenerate optical parametric oscillator to convert the light from a high-power Nd:YAG laser to 2128 nm. With an input power of 30 W, we achieve an output power of 20 W, which corresponds to an external conversion efficiency of approximately 67%. We find that the RPN spectrum marginally increases during the wavelength conversion process. Our result is an important step in the development of low-noise light around 2 µm based on existing low-noise Nd:YAG lasers.

A low power low phase noise wide frequency range PLL

This paper presents a low-noise, low-power, wide output frequency range phase-locked loop (PLL) for WLAN/WiFi transceivers. By employing a dual-symmetric CMOS cross-coupled pair differential inductor voltage-controlled oscillator (VCO), the design achieves low phase noise. In addition, an improved phase frequency detector (PFD) and a programmable low-mismatch charge pump (CP) with feedback compensation bias control are used to mitigate bandwidth and noise variations caused by different reference frequencies. The improved charge pump PLL (CPPLL) is designed in 65 nm CMOS process, and the chip layout occupies an area of 0.28 mm2. Post-layout simulation results indicate that the PLL has a tuning range of 4.6 GHz to 6 GHz, a phase noise of 111.7 dBc/Hz at 1 MHz offset at 5 GHz, a total power consumption of 7.14 mW, and a lock time of about 9μs.

Model-Based Causal Feature Selection for General Response Types

Discovering causal relationships from observational data is a fundamental yet challenging task. Invariant causal prediction (ICP, Peters, Bühlmann, and Meinshausen) is a method for causal feature selection which requires data from heterogeneous settings and exploits that causal models are invariant. ICP has been extended to general additive noise models and to nonparametric settings using conditional independence tests. However, the latter often suffer from low power (or poor Type I error control) and additive noise models are not suitable for applications in which the response is not measured on a continuous scale, but reflects categories or counts. Here, we develop transformation-model (tram) based ICP, allowing for continuous, categorical, count-type, and uninformatively censored responses (these model classes, generally, do not allow for identifiability when there is no exogenous heterogeneity). As an invariance test, we propose tram-GCM based on the expected conditional covariance between environments and score residuals with uniform asymptotic level guarantees. For the special case of linear shift trams, we also consider tram-Wald, which tests invariance based on the Wald statistic. We provide an open-source R package tramicp and evaluate our approach on simulated data and in a case study investigating causal features of survival in critically ill patients. Supplementary materials for this article are available online, including a standardized description of the materials available for reproducing the work.

One-third octave spectrum calculation to meet the attenuation limits of a Class 1 analyzer (IEC 61260-1:2014) for low-power noise sensors

Thanks to the advances in technology and the cost reductions of electronic components, nowadays it is possible to produce low-cost and low-power acoustic sensors with extended capabilities such as the one-third octave band spectrum calculation. However, there are some doubts about the accuracy of these devices. Thus, to meet the attenuation limits of a Class 1 analyzer for low frequencies as stated in IEC 61260-1:2014 normative, this research proposes two algorithms to calculate the one-third octave band spectrum, both algorithms are based on the Power Spectral Density (PSD). The first one consists of a subdivision of frequency bins, where a PSD bin is divided into smaller parts, gain adjusted, and assigned to its corresponding one third-octave band. The other one is based on signal decimation-accumulation, where samples, that are processed every 125 ms due to the sensor design, are first decimated and then accumulated to increase the frequency bin resolution. Both algorithms are programmed into the sensor and the power consumption and acoustical performance are evaluated and compared to a typical multi-rate filter bank. It is observed that both proposed algorithms improve the performance of the low-cost sensor in terms of energy consumption and accuracy.

Research on the influence of different organizational structures on the electrical life of sealed relays

Abstract A sealed relay is a type of power relay mainly used in fields with harsh environments, low noise requirements, or high-reliability requirements. It is used in scenarios such as vehicle loads, household appliances, industrial control, and motors. At the same time, when the input meets certain specified conditions, it is a device that can generate a jump in one or more electrical output circuits, playing a role in controlling the on/off current of the connected circuit. Power relays have been widely used in various fields due to their small size, low noise, and low power consumption advantages. This article mainly studies the electrical parameters such as arc energy, arc time, welding force, and contact burning principle of silver tin oxide electrical contact materials produced by different processes, providing a reference for the development of electrical contact materials.

Pico-ampere resolution current measurement circuit using Gm-C filter sigma-delta modulator for low-power nanopore DNA sequencing

New generation DNA sequencers use an array of electrochemical cells equipped with nanopores, which produce pico-ampere current levels. Due to the large number of channels, low current levels and bandwidths in the order of a few kHz, in the design of these readout circuits, 2D arrays of in-channel, low noise and low power analog to digital converters are preferred. Previously many different sigma-delta modulators have been presented to convert the nanopore current signal into a digital code. Conventionally, the opamps required in these converters will eventually increase the power dissipation of each channel. In this paper a novel Gm-C filter based second order sigma-delta converter is proposed. In the given design, rather than relying on multiple opamps to achieve the necessary gain and noise performance, only a 4 transistor Gm block is used. Evaluations show that while the input referred noise remains close to previous methods, the power dissipation is considerably reduced. A prototype is also implemented to show the effectiveness of the approach. In a 180-nm design, an ENOB of 12.16 bits, RMS input referred noise of 0.2 pA at 10 kHz bandwidth and power dissipation of 8.27 μW is obtained per channel.

High-efficiency, single-frequency, polarized thulium-doped silica fiber lasers.

We report on single-frequency, linearly polarized, high-concentration thulium-doped silica fiber-distributed Bragg reflector lasers operating at wavelengths between 1908 and 2050 nm with high efficiencies up to 48% and high powers up to 1 W. Low relative power noise and frequency noise are demonstrated using a low-noise pump diode.

A low power and low noise bandgap reference design

A low power and low noise bandgap reference design

16-channel 200-GHz-spacing RW-DFB laser array with low noise and high output power.

We experimentally demonstrated a ridge waveguide (RW) distributed feedback (DFB) continuous-wave (CW) laser array with high output power, low relative intensity noise (RIN) and narrow linewidth for all 16 channels with 200-GHz-spacing. The ridge waveguide is formed above an offset-quantum-well structure to increase single transverse mode waveguide width to 8-µ;m for higher output power and lower noise. A relatively long cavity length of 800-µm as well as a backup laser technique are introduced to achieve good single mode stability. The fabricated RW-DFB laser array realizes the maximum power over 85 mW, RIN lower than -155 dB/Hz and Lorentzian linewidth below 250 kHz for each channel laser. Besides, the side mode suppression ratio (SMSR) is over 51 dB for all 16 channels. These features can help to boost the application in wavelength dimension multiplexed system.

Field-theoretic approach to neutron noise in nuclear reactors.

An operating nuclear reactor is designed to maintain a sustained fission chain reaction in its core, which results from a delicate balance between neutron creations (i.e., fissions) and total absorptions. This balance is associated with random fluctuations that can have two, very different, origins. A distinction must thus be made between low-power noise, whose origin lies in the inherently stochastic nature of neutron interactions with matter, and high-power noise, whose origin lies in the particular thermomechanical constraints associated with the environment in which neutrons propagate. Modeling the behavior of this noisy neutron population with the help of stochastic differential equations, we first show how the Martin-Siggia-Rose-Janssen-De Dominicis (MSRJD) formalism, providing a field theoretical representation of the problem, reveals a convenient and adapted tool for the calculation of observable consequences of neutron noise. In particular, we show how the MSRJD approach is capable of encompassing both types of neutron noises in the same formalism. Emphasizing then on power noise, it is shown how the self-sustained chain reaction developing in a reactor core might be sensitive to noise-induced transitions. Establishing an unprecedented connection between the neutron population evolving in a reactor core and the celebrated Kardar-Parisi-Zhang (KPZ) equation, we indeed find evidence that a noisy reactor core power distribution might be subject to a process analogous to the roughening transition, well-known to occur in systems described by the KPZ equation.

An ultrahigh input impedance low noise analog front‐end design for epilepsy brain recording system

SummaryThis paper presents an ultrahigh input impedance, low noise, and wide bandwidth four‐channels analog front‐end (AFE) for low‐power neural recording systems. To achieve high input impedance, the buffer channels are placed between the electrodes and the main amplifier stage of the AFE. The buffer is designed with low noise and low power consumption to obtain high input impedance of overall AFE while maintaining low input‐referred noise and low power consumption. A chopper capacitively coupled chopper instrumentation amplifier (CCIA) is placed after the buffer as the main amplifier stage of the AFE to improve the common mode rejection ratio (CMRR) and the input‐referred noise of the overall AFE design. A new chopper stabilization control technique is proposed and used in the CCIA stage to reduce the charge injection and clock feedthrough and consequently the high‐frequency ripple of the AFE output signal. A programmable gain amplifier (PGA) is designed as the third stage to adjust the overall gain of the AFE. Benefiting from PGA, the AFE can adapt its gain with both action potential and local field potential signals. To reduce the number of the electrode to be implanted and reduce the impedance mismatch that causes the degradation on overall CMRR performance, two AFE channels shared a reference electrode followed by a reference buffer. The proposed AFE is designed and simulated using a standard 180 nm CMOS process and operates in a wide frequency band of 2.1 to 2500 Hz with low input‐referred noise of 1.6 μVrms and a CMRR over 80 dB at 2.1 Hz. The total power consumption is lower than 4.3 μW per channel. With the proposed structure of AFE, the input impedance is 35 GΩ @ 21 Hz and the minimum impedance over operational bandwidth is 75 MΩ @ 2.5 kHz.

Design of low power and low phase noise LC-VCO for Bluetooth/WLAN applications

The proposed Inductor-Capacitor Voltage-Controlled Oscillator (LC-VCO) prototype design generates 2.45 GHz to 4.58 GHz of frequency using the Cadence UMC 180 nm process with a 1.8V supply. This architecture carried a new viewpoint on tank design put forth by enhancing the varactor tuning. Here, the circuit employs a CMOS differential cross-coupled pair, and rail-to-rail DC biasing achieves a higher voltage swing. Simulation analysis parameters are measured at 2.45 GHz frequency, phase noise is −123.5 dBc/1 MHz offset, power is 3.5 mW, jitter is 0.232 fsec, and it occupies 0.118 μm2 layout area. Additionally, the simulations have been extended for analysis under Process Voltage and Temperature Corners, Monte-Carlo, and Worst-Case Corners. This study obtained a better FoM of -200.94 dBc/Hz. The simulation results and FoM of the proposed design show a considerably improved than state-of-the-art framework. This LC-VCO circuit study will be suitable for implementing the sub-6 GHz charge pump phase-locked loops (CP-PLLs) system for 5G applications.

180 nm NMOS voltage-controlled oscillator for phase-locked loop applications

<p>The voltage-controlled oscillator (VCO) is the primary device in the phase-locked loop (PLL) to produce the local oscillator frequency. The excessive phase noise of VCOs is the primary cause of PLL performance loss. This paper proposes the design and optimization of low phase noise and low power consumption for a 180 nm N-channel metal-oxide semiconductor NMOS VCO for PLL applications with P-channel metal-oxide semiconductor PMOS varactors and spiral inductors. At 2 V supply voltage, the optimized NMOS VCO has a power consumption of 21 mW, a phase noise of -130 dBc/Hz at 1 MHz offset and a total harmonic distortion (THD) of 3.9%. The proposed design is verified by PSpice simulations. A new criterion is proposed for optimizing NMOS LC oscillators.</p>

High magnetic performance ultra-thin Fe-6.5Si ribbons fabricated by planner flow casting and annealing

Fe-6.5 wt.%Si steel is one of the most attractive soft magnetic materials for making iron cores with low noise and low power loss. The planner flow casting method was regarded as a promising method to obtain ultra-thin ribbons of Fe-6.5Si alloy. In this study, Fe-6.5Si ribbons with a thickness of 0.03 mm were prepared by planner flow casting. Samples were heat-treated at various temperatures. It is revealed that the grain size on the wheel surface and free surface gradually increases with increasing annealing temperature. The initial {100} fiber texture of the wheel and free surfaces is weakened after annealing, transforming to {001} 〈510〉 on the wheel surface and to {229} < 11 2 2 > on the free surface after annealing at 1150 °C for 1 h. The texture parameter and dislocation density are the key factors affecting the magnetic induction intensity, showing an inverse correlation with the texture parameter and dislocation density. Furthermore, the iron loss is mainly influenced by the grain size, with an optimal grain size of 10 μm. Considering the magnetic induction intensity and iron loss, the optimal annealing temperature is determined to be 1100 °C, resulting in a magnetic induction intensity of B8 = 1.26 T and B50 = 1.65 T, and iron loss values of P1/400 = 14.1 W/Kg and P0.2/5000 = 11.1 W/Kg.

Design analysis of a multi-port 8-shaped inductor for RF applications

Portable wireless devices with a high-frequency range should also function with low voltage, providing low power dissipation and noise. Design engineers cannot successfully meet the above design objectives without using RF inductors. Since integrated inductors are an essential part of RF circuits, these devices are highlighted because of their enormous size in the circuit layout and unsettling radiations. As a result, there is a solid motivation to design, optimize, and model inductors made on Si substrates. This article presents the design of a multi-path multi-port 8-shaped inductor with dimensions of 150 × 150 μm, simulated using Cadence EMX simulator to analyze its Q-factor and inductance. The analysis provided that the simulated inductance has the highest value of 12.2 nH, which is the maximum value across all the conclusions of this research. Another significant discovery was that this Inductor is suitable for up to 45 GHz. To achieve an improved frequency of operation for the multi-path, multi-port 8-shaped Inductor, an analysis of the Inductor’s topology is conducted, focusing on enhancing the loop widths of metal layers and optimizing spacing between the metal tracks.

Low power and low phase noise complementary voltage controlled oscillator optimised by a meta‐heuristic algorithm

AbstractThis paper presents a differential complementary metal oxide semiconductor inductor‐capacitor voltage controlled oscillator (LC‐VCO). The VCO is adopted from the gate‐to‐source capacitor feedback Colpitts VCO which has the advantage of large value of negative conductance. Due to the large negative conductance, the VCO has a more reliable startup oscillation at the lower currents. The main characteristics of the VCO such as negative conductance, oscillation frequency and phase noise are discussed and analysed. The value of parameters in this circuit have been determined using Non‐dominated Sorting Genetic Algorithm (NSGA‐II) to have the optimum performance. The designed VCO oscillates at 2.76 GHz under a supply voltage of 1.4 V. Power dissipation of the proposed VCO is 873 μW which is significantly lower than that of some other VCOs. The post‐layout simulation results of the proposed VCO are presented and compared with the performance of some other VCOs.