Low Etch Rate Research Articles

Black GaAs by Metal-Assisted Chemical Etching.

Large area surface microstructuring is commonly employed to suppress light reflection and enhance light absorption in silicon photovoltaic devices, photodetectors, and image sensors. To date, however, there are no simple means to control the surface roughness of III-V semiconductors by chemical processes similar to the metal-assisted chemical etching of black Si. Here, we demonstrate the anisotropic metal-assisted chemical etching of GaAs wafers exploiting the lower etching rate of the monoatomic Ga<111> and <311> planes. By studying the dependence of this process on different crystal orientations, we propose a qualitative reaction mechanism responsible for the self-limiting anisotropic etching and show that the reflectance of the roughened surface of black GaAs reduces up to ∼50 times compared to polished wafers, nearly doubling its absorption. This method provides a new, simple, and scalable way to enhance light absorption and power conversion efficiency of GaAs solar cells and photodetectors.

The Maximum Positive Curvature Recognition Method to Determine Etch Profiles in Wet Etching of Quartz on AT and BT Cuts

This paper presents a method to quickly determine the transient and stable profiles of trenches, cavities, and mesas formed by anisotropic wet chemical etching on AT and BT cut quartz wafers. Since most quartz orientations have low etch rates and both AT and BT cuts have no trigonal symmetry (unlike the Z cut), it is typically difficult to explain which sidewalls will appear on a given trench for a particular mask alignment on these cuts. By considering the complete etch rate distribution obtained from an etched quartz hemisphere we show that a maximum positive curvature recognition method can be used in order to determine a small number of key orientations, which will directly appear as the transient and stable sidewalls in the experimental trench profiles on both the AT and BT cuts. Similarly, the proposed method accurately explains the formation of complex facets on square cavities as well as on the top, middle and bottom regions of micro-needle arrays etched on the AT and BT cuts. This indicates that the etch profiles of any cut of the trigonal crystal can be determined by using the location of the proposed key orientations. [2017-0254]

Robust SiNx/GaN MIS-HEMTs With Crystalline Interfacial Layer Using Hollow Cathode PEALD

In this letter, we report gallium nitride-based metal-insulator-semiconductor high-electron-mobility transistors (GaN MIS-HEMTs) with a 16-nm-thick silicon nitride (SiN x ) gate insulator and surface passivation layer grown using low-temperature (300 °C) hollow cathode plasma-enhanced atomic layer deposition. Tris(dimethylamino) silane and a remote N2 plasma were used as the silicon precursor and the nitrogen co-reactant, respectively. Though the growth temperature was as low as 300 °C, we obtained excellent film properties such as a high refractive index (2.00), a high film density (2.9 g/cm3), and a low wet etch rate (0.8 nm/min) in 100:1 hydrofluoric acid. High-resolution transmission electron microscopy images of the gate stacks showed ~1.5 nm $\beta $ -phase Si3N4 crystalline interfacial layer on the GaN surface. The devices showed a negligible hysteresis of ~50 mV, a steep subthreshold slope of 76 mV/dec, and a high ON/OFF drain current ratio of ~109. In addition, the devices showed a small positive/negative bias temperature threshold voltage ( ${V}_{\text {th}}$ ) instability ( $\Delta {V}_{\text {th}}\le 0.2$ V at 25 °C and 150 °C) as well as a mitigated current collapse under an off-state quiescent ${V}_{\text {DS}}$ of 20 V.

Low Temperature Thermal ALD of Silicon Nitride Utilizing a Novel High Purity Hydrazine Source

The demand for faster, smaller and more energy efficient logic devices as well as higher density, higher speed, and increased reliability for advanced memory devices has led to numerous challenges in Semiconductor device manufacturing. Novel metal materials, 3D architecture and increasing High-aspect-ratio (HAR) structures are being used to address these challenges, however this has placed additional constraints on film deposition methods. CVD and ALD of SiN are used in several applications including, gates, spacers, etch stops, liners, encapsulation layers as well as passivation layers.1 Recently PEALD of SiN is taking on an increasingly important role due to new temperature constraints of <400°C. However, several challenges remain on HAR and 3D structures in applications where plasma approaches may not meet conformality requirements. In addition, thermal ALD with NH3 may not be feasible due to the high temperature requirement (500°C-700°C) of these reactions.2 Our approach involves the development and use of a novel hydrazine delivery system in order to develop methods for thermal ALD of SiN at <400°C. The resulting films must meet requirements of high growth rate, high density, and low wet etch rate similar to materials grown by thermal ammonia ALD at 600°C, or Ammonia PEALD at 400°C or less. In addition, the methods developed must show promise for highly uniform growth on 3D and HAR structures where PEALD methods currently have difficulties. A hydrazine delivery system was developed to provide a stable flow of ultra-dry hydrazine gas from a liquid source in a sealed vaporizer. The liquid source combines anhydrous hydrazine and a proprietary solvent that acts as a stabilizer. The solvent is highly non-volatile, where high purity hydrazine gas may be generated in-situ and delivered to the deposition chamber while the solvent remains in the vaporizer. Testing confirms that hydrazine vapor pressure is maintained at levels viable for ALD (12-14 torr) even in the presence of the solvent used to dilute the liquid source to safe handling levels. Previous studies with hydrazine were plagued by oxygen contamination.3 This study demonstrates high purity hydrazine delivery at <800ppb water contamination in the gas phase. Delivery system safety and optimization versus conventional hydrazine will be addressed. A study of silicon nitride deposition was conducted using hexacholorodisilane (HCDS) and hydrazine on a Si-H substrate. A custom made thermal ALD reactor was used to deposit silicon nitride films from 250-400°C. Film growth per cycle (GPC) with hydrazine was 0.4-0.5 Å/cycle at 400°C with refractive index of 1.813. Film stoichiometry was confirmed with X-ray photoelectron spectroscopy. SiN films with low impurities were achieved for oxygen (<2%) and chlorine (<1%). Highly uniform films were obtained across a 4 inch wafer for 200 as well as 400 cycles. Results were similar to films deposited using PEALD at 360°C with HCDS and NH3. Film growth and resulting properties at 350°C closely resemble those grown thermally at 400°C for hexachlorodisilane and hydrazine. Some discrete differences in film density and composition start to become apparent at a growth temperature of 325°C. Specifically, film density decreases and wet etch rate increases. The presentation will compare growth rates, film density, refractive index and wet etch rate results at different temperatures for hydrogen terminated silicon. Initial growth studies with the use of Hydrazine and Organosilicon Amide precursors will also be discussed.

Friction-induced fabrication of flexible supercapacitive microelectrodes

With miniaturized electronic devices becoming increasingly pervasive, micro energy storage devices have attracted great attentions. Micro-supercapacitors have great potentials due to its long lifetime and high power densities. Here we demonstrate low-cost and lithography-free fabrication of flexible micro-supercapacitive electrodes over large areas by friction-induced nanofabrication of silicon nanostructures array and electrodeposition of MnO2 nanostructures. The silicon nanostructures are fabricated by sliding a diamond tip on Si(100) surface under a given normal load combined with wet etching in potassium hydroxide (KOH) solution. Since the scratched pattern shows lower etching rate than that of non-scratched surface in KOH solution, such pattern can served as an etching mask to protect the silicon below from etching to some degree. Hence, the hillock silicon nanostructures can be realized on Si(100) surface. After reverse moulding, metal film sputtering and MnO2 nanostructures integration, the flexible microelectrodes are fabricated and show good electrochemical performances. The proposed friction-induced fabrication method has potential in bio-implantable and wearable miniaturized devices.

Inductively Coupled Plasma Etching and Electrically Active Damage of Bulk, Single-Crystal Ga2O3

Monoclinic β phase Ga2O3 is attracting great attention for high power electronics, military applications, and solar blind photodetectors for deep-UV detection, all because of its large direct bandgap (~4.9 eV) and theoretical critical electric field (EC) strength of 8 MV/cm. [1,2,3] There has been a tremendous achievement in both bulk and epitaxial growth of β-Ga2O3. The large bulk β-Ga2O3 is commercially available, and n-type epistructures are also coming onto the market in limited quantities.[4] Record high Vertical diode fabricated on β -Ga2O3 with a reverse breakdown voltage of 1600 V was demonstrated[5], and Ga2O3 based variety of electronic devices have also been reported including metal-semiconductor field-effect transistors, depletion-mode metal-oxide-semiconductor field-effect transistors, and finfets fabricated on either bulk or thin films.[6,7,8,9] It is quite clear that more organized study of etching is needed for intradevice isolation or for exposing layers in gate recess processing for subsequent Schottky gate formation. While numerous wet etchants have been reported for Ga2O3, including HNO3/HCl, H2SO4, H3PO4 and HF-based solutions,[10,11] not too much is known about its dry etching characteristics and the associated mechanisms and effects on the optical properties of the material. In this study, we will report the effect of dry etching conditions on etching rates and damage induced by the ion bombardment on vertical β-Ga2O3 rectifiers. A Plasma Therm 760 Inductively Coupled Plasma (ICP) system was employed for dry etching by varying the ICP power ranging from 100 to 800W, chuck power (15-400 W) with either Cl2/Ar or BCl3/Ar discharges. The highest etch rate achieved was ~130 nm/min using 800 W ICP source power and 200 W chuck power (13.56 MHz). The etched Ga2O3 surfaces become oxygen-deficient under strong ion-bombardment conditions, and the electrically active damage introduced during etching was quantified using Schottky barrier height and diode ideality factor measurements. For low etch rate conditions (~12 nm/min) at low powers (150 W ICP source power at 2 MHz and 15 W rf chuck power at 13.56 MHz). There was only a small decrease in reverse breakdown voltage (~6%) while the Schottky barrier height decreased from 1.2 eV to 1.01 eV and the ideality factor increased from 1.00 to 1.06. Under higher etch rate (~70 nm/min) and power (400 W ICP and 200 W rf power) conditions, the damage was more significant, with the reverse breakdown voltage decreasing by ~35%, the barrier height was reduced to 0.86 eV and the ideality factor increased to 1.2. By annealing the etched samples at 450°C, the Schottky barrier height, diode ideality factor and reverse breakdown voltage were restored as compared to the reference sample. I. Stepanov, V.I. Nikolaev, V. E. Bougrov and A.E. Romanov, Rev. Adv. Mater. Sci., 44, 63 (2016).Higashiwaki, K. Sasaki, H. Murakami, Y. Kumagai, A. Koukitu, A. Kuramata, T. Masui and S. Yamakosh, Semicond. Sci. Technol., 31, 034001 (2016).Higashiwaki, K. Sasaki, A. Kuramata, T. Masui and S. Yamakoshi, Appl. Phys. Lett., 100, 013504 (2012).Higashiwaki, K. Sasaki, H. Murakami, Y. Kumagai, A. Koukitu, A. Kuramata, T. Masui and S. Yamakosh, Semicond. Sci. Technol., 31, 034001 (2016).Yang, S. Ahn, F. Ren, S. J. Pearton, S. Jang, and A. Kuramata, IEEE Electron Device Lett,. 38(7), 906 (2017).H. Wong, K. Sasaki, A. Kuramata, S. Yamakoshi and M. Higashiwaki, IEEE Electr. Dev. Lett., 37, 212 (2016).Michele Baldini, Martin Albrecht, Andreas Fiedler, Klaus Irmscher, Robert Schewski, and Günter Wagner, ECS J. Solid State Sci. Technol. 6, Q3040 (2017).Higashiwaki, K. Sasaki, H. Murakami, Y. Kumagai, A. Koukitu, A. Kuramata, T. Masui and S. Yamakosh, Semicond. Sci. Technol., 31, 034001 (2016).Shihyun Ahn, Fan Ren, Janghyuk Kim, Sooyeoun Oh, Jihyun Kim, Michael A. Mastro and S. J. Pearton, Appl. Phys. Lett.109, 062102 (2016).Takayoshi Oshima, Takeya Okuno, Naoki Arai, Yasushi Kobayashi and Shizuo Fujita, Jpn. J. Appl. Phys. 48, 040208 (2009)Shigeo Ohira and Naoki Arai, Phys. Stat. Sol. (c) 5, No. 9, 3116-3118 (2008)

Novel Cyclosilazane-Type Silicon Precursor and Two-Step Plasma for Plasma-Enhanced Atomic Layer Deposition of Silicon Nitride.

We designed cyclosilazane-type silicon precursors and proposed a three-step plasma-enhanced atomic layer deposition (PEALD) process to prepare silicon nitride films with high quality and excellent step coverage. The cyclosilazane-type precursor, 1,3-di-isopropylamino-2,4-dimethylcyclosilazane (CSN-2), has a closed ring structure for good thermal stability and high reactivity. CSN-2 showed thermal stability up to 450 °C and a sufficient vapor pressure of 4 Torr at 60 °C. The energy for the chemisorption of CSN-2 on the undercoordinated silicon nitride surface as calculated by density functional theory method was -7.38 eV. The PEALD process window was between 200 and 500 °C, with a growth rate of 0.43 Å/cycle. The best film quality was obtained at 500 °C, with hydrogen impurity of ∼7 atom %, oxygen impurity less than 2 atom %, low wet etching rate, and excellent step coverage of ∼95%. At 300 °C and lower temperatures, the wet etching rate was high especially at the lower sidewall of the trench pattern. We introduced the three-step PEALD process to improve the film quality and the step coverage on the lower sidewall. The sequence of the three-step PEALD process consists of the CSN-2 feeding step, the NH3/N2 plasma step, and the N2 plasma step. The H radicals in NH3/N2 plasma efficiently remove the ligands from the precursor, and the N2 plasma after the NH3 plasma removes the surface hydrogen atoms to activate the adsorption of the precursor. The films deposited at 300 °C using the novel precursor and the three-step PEALD process showed a significantly improved step coverage of ∼95% and an excellent wet etching resistance at the lower sidewall, which is only twice as high as that of the blanket film prepared by low-pressure chemical vapor deposition.

A Design for Selective Wet Etching of Si3N4/SiO2 in Phosphoric Acid Using a Single Wafer Processor

Using single-wafer processors in the wet process implementation is a tendency for advanced semiconductor manufacturing due to the advantages of free contamination, flexible process control, and an improved particle removal efficiency without pattern damage. However, in the process of silicon nitride removal, not only the cost concern of phosphoric acidic consumption but also the process performances including etching rate, uniformity, and selectivity, are the barrier that makes this process hard to be switched to the single-wafer type from the bench type. Here we propose a novel design which introduces an upper-wafer heater plate to keep high temperatures of the phosphoric acid etchant in order to overcome the common issues of low etching rate, poor uniformity, and low selectivity in single-wafer processors suffering in the nitride strip process. In this work, the interactive influences of the operation variables, such as rotation speed, puddle time, and temperature, in the single wafer processor on the etching rate, uniformity, and selectivity are investigated to gain a deep understanding on this process. The etching selectivity obviously decreases from ca. 100 to 60 when the H3PO4 temperature is increased from 144 to 154°C while the introduction of a heater plate has been demonstrated to sharply promote the etching selectivity.

Effects of a power and photon energy of incident light on near-field etching properties

We developed a near-field etching technique for realizing an ultra-flat surfaces of various materials and structures. To elucidate the near-field etching properties, we have investigated the effects of power and the photon energy of the incident light. First, we established theoretically that an optical near-field with photon energy lower than the absorption edge of the molecules can induce molecular vibrations. We used nanodiamonds to study the power dependence of the near-field etching properties. From the topological changes of the nanodiamonds, we confirmed the linear-dependence of the etching volume with the incident power. Furthermore, we studied the photon energy dependence using TiO2 nanostriped structures, which revealed that a lower photon energy results in a lower etching rate.

Ultra-low rate dry etching conditions for fabricating normally-off field effect transistors on AlGaN/GaN heterostructures

Enhancement-mode transistors with uniform turn-on threshold voltage (Vth) can be achieved using low damage and low rate gate recess etching techniques. In this work, dry etching conditions for a AlGaN/GaN heterostructure with an ultra-low etching rate of 1.5 nm/min were demonstrated and we succeeded the possibility to achieve a low etch rate of an AlGaN/GaN heterostructure in a Cl2/BCl3 plasma using inductively coupled plasma (ICP). The etching development was successfully implemented in the achievement of a normally-off GaN/AlGaN based transistor. The optimal recess depth was determined after fabrication of various devices with different recess depth values and with various dry etching conditions and after examining the performances of fabricated devices various conditions, and determining the dependence of recess time. The optimized etching condition resulted in low damage and smooth morphology of the etched AlGaN/GaN surfaces. Fine control of the depth of the gate region recess was achieved for the AlGaN/GaN heterostructure without any etch-stop layer, and validated for the fabrication of field effect transistors (FETs) using conventional processes. The fabricated normally-off Al2O3/AlGaN/GaN MOSFETs delivered a high positive Vth of +5.64 V with a low off-state leakage current of ∼10−7 A/mm and lower current collapse.

Transient and Stable Profiles During Anisotropic Wet Etching of Quartz

This paper presents a comprehensive analysis of the transient (short-term) and stable (long-term) cross-sectional profiles of elongated trenches formed by anisotropic wet etching on Z-cut quartz. Because all quartz planes parallel (and near-parallel) to the [0001] direction display very low (and dissimilar) etch rates, dramatically different profiles are observed depending on the particular mask alignment of the trench edges with respect to the substrate. Nevertheless, the profiles can be easily predicted by identifying the location of a few key orientations for each trench profile. This is done by measuring the etch rate distribution on a hemispherical specimen of quartz and locating the local maxima of the (signed) curvature of the etch rate for all planes parallel to the trench edges. We show that this generalizes the traditional method based on locating the local minima of the etch rate. Furthermore, our approach enables capturing accurately the etch front by applying the traditional Wulff–Jaccodine construction on just a few key orientations, thus greatly simplifying the use of that method and highlighting the simplicity and importance of the proposed key orientations. A maximum positive curvature recognition method is developed based on applying the moving average filter to the calculation of the first, second, and third order derivatives of the etch rate. This allows quick locating of all orientations that will appear on the short-term and long-term profiles, even for the complete etch rate distribution, thus helping the design of desired profiles with vertical (or nearly vertical) side walls. Furthermore, the proposed maximum positive curvature recognition method accurately explains the formation of complex facets on square cavities, as well as on the top, middle, and bottom regions of micro-needle arrays etched on quartz Z-cuts. [2017-0025]

Micro-structure of ITO ceramics sintered at different temperatures and its effect on the properties of deposited ITO films

Structural characterizations of two ITO ceramics that were respectively sintered at 1560°C and 1600°C were focused on and the results indicate that the lower sintering temperature is good for ITO ceramics to have the triangle fine grains, larger elemental concentration gradients of indium and tin and more content of In4Sn3O12 phase which displays the stronger grain orientation growth along the crystallographic direction of [0-11]. ITO films with 100nm thickness deposited at 25°C–230°C were used to investigate the effect of micro-structure on the film properties. Grain orientation growth of In4Sn3O12 phase is conductive to form ITO films of columnar structure. Otherwise, uniform micro-structure and higher solubility of SnO2 in In2O3 main phase contribute to deposit ITO films of higher sheet resistance, less thickness uniformity and higher transmittance at 25°C, smaller etching angle and lower etching rate at 230°C.

(Invited) ScAlN: A Novel Barrier Material for High Power GaN-Based RF Transistors

GaN-based high-electron-mobility transistors (HEMTs) have established a ten-fold increase in power density over incumbent GaAs technology over a wide range of RF operating frequencies. The improvement in power density comes as a result of both increased breakdown voltage in the wide-bandgap nitrides and increased channel current available via polarization engineering. Next generation high-power RF HEMTs will require further increases in channel sheet charge density (n s ) to improve output power while requiring thinner barrier layers for higher frequency operation in the millimeter-wave regime. Sc x Al1-x N is a novel materials system consisting of an alloy between group-IIIa (transition metal) nitrides and group-IIIb nitrides, with a stable wurtzite crystal structure for x < 0.55 and a lattice-match to GaN with x ∼ 0.2. Thin films with x up to 0.43 have been reported having a factor of five enhancement of the piezoelectric response relative to AlN [1], and similar predicted enhancement in spontaneous polarization [2]. The calculated polarization discontinuity between a Sc0.2Al0.8N barrier layer and GaN channel gives a predicted n s as high as 5 × 1013 cm-2, a factor of five higher than a conventional Al0.25Ga0.75N channel device. In this talk we will show initial development of ScAlN for high-power HEMTs, focusing on molecular beam epitaxy (MBE) growth and materials characterization of ScAlN, plasma etching of ScAlN and its effectiveness as an etch stop layer (ESL), and dc characterization of ScAlN-barrier HEMTs. Sc x Al1-x N thin films were grown on freestanding GaN and SiC substrates using an Omicron PRO-75 RF-plasma MBE system, equipped with an Al effusion cell and an e-beam evaporator to supply Sc. Several series of samples were grown to investigate the impact of growth temperature (360–890 °C) and III-V ratio (0.6–1.1) on Sc x Al1-x N crystal quality and composition. The measured ScN fraction was constant between 360–810 °C and increased at 890 °C due to Al re-evaporation from the growth surface. X-ray diffraction (XRD) rocking curve full width at half maximum values were below 300 arcsec for 80-nm-thick Sc0.18Al0.82N thin films for growth temperatures between 520–730 °C, indicating a wide growth window and high crystal quality. Surface rms roughness measured by atomic force microscopy was generally under 1 nm and as low as 0.7 nm at a growth temperature of 730 °C. XRD measurements indicated single crystalline phase epitaxial Sc x Al1-x N for N-rich samples (III/V ratio < 1) and the emergence of additional phases for samples grown metal-rich. In addition to having high spontaneous and piezoelectric polarization, Sc x Al1-x N also has a relatively low etch rate in Cl2-based dry etching commonly used for GaN and AlN. The etch selectivity is as high as 11.2 relative to AlN and 18.6 relative to GaN. The etched surface remains smooth with no increase in the rms roughness or evidence of pitting or micromasking. There are several etch methodologies that allow selective etching of Al-containing layers relative to GaN, but this is the first demonstration of a conventional dry etch chemistry with a working ESL relative to AlN, leading to a variety of applications in AlN-based electronic devices and deep-UV optoelectronics. Using a 25-nm-thick Sc0.14Al0.86N barrier layer in a GaN-based HEMT structure, we demonstrate the first ScAlN-barrier HEMTs with n s as high as 3.4 × 13 cm-2 and mobility of 910 cm2\\V∙s, resulting in a sheet resistance of 213 Ω/□. Reducing the ScAlN barrier thickness to only 3 nm results in an n s of 2.0 × 1013 cm-2 with a mobility of 1060 cm2/V∙s. Both devices included both AlN and GaN interlayers to improve the mobility. These results demonstrate the potential for ScAlN as a barrier material in a highly-scaled, high charge density HEMT for high power millimeter-wave amplifiers. [1] M. Akiyama, K. Kano, and A. Teshigahara, "Influence of growth temperature and scandium concentration on piezoelectric response of scandium aluminum nitride alloy thin films," Appl. Phys. Lett., vol. 95, p. 162107, 2009. [2] M. A. Caro, S. Zhang, T. Riekkinen, M. Ylilammi, M. A. Moram, O. Lopez-Acevedo, et al., "Piezoelectric coefficients and spontaneous polarization of ScAlN," J. Phys.: Condens. Matter, vol. 27, p. 245901, 2015.

Effect of VUV Lamp on Wafer Charging by Single-Wafer Wet Clean

Wafer charging becomes an increasingly important issue, thus being a key parameter in 10 nm and sub-10 nm technology nodes. Single-wafer cleaning equipment has various advantages over batch-type processes, and adoption has been widespread in both BEOL and FEOL manufacturing. Since the process module is constructed primarily of plastic for chemical compatibility, there are significant challenges in managing charge build-up to an acceptable level. Amongst known charging failure modes, an arcing event is the most destructive toward device yield. Hagimoto, Matz, and Halladay discovered that cleaning chemistries with different conductivity and film stacks generate different types of punch-through defects on the wafer surface. Dielectric layers such as SiO2 and Si3N4 are where these charges accumulate. Typically these charges could be dissipated by Ionized CO2 Water (DI-CO2) [4, 5, 6]. However, 10 nm BEOL processes have a very tight specification on Cu film loss, limiting the use of DI-CO2. Hayashi et al. reported that dilute NH4OH has lower Cu etch rate than does DI-CO2and also has high discharge capability [7]. In this study, a different approach is investigated. A vacuum ultraviolet (VUV) lamp is used to dissipate charge generated in a de-ionized water (DIW) single-wafer clean process. Experimental A VUV lamp (wavelength ~200-nm) is used on wafer discharging. 1,000 Å thermal oxide wafers were processed with DIW-only at 200 rpm, 60s, and 1 lpm flow with center dispense. Charging profiles were measured on a Qcept metrology tool. Results Figure 1 shows the effect of VUV discharging. The solid lines represent typical wafer charging by a DIW process. The thermal oxide wafer is negatively charged at the center. This is because of DIW tribo-electric charging effects from the DIW dispense at the center of the wafer. At the wafer edge, the process generates positive charge. The mechanism is correlated with the center-negative charging. When Si-OH at the center is negatively charged, H+ ions are generated; these spin out from the wafer center and accumulate at the wafer edge. In Figure 1a, the VUV lamp is located at the wafer center, and the post-VUV exposure charging profile is changed from -10V to 0V (broken lines). In Figure 1b, the VUV lamp is located at the wafer edge, and it also shows from +4V to 0V discharging. Two sets of data suggest that VUV can neutralize both positive and negative charges. In order to understand if there is any negative impact of VUV exposure, k-value shift of the dielectric film is measured. In Table 1, k-values are compared for different wafer locations – center, middle, and edge. The VUV nozzle is scanned from center to edge. The results are normalized to reference data with no VUV exposure. The center area showed a severe k-value shift with prolonged exposure time. This means that optimized exposure is needed to minimize damage due to VUV. Additional damage studies and optimized VUV scan profile will be introduced in the conference. <align="left">(a) (b) Fig. 1: VUV discharge effects: (a) wafer center-negative charges are dissipated, (b) wafer edge-positive charges are dissipated. Table 1: Low-k film k-value shift after VUV exposure. By zone VUV 10s (normalized) VUV 120s (normalized) VUV 600s (normalized) Center 1.19 1.35 1.91 Middle 1.03 1.06 1.08 Edge 1.02 1.03 1.01 References [1] D. S. L. Mui, E. H. Lenz, C. Cyterski, K. Venkataraman and M. Kawaguchi, IEEE Transactions on Semiconductor Manufacturing., 24, Issue 4 (2011), 552. [2] Y. Hagimoto, H. Iwamoto, Y. Honobe, T. Fukunaga and H. Abe. Solid State Phenomena, 145-146, (2009), 112. [3] M. Wada, T. Sueto, H. Takahashi, N. Hayashi and A. Eitoku, Solid State Phenomena, 134, (2008), 263. [4] T. Guo, T. Tsai, C. Chien, M. Chan, C. Yang and J. Wu, Solid State Phenomena, 187, (2012), 63. [5] J. Halladay, B. Teeter, R. Newcomb, W. Usry, J. Yoo, K. Lam, J. Lansford and B. Brennan, Proceedings of SPCC08, Austin, TX, April (2008). [6] P Matz, T. Hurd, K. Cunningham et al., Proceedingsof the 212th ECS meeting, 7-10 October, (2007). [7] Y. Hayashi, M. Kawakami, D. Yano and K. Yamanaka, ECS Transactions, 69 (8), (2015), 37. Figure 1

Effect of Surfactant and Alcohol Additives on Etching Characteristics in Aqueous Potassium Hydroxide Solutions

Anisotropic wet etching is a simple and low cost technique for silicon bulk micromachining to fabricate microelectromechanical systems (MEMS) components. In this work, we have systematically studied the etching characteristics of Si{100}, Si{110}, and Si{111}) in various concentration of KOH (5-40 wt% in step of 5 wt%) without and with addition of surfactant Triton-X-100 and isopropyl alcohol (IPA). KOH solution with addition of IPA and Triton is termed as ternary solution. The addition of Triton and IPA affects the etching characteristics dramatically, especially the undercutting at convex corners on Si{100} surface and the etch rate of Si{110}. The undercutting at convex corners and the etch rate of Si{110} in ternary solution suppress to a significantly low level. Low undercutting is very useful for the formation of microstructure with protected corners such as mesa, while significantly low etch rate of Si{110} can be exploited to fabricate microstructure with 45º sidewall (or 45º micromirror). In addition, ternary solution with low concentration KOH provides smooth etched surface morphology.

Etching with atomic precision by using low electron temperature plasma

There has been a steady increase in sub-nm precision requirement for many critical plasma etching processes in the semiconductor industry. In addition to high selectivity and low controllable etch rate, an important requirement of atomic precision etch processes is no (or minimal) damage to the remaining material surface. It has traditionally not been possible to avoid damage in conventional radio-frequency (RF) plasma processing systems, even during layer-by-layer or ‘atomic layer’ etch. To meet these increasingly stringent requirements, it is necessary to have an accurate control over ion energy and ion/radical composition during plasma processing. In this work, a new plasma etch system designed to facilitate atomic precision plasma processing is presented. An electron sheet beam parallel to the substrate surface is used to produce a plasma in this system. This plasma has a significantly lower electron temperature Te ~ 0.3 eV and ion energy Ei < 3 eV (without applied bias) compared to inductively and capacitively coupled RF plasmas. Electron beam plasmas also have a higher ion–to–radical ratio compared to RF plasmas, so this plasma etch system employs an independent radical source for accurate control over relative ion and radical concentrations. A low frequency RF bias capability that allows control of ion energy in the 2–50 eV range is another important component of this plasma etch system. The results of etching of a variety of materials and structures in this low-electron temperature plasma system are presented in this study: (1) layer-by-layer etching of p-Si at Ei ~ 25–50 eV using electrical and gas cycling is demonstrated; (2) continuous etching of epi-grown µ-Si in Cl2-based plasmas is performed, showing that surface damage can be minimized by keeping Ei < 10 eV. Also presented are the results of molecular dynamics modeling of atomic precision etching at low Ei.

Controllable Si (100) micro/nanostructures by chemical-etching-assisted femtosecond laser single-pulse irradiation

In this study, silicon micro/nanostructures of controlled size and shape are fabricated by chemical-etching-assisted femtosecond laser single-pulse irradiation, which is a flexible, high-throughput method. The pulse fluence is altered to create various laser printing patterns for the etching mask, resulting in the sequential evolution of three distinct surface micro/nanostructures, namely, ring-like microstructures, flat-top pillar microstructures, and spike nanostructures. The characterized diameter of micro/nanostructures reveals that they can be flexibly tuned from the micrometer (∼2 μm) to nanometer (∼313 nm) scales by varying the laser pulse fluence in a wide range. Micro-Raman spectroscopy and transmission electron microscopy are utilized to demonstrate that the phase state changes from single-crystalline silicon (c-Si) to amorphous silicon (a-Si) after single-pulse femtosecond laser irradiation. This amorphous layer with a lower etching rate then acts as a mask in the wet etching process. Meanwhile, the on-the-fly punching technique enables the efficient fabrication of large-area patterned surfaces on the centimeter scale. This study presents a highly efficient method of controllably manufacturing silicon micro/nanostructures with different single-pulse patterns, which has promising applications in the photonic, solar cell, and sensors fields.

Black silicon morphologies using conventional RIE processing

We report on the use of conventional non-Bosch, non-cryogenic Reactive Ion Etching (RIE) processing to produce a range of low optical reflection morphologies on &amp;lt;100&amp;gt; silicon wafer. Tapered structures and nano dendritic-pillars are patterned into silicon over a pressure range of 550 - 700 mTorr at various run times. Low pressure RIE conditions yield tapered profiles while at higher pressures nano-pillars are produced. The optimized condition of 650 mTorr for 20-30 minutes yields uniform distribution of nano dendritic pillars resulting in a low average reflectance of 4.2% – without an additional antireflective coating. A simple kinetic Monte-Carlo model shows that nano-dendritic structures can be formed due to low etching rate of side walls and evolve into tapered structures over a longer run time. Refractive index profiles built from our simulated patterns and surface morphology of the samples yield calculated reflectance curves that correlate well with experimental results.

Adsorption of sodium dodecyl sulfate on cleaning of an N-polar GaN surface in an alkaline solution

The present study investigated the removal of contaminated particles from a polished N-polar GaN surface using an alkaline cleaning solution along with sodium dodecyl sulfate (SDS) surfactant. The zeta potential, etch rate, and particle removal efficiency (PRE) of N-polar GaN surfaces were reported. A lower etch rate and smoother N-polar GaN surface were obtained when the surface is treated with a diluted NH4OH solution. However, the etch rate and PRE of the N-polar GaN surface increased as a function of the pH of the NH4OH solution. The PRE of the N-polar GaN surface reached to 96% at pH 10 with a high surface roughness of 0.5nm. SDS was added to the ammonia solutions to control the surface roughness. The N-polar GaN surface reached 100% PRE and surface roughness shown less than 0.4nm when cleaned in a diluted NH4OH solution with 5mM SDS surfactant in a megasonic bath.

(Invited) Tailoring Zinc Oxide Nanorod-Arrays for Photo-(electro)Chemical Applications

As one of the most studied metal-oxides Zinc Oxide (ZnO) already found its way into many industrial applications. Nevertheless enormous research interest is drawn to this earth-abundant, environmentally-friendly material as it offers interesting material properties such as a high exciton binding energy, a direct bandgap and comparably high charge carrier mobility.1 Furthermore the ability to grow ZnO nanostructures using a wide range of deposition techniques offers new perspectives for the material to be used in opto-electronics.2 Low-temperature solution based methods are of particular interest as possible routes to the low-cost growth of high surface-area nanostructures for the integration of ZnO into novel energy production and storage devices.3 The steadily growing research areas of solar water splitting and photo-catalysis are prominent examples of areas where interest in ZnO-based materials and devices may be found.4-6 For these applications the semiconductor/electrolyte interface plays a crucial role. It is of the highest importance to carefully engineer the materials properties in order ensure effective charge carrier transport across the interface. In turn it must be the goal of materials research to tailor the ZnO towards these target applications, where possible addressing the key issues of short timescale charge carrier recombination over intrinsic defects, low-visible light absorption and photo-corrosion. This paper describes strategies for the minimisation of the undesirable influences associated with these issues for ZnO nanorod-arrays grown from solution. Firstly it is demonstrated that careful defect-engineering can be used to increase the probability to run photo-(electro)chemical reactions. Here, the specific focus is directed towards orange-luminescent defect-centres. Linear sweep voltammetry in neutral electrolyte solution reveals that ZnO nanorod-arrays exhibiting strong orange emission show a defect-promoted increase in photo-current of ca. 200 % under simulated sunlight as compared to as-grown nanorod-arrays. As the large bandgap energy of ZnO, some 3.3 eV (< 380 nm), considerably limits the absorption of sunlight a doping strategy is applied in order to shift the materials absorption into the visible region. It is demonstrated that this may be achieved by the incorporation of significant amounts of cobalt into the ZnO host lattice using a newly developed low-temperature solution-based growth method. It is shown that the visible-light absorption of the resulting material, which consists of ZnO:Co nanorod-arrays directly deposited onto seed-layer coated glass substrates, extends up to 700 nm by controlling the cobalt concentration in the growth solution. Lastly, we address the issue of photocorrosion of ZnO-based photo-electrodes. Previously various attempts have been made to enhance the material`s chemical stability. Over-coating of ZnO with thin layers of e.g. C3N4 or TiO2 using different deposition techniques are among the most applied strategies.7-9 In order to produce effective and stable chemical barriers pin-hole free layers are essential. atomic layer deposition (ALD) offers the advantage of controlled and nominally pin-hole free deposition of ultrathin barrier layers even onto 3D-geometries, thus, making it potentially a powerful technique for the chemical stabilisation of ZnO nanostructures for photo-(electro)chemical applications. In this study the ZnO nanorod-arrays are over-coated with ultrathin ALD TiO2 layers. It is presented that TiO2 shells are able to chemically protect the ZnO core in acidic media. However, it was found that for some samples the TiO2 barriers are not complete – especially at the rod tips - leading to a considerably lower etch rate as compared to uncoated nanorod-arrays. Photo-electrochemically the core-shell structures show a photo-current stabilisation for several hours. Nevertheless the initial photo-current is lower when compared to uncoated nanorod-arrays indicating a higher charge transfer resistance for the ZnO-TiO2/electrolyte interface. Acknowledgements: This work was funded by Science Foundation Ireland, US: Ireland Grant RENEW- Research into Emerging Nanostructured Electrodes for the Splitting of Water, number 13/US/I2543. 1. H. Morkoç and Ü. Özgür, in Zinc Oxide - Fundamentals, Materials and Device Technology, Wiley-VCH Verlag GmbH & Co. KGaA, 2009, pp. 131-244. 2. A. B. Djurišić et al., Progress in Quantum Electronics, 2010, 34, 191-259. 3. P. S. Xu et al., Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms, 2003, 199, 286-290. 4. Y. Lu et al., Nano Research, 2011, 4, 1144-1152. 5. Y. Mao et al., Nano Energy, 2014, 6, 10-18. 6. L. Cai et al., International Journal of Hydrogen Energy, 2015, 40, 1394-1401. 7. R. T. Sapkal et al., Journal of photochemistry and photobiology. B, Biology, 2012, 110, 15-21. 8. Y. Wang et al., Energy & Environmental Science, 2011, 4, 2922. 9. M. Liu et al., The Journal of Physical Chemistry C, 2013, 117, 13396-13402.