Low-complexity Digital Predistortion Research Articles

Low Complexity Digital Pre-Distortion (DPD) for Multi-Band Radio over Fiber Transmission Systems

Low Complexity Digital Pre-Distortion (DPD) for Multi-Band Radio over Fiber Transmission Systems

Ultrawideband RF-IQ Modulator Using Segmented Nonlinearly Scaled RF-DACs and Nonoverlapping LO Signals

A wideband Cartesian in-phase and quadrature (I/Q) modulator based on dual 10 b RF-digital-to-analog converters (DACs) is presented. Nonoverlapping local oscillator (LO) signals and a segmented nonlinear scaling with scaled unit cells contribute to a high linearity and allow for a low-complexity digital predistortion (DPD). Unit-cell flip-flops (FFs) and a balanced clock distribution enable a high sample rate with little skew. Out-of-band emissions are reduced through drive-slope control of the data-switch inputs. The modulator, implemented in the 22-nm fully-depleted silicon-on-insulator (FDSOI) CMOS, operates between 20 and 26 GHz with a peak sample rate of 11 GS/s. It has been used to demonstrate the transmission of a 64-quadrature amplitude modulation (QAM) single-carrier (SC) signal at 13.2 Gb/s, a 256-QAM SC signal at 7.33 Gb/s, and an orthogonal frequency division multiplexing (OFDM) signal comprising four aggregated 400-MHz 64-QAM channels with an error vector magnitude (EVM) of 6.43%. These results demonstrate the potential of the proposed modulator for the realization of ultrawideband transmitters in high-performance millimeter-wave (mmW) systems.

Low-Complexity Digital Predistortion of Concurrent Multiband RF Power Amplifiers

The complexity of digital predistortion (DPD) for the concurrent multiband (MB) power amplifier (PA) has been a bottleneck for 5G wireless communication. A low-complexity MB DPD model has been proposed to reduce the running time complexity of DPD models for concurrent MB scenarios. The proposed MB model can generate the Volterra format basis functions with odd orders, including in-band, cross-band, and intermodulation (IMD) basis terms for arbitrary carrier configurations with an arbitrary number of bands. The optimal basis functions within the band of interests will be selected using a basis-function search algorithm. The lower cost complexity and high model accuracy of the proposed MB model have been validated by the PA linearization experiments in comparison with the memory polynomial MB model.

Digital Predistortion Using Extended Magnitude- Selective Affine Functions for 5G Handset Power Amplifiers With Load Mismatch

Load mismatch often occurs in radio frequency (RF) power amplifiers (PAs) in handset, which can complicate the nonlinear behavior of the transmitter, particularly when the voltage standing wave ratio (VSWR) is high. To effectively linearize handset PAs with load mismatch, in this article, we propose a low-complexity digital predistortion (DPD) model. After carefully analyzing the characteristics of handset transmitters with standing waves, we extend the magnitude-selective affine (MSA) function to construct nonlinear modeling terms in the DPD model. The new terms can effectively compensate for the distortion caused by load mismatch. Experimental results demonstrate that the proposed extended MSA (EMSA) model not only improves the modeling performance but also lowers the hardware complexity considerably, compared with the conventional models. The new model can thus serve as a good candidate for DPD deployment in 5G handset transmitters, where nonlinear behavior is more complicated and hardware resource is highly constrained.

Closed-Loop Sign Algorithms for Low-Complexity Digital Predistortion: Methods and Performance

In this article, we study digital predistortion (DPD)-based linearization with a specific focus on millimeter-wave (mmW) active antenna arrays. Due to the very large-channel bandwidths and beam-dependence of nonlinear distortion in such systems, we present a closed-loop DPD learning architecture, lookup table (LUT)-based memory DPD models, and low-complexity sign-based estimation algorithms such that even continuous DPD learning could be technically feasible. To this end, three different learning algorithms-sign, signed regressor, and sign-sign-are formulated for the LUT-based DPD models such that the potential rank deficiencies, experienced in earlier methods, are avoided while facilitating greatly reduced learning complexity. The injection-based LUT DPD structure is also shown to allow for low numbers and reduced dynamic range of the involved LUT entries. Extensive RF measurements utilizing a state-of-the-art mmW active antenna array system at 28 GHz are carried out and reported to validate the methods, incorporating very wide channel bandwidths of 400 and 800 MHz while pushing the array close to saturation. In addition, the processing and learning complexities of the considered techniques are analyzed, which, together with the measured linearization performance figures, allows to assess the complexity-performance tradeoffs of the proposed solutions. Overall, the results show that efficient mmW array linearization can be obtained through the proposed methods at very low complexity.

Millimeter Wave SOI-CMOS Power Amplifier With Enhanced AM-PM Characteristic

This paper proposes a novel inter-stage load-pull characterization method to enhance the linearity of millimeter wave integrated power amplifiers (PAs) by minimizing their amplitude-to-phase (AM-PM) distortion without worsening their AM-AM or efficiency performances. The proposed method identifies the optimal solution for the inter-stage matching network which enables the synthesis of a driver stage AM-PM characteristic that is complementary to that of the power stage; consequently, reducing the overall AM-PM distortion of the PA. The proposed technique is applied to design a proof-of-concept 28–31 GHz PA demonstrator using 45 nm silicon-on-insulator CMOS technology. The measurement results obtained under continuous wave excitation at 29 GHz demonstrate an excellent AM-PM characteristic, with phase distortions as low as 0.2° at the 1-dB compression power level of 13.9 dBm and less than 1° at an output power level of up to 16 dBm (very close to the saturation power of 16.6 dBm). This enhanced AM-PM linearity improves the linearizability of the PA. This was confirmed by testing the PA with a 64 quadrature amplitude modulated test signal with an instantaneous bandwidth of 800 MHz. Without applying any digital pre-distortion (DPD) technique, the PA delivers a power added efficiency (PAE) of 8.7% at an average output power ( $P_{avg}$ ) of 9.4 dBm while maintaining an error vector magnitude (EVM) of −25 dB. However, after applying a very simple memoryless DPD function with only four coefficients, the PA can operate at a higher $P_{avg}$ of 11.1 dBm with a much better PAE of 12.2% while still maintaining an acceptable EVM of −25.2 dB. Thanks to the proposed technique, the PAE of the proposed PA can be improved by 40% with a very simple application of a low cost and low complexity DPD technique.

Efficient Low-Complexity Digital Predistortion for Power Amplifier Linearization

<span lang="EN-US">In this paper, a low-complexity model is proposed for linearizing power amplifiers with memory effects using the digital predistortion (DPD) technique. In the proposed model, the linear, low-order nonlinear and high-order nonlinear memory effects are computed separately to provide flexibility in controlling the model parameters so that both high performance and low model complexity can be achieved. The performance of the proposed model is assessed based on experimental measurements of a commercial class AB power amplifier by applying a single-carrier wideband code division multiple access (WCDMA) signal. The linearity performance and the model complexity of the proposed model are compared with the memory polynomial (MP) model and the DPD with single-feedback model. The experimental results show that the proposed model outperforms the latter model by 5 dB in terms of adjacent channel leakage power ratio (ACLR) with comparable complexity. Compared to MP model, the proposed model shows improved ACLR performance by 10.8 dB with a reduction in the complexity by 17% in terms of number of floating-point operations (FLOPs) and 18% in terms of number of model coefficients.</span>

Low Complexity Coefficient Estimation for Concurrent Dual-Band Digital Predistortion

Dual-band or multi-band RF power amplifiers (PAs) have attracted a lot of attention in recent years as they rise to the challenge of segmented spectrum allocation in wireless systems. Adaptive digital predistortion (DPD) for concurrent dual-band PAs evolves from existing DPD for single-band PAs. In this paper, we derive the baseband dual-band Volterra model from the corresponding passband model. In addition, the computational complexity of the DPD estimation algorithm increases dramatically as the number of coefficients for dual-band DPD is much larger than that for single-band DPD. In this paper, we propose a low complexity DPD coefficient estimation algorithm for concurrent dual-band PAs based on polar decomposition of the general Volterra model. By dividing complex-valued coefficient estimation into amplitude estimation and phase estimation separately, the proposed algorithm achieves at most 75% computational complexity reduction. Moreover, the proposed algorithm can achieve similar performance with the conventional coefficient estimation method. Simulation and measured results validate performance of the proposed algorithm for a solid-state PA.

A Low-Complexity Digital Predistortion Algorithm for Power Amplifier Linearization

Transmission signals of modern communication systems, such as orthogonal frequency-division multiplexing signals, usually have large peak-to-average power ratio. These signals are sensitive to the power amplifier's nonlinearity, which generates both in-band distortion and out-of-band spectral regrowth. The adaptive digital predistortion (DPD) is an efficient linearization technique without sacrificing the power efficiency. To estimate the DPD coefficients, numerical instability and computational complexity are bottlenecks. In this paper, we propose a general approach to derive orthonormal basis functions, which can improve the numerical stability during the coefficients estimation. By applying the orthonormal basis functions, we further propose an adaptive algorithm that exhibits a low computation complexity of least mean squares algorithm while retaining the fast convergence speed of recursive least squares algorithm. Both simulation and experimental results validate the effectiveness of the proposed algorithm.

Low Complexity Distributed Model for the Compensation of Direct Conversion Transmitter’s Imperfections

In modern communication systems, nonlinearity in power amplifiers (PAs) and in-phase and quadrature-phase (I/Q) imperfections in the transmitter are of enormous concern. With the increase in the importance for highly energy efficient and low complexity models, there is a need to develop low complexity digital predistortion (DPD) methods. In this paper, we present a novel memory polynomial based distributed two block model to alleviate these impairments. Various performance metrics are used to evaluate the design performance and complexity of proposed model as compared to the state of the art predistorter model. Simulation and measurement results indicate the ability of the proposed model to meet the desired design purpose with reduced complexity in terms of number of coefficients, dispersion coefficient, condition number and number of floating points operations required for computing various steps in the inverse modeling algorithm. This is achieved while maintaining reasonable performances in terms of NMSE and ACEPR. The major attribute of the model is the reduction in complexity of the system. The number of complex valued coefficients and the number of floating point operations (FLOPs) are both reduced by 17%-56%, matrix conditioning is improved by 12-33 dB and the dispersion coefficient is reduced by 16-42 dB as compared to the previously proposed joint modulator and power compensation technique.