Abstract
A wideband Cartesian in-phase and quadrature (I/Q) modulator based on dual 10 b RF-digital-to-analog converters (DACs) is presented. Nonoverlapping local oscillator (LO) signals and a segmented nonlinear scaling with scaled unit cells contribute to a high linearity and allow for a low-complexity digital predistortion (DPD). Unit-cell flip-flops (FFs) and a balanced clock distribution enable a high sample rate with little skew. Out-of-band emissions are reduced through drive-slope control of the data-switch inputs. The modulator, implemented in the 22-nm fully-depleted silicon-on-insulator (FDSOI) CMOS, operates between 20 and 26 GHz with a peak sample rate of 11 GS/s. It has been used to demonstrate the transmission of a 64-quadrature amplitude modulation (QAM) single-carrier (SC) signal at 13.2 Gb/s, a 256-QAM SC signal at 7.33 Gb/s, and an orthogonal frequency division multiplexing (OFDM) signal comprising four aggregated 400-MHz 64-QAM channels with an error vector magnitude (EVM) of 6.43%. These results demonstrate the potential of the proposed modulator for the realization of ultrawideband transmitters in high-performance millimeter-wave (mmW) systems.
Published Version
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