Abstract
The adaptive digital predistorter (DPD) offers an effective technique for compensating for nonlinear distortion and improving the efficiency of high power amplifiers (HPAs). However, in small cell environments, the power consumed by the DPD is no longer negligible and significantly affects the overall efficiency of the DPD+HPA cascade. In this paper, we present new architecture for the baseband DPD that has very low power consumption. The proposed DPD comprises a cascade sub-band filters block and a memoryless adaptive predistorter. The sub-band filtering technique is used to compensate for the orthogonal frequency-division multiplexing (OFDM) signal in-band distortions caused by the HPA memory effect, and the memoryless predistorter compensates for both the in-band and out-of-band transmitting (Tx) signal distortions. The sampling rate of the sub-band filters is only 1/(N$\cdot$L) of the sampling rate of the Tx OFDM signal (N is IFFT size, L is the Tx signal oversampling ratio). Therefore, the power consumption of the proposed subband DPD is significantly less than that of the typical memorypolynomial (M-P) DPD operating at a rate of N$\cdot$L. The simulation result for a 20-MHz LTE system shows that the power consumed by the proposed sub-band DPD is reduced by a factor of five compared to that consumed by the M-P DPD and provides similar linearization quality.
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