Lithography Step Research Articles

Addressing Advanced IC Substrate Deformation and Pattern Distortion Using an Extremely Large Exposure Field Fine Fine-Resolution Lithography System

The More than Moore era is upon us, as manufacturers increasingly turn to back-end advances to meet the next-generation device performance gains of today and tomorrow. In the advanced packaging space, heterogeneous integration combines multiple chips with different functionalities and from different silicon nodes inside one package, ranging in size from 75mm x 75mm to 175mm x 175mm. But as with any new technology, heterogeneous integration comes with its own set of unique challenges. For starters, package sizes are expected to grow significantly due to the number of components making up each integrated package. The problem: these significantly larger packages would typically require multiple exposure shots to complete the lithography steps for the package. Furthermore, the process of adding multiple redistribution layers (RDL) may cause stress to both the surface and inside of the substrate. Formation changes experienced by the panel, as a result of thermal, high-pressure and other fan-out processes, shift the design location from its nominal coordinates; this causes inaccurate overlay and low-overlay yield in the lithography process. And then there is the matter of tightening resolution requirements. RDL layers in advanced integrated circuit substrates (AICS) will require a resolution of 3µm and will eventually move toward a resolution of 1µm. To address these challenges, and better enable the heterogenous integration process, an extremely large exposure field, fine-resolution lithography solution was proposed to enable packages over 250mm x 250mm without the need for image stitching, while exceeding the overlay and critical dimension uniformity requirements for these packages. In this paper, a 515mm x 510mm Ajinomoto build-up film (ABF)+copper clad laminate (CCL) substrate is selected as the test vehicle. We will analyze the pattern distortion of an ABF+CCL substrate to understand the distribution of translation, rotation, scale, magnification, trap, orthogonality and other errors in the substrate, and then use an extremely large exposure field, fine-resolution lithography system to address the pattern distortion of the substrate. This demonstration will provide an analysis of panel distortion and detail how the extremely large exposure field, fine-resolution lithography solution addresses panel distortion to achieve an aggressive overlay number.

Fabrication of a self-aligned multi-waveguide-layer passive Si3N4/SiO2 photonic integrated circuit for a 3-D optical phased array device

Most traditional PICs (photonics integrated circuits) are based on a single-waveguide-layer configuration, which takes advantage of the mature fabrication process from the EIC (electronic integrated circuits) industry; but in the meantime, this configuration also limits the performance of PICs in applications such as OPA (optical phased array) devices. We have proposed a multi-waveguide-layer 3-D (3 dimensional) OPA device and demonstrated its unique advantage in broadband high efficiency. In this paper, we present the fabrication process of the proposed 3-D OPA in detail. By developing the fabrication process with a single lithography step, we address the two potential issues in a multi-waveguide-layer PIC: the alignment between layers; and the accurate spacing control between layers. The detailed considerations of processes are also elaborated, especially in the PR (photoresist) exposure and etching.

Large diameter electrically tunable lens for ophthalmic distance accommodation.

Electrically tunable liquid crystal lens with 30 mm diameter is presented based on the refractive Fresnel concept. Relatively large optical power variation range (from - 0.74 to +0.71 Diopters) is demonstrated along with very low root mean square aberrations (≤0.15 µm). Optical characterizations, including with Snellen chart, show that good vision recovery may be obtained with fast response time (under 500 msec) and relatively low haze. The proposed design is very simple and may be fabricated by using single step lithography. Perspectives on its applications are discussed.

Electrical Characterization of InGaZnO-Based Thin Film Transistor fabricated by Three-mask Process

Indium Gallium Zinc Oxide (InGaZnO) has gained increasing attention as a replacement for amorphous silicon in thin-film transistors (TFTs) owing to its excellent electrical and optoelectronic properties, chemical stability, and potential for low-temperature processing.
 However, efforts are being made to optimize the design to improve the performance and reduce costs.
 In this study, a top-contact top-gate (TCTG) structure of InGaZnO TFTs was fabricated using three lithography steps. The electrical current–voltage characteristics of the device were measured and used to extract the device parameters.
 The result shows transistor parameters with threshold voltage of –9 V, ON-OFF ratio of in the range of 103, maximum mobility of 1.15 cm2V-1 s-1, subthreshold slope of in the range of 103 mV/dec, and maximum interface trap density of 1.53x103 (cm-2eV-1) at maximum applied voltage of 5 V.

Sensitive and Compact Evanescent-Waveguide Optical Detector for Sugar Sensing in Commercial Beverages.

This work presents a compact and sensitive refractive index sensor able to evaluate the concentration of an analyte in a sample. Its working principle leverages on the changes in the optical absorption features introduced by the sample itself on the evanescent waves of a light beam. The device's high compactness is achieved by embedding the sample-light interaction site and the detector in a 1 cm2 glass substrate, thanks to microelectronics technologies. High sensitivity is obtained by employing a low-noise p-i-n hydrogenated amorphous silicon junction, whose manufacture process requires only four UV lithographic steps on a glass substrate, thus ensuring low production costs. The system's capabilities are investigated by sensing the sugar content in three commercial beverages. Sensitivities of 32, 53 and 80 pA/% and limits of detection of 47, 29 and 18 ppm are achieved. The above performance is comparable with state-of-the-art results available in the literature, where more complex optical setups, expensive instrumentation and bulky devices are used.

Mid-infrared plasmonic filter arrays using nanoholes in gold and silver films.

Plasmonic filters based on subwavelength nanohole arrays are an attractive solution for creating arrays of filters with varying passbands in a single lithography step. In this work, we have developed a fabrication method which allows fabrication of nanohole arrays in silver by use of a thin layer of aluminum oxide, which serves the dual purpose of both capping layer and hardmask for metal patterning. We demonstrate arrays of gold and silver mid-infrared plasmonic filters, fabricated on silicon, intended for use in optical filter blocks or for future integration with infrared imagers. The filter arrays are designed for the wavelength range 2-7 µm, and exhibit peak filter transmission efficiencies around 70%.

Optimized recess etching criteria for T‐gate fabrication achieving ft = 290 GHz at Lg = 124 nm in metamorphic high electron mobility transistor with In0.7Ga0.3As channel

AbstractThe authors propose criteria for recess etching to fabricate T‐gate used in InGaAs high electron mobility transistors (HEMTs). By patterning additional rectangular pads on the source and drain metals in the e‐beam lithography step, it is possible to measure the drain‐to‐source resistance (Rds) and current (Ids). The ratio (Γ) of before and after etching for each Rds and Ids can be used as criteria to determine the point in time to stop etching. By performing recess etching with Γ= 1.97 for Rds and Γ= 0.38 for Ids on an epiwafer having cap doping concentration of 2 × 1019 cm−3 and channel indium content of 0.7, the authors have fabricated InGaAs metamorphic high electron mobility transistor (mHEMT) device showing gm,max= 1603 mS/mm and ft= 290 GHz at Lg= 124 nm. The criteria presented can be applied to InGaAs HEMTs with various epitaxial structures.

Surface Engineering of Metal and Semiconductor Nanocrystal Assemblies and Their Optical and Electronic Devices.

ConspectusColloidal nanocrystals (NCs) are composed of inorganic cores and organic or inorganic ligand shells and serve as building blocks of NC assemblies. Metal and semiconductor NCs are well known for the size-dependent physical properties of their cores. The large NC surface-to-volume ratio and the space between NCs in assemblies places significant importance on the composition of the NC surface and ligand shell. Nonaqueous colloidal NC syntheses use relatively long organic ligands to control NC size and uniformity during growth and to prepare stable NC dispersions. However, these ligands create large interparticle distances that dilute the metal and semiconductor NC properties of their assemblies. In this Account, we describe postsynthesis chemical treatments to engineer the NC surface and design the optical and electronic properties of NC assemblies. In metal NC assemblies, compact ligand exchange reduces the interparticle distance and drives an insulator-to-metal transition tuning the dc resistivity over a 1010 range and the real part of the optical dielectric function from positive to negative across the visible-to-IR region. Juxtaposing NC and bulk metal thin films in bilayers allows the differential chemical and thermal addressability of the NC surface to be exploited in device fabrication. Ligand exchange and thermal annealing densifies the NC layer, creating interfacial misfit strain that triggers folding of the bilayers and is used to fabricate, with only one lithography step, large-area 3D chiral metamaterials. In semiconductor NC assemblies, chemical treatments such as ligand exchange, doping, and cation exchange control the interparticle distance and composition to add impurities, tailor stoichiometry, or make entirely new compounds. These treatments are employed in longer studied II-VI and IV-VI materials and are being developed as interest in III-V and I-III-VI2 NC materials grows. NC surface engineering is used to design NC assemblies with tailored carrier energy, type, concentration, mobility, and lifetime. Compact ligand exchange increases the coupling between NCs but can introduce intragap states that scatter and reduce the lifetime of carriers. Hybrid ligand exchange with two different chemistries can enhance the mobility-lifetime product. Doping increases carrier concentration, shifts the Fermi energy, and increases carrier mobility, creating n- and p-type building blocks for optoelectronic and electronic devices and circuits. Surface engineering of semiconductor NC assemblies is also important to modify device interfaces to allow the stacking and patterning of NC layers and to realize excellent device performance. It is used to construct NC-integrated circuits, exploiting the library of metal, semiconductor, and insulator NCs, to achieve all-NC, solution-fabricated transistors.

Intra-level mix and match lithography with electron beam lithography and i-line stepper combined with resolution enhancement for structures below the CD-limit

Intra-level mix and match lithography with electron beam lithography and i-line stepper combined with resolution enhancement for structures below the CD-limit

RF characteristics of 150‐nm AlGaN/GaN high electron mobility transistors fabricated using i‐line stepper lithography

AbstractThis article reports radio frequency characteristics of 150‐nm gate aluminum gallium nitride (AlGaN)/gallium nitride (GaN) high electron mobility transistors (HEMTs) fabricated using i‐line stepper lithography and a thermal reflow technique. The authors have developed two different gate structures that were a field‐plated gate using the lift‐off process and a Y‐shaped gate using the ion‐milling process. Fabricated HEMTs using these different gate structures exhibited nearly equivalent DC characteristics. The field‐plated gate device showed a unity current gain cutoff frequency (fT) of 35 GHz and a maximum oscillation frequency (fmax) of 106 GHz, while the Y‐shaped gate device showed fT of 36 GHz and fmax of 115 GHz. The equivalent circuit analysis indicated a decrease in the gate‐drain capacitance and the drain conductance is responsible for the improved fmax in the Y‐shaped gate device.

Improved drain lag by reduced surface current in GaN HEMT via an ultrathin HfO2 blanket layer

This paper reports the influence of an ultrathin 1.5 nm atomic-layer-deposited HfO2 blanket layer as a gate dielectric on GaN high-electron-mobility transistors (HEMTs) grown on a 4H-SiC substrate. Transistors with a gate length of 250 nm and a source-to-drain distance of 3 µm were manufactured. The proposed technique involves HfO2 deposition at 250 ∘C prior to the gate metallization with no additional lithography steps. This approach reduced the drain lag by 83% compared to the conventional design with no gate dielectric. The HfO2 layer suppressed the parasitic lateral conduction from the gate, reduced surface trapping, and improved gate electrostatics. The manufactured devices exhibited nearly three orders of magnitude decreased surface leakage, better turn-on behavior, and improved cut-off frequency f T linearity by 16%. High quality metal-oxide interface formation was confirmed by the conductance method. Results demonstrate that the blanket HfO2 deposition is a promising approach to improve the current dispersion characteristics and gate electrostatics of GaN HEMTs without incurring major changes to the established fabrication techniques.

Fabrication and characterization of ultra-thin ZnO based bottom gate thin film transistor for UV detection

An RF sputtered ZnO thin film was utilized in a thin film transistor (TFT) fabrication. The film was fabricated on SiO2 gate oxide that was thermally grown on Si Substrate. Few lithography steps were used to fabricate the device and device structure was proved to be a bottom gate TFT. The grown film was ultra thin of 25 nm thickness and the Si wafer was n-type. The structural and optical properties of ZnO films were investigated by Field Emission Scanning Electron Microscopy (FESEM), X-Ray Diffraction (XRD) and Photo luminance (PL) spectroscopy. The photo luminance study confirmed a high-quality absorbance in UV spectra and relatively good transmittance in the visible region. The electrical performance of the transistor was studied using Proxima B1500 and the on/off current ratio was measured to be ∼107. The ZnO bottom gate TFT is simulated using the commercial TCAD tool Silvaco ATLAS™. Later the simulated I–V characteristic of the device is compared with the experimental one and both are in fairly good agreement. Further the UV detection capability of the fabricated device was studied by using UV LED light of 365 nm wavelength. The measured value of threshold voltage was found to be 9V under dark light and 10V under UV light.

An Efficient Design of the Piezoresistive Pressure Sensor Applied for Micro Aerial Vehicle

In this research, the developing process of a piezoresistive pressure sensor working in the atmosphere environment applied in micro aerial vehicle using the MEMS fabrication method is introduced. The sensor consists of four Au/Cr piezoresistors in a Wheatstone bridge configuration on a wet oxidized silicon diaphragm. To fabricate the sensor, three lithographic steps were conducted: the first one is to define the resistors and Au/Cr lines/pads, the second and the third ones are to determine the width and the thickness of the square SiO2/Si diaphragm, respectively. The sensor diaphragm shape and thickness were defined by the anisotropic etching of Si in tetramethylammonium hydroxide (TMAH) solution, and the resistors array are formed by sputtering and wet etching method. The sensor size is 6000 μm by 6000 μm. The sensor output voltage was measured for various applied pressure levels from -0.9to 1.2 bar with 5V voltage supply. The fabricated pressure sensor also exhibits a sensitivity of 50.1 mV/bar

High-performance photodetector arrays for near-infrared spectral sensing

Spectral sensing is an emerging field driven by the need for fast and non-invasive methods for the chemical analysis of materials in agri-food, healthcare, and industrial applications. We demonstrate a near-infrared spectral sensor, based on a scalable fabrication process and combining high responsivity, narrow linewidth, and low noise. The sensor consists of 16 resonant-cavity-enhanced photodetectors, each showing a unique spectral response consisting of narrow peaks. The spectral sensor thereby covers the wavelength range between 890 and 1650 nm, where organic materials show relevant spectral features from first and second overtones. For the fabrication of the detector arrays, we propose a simple and scalable fabrication approach that yields largely improved device characteristics with respect to the grey-scale electron-beam lithography process reported earlier. Through a series of five optical lithography steps, tuning layers of silicon nitride are deposited stepwise to obtain 16 different thicknesses and reduced surface roughness. With this novel fabrication approach, the obtained photodetectors achieve an average peak linewidth of 55 nm, a maximum peak responsivity of 0.3 A/W, and high suppression of the non-resonant background. We also demonstrate the impact of these improvements on the sensing performance for two relevant problems through an experiment and a set of simulations. With lateral dimensions of ∼1.4 × 1.4 mm2, the proposed photodetector array can be the key to robust, portable, and low-cost sensing instrumentation for on-site material analysis in various application fields.

MEMS micro-coils for magnetic neurostimulation

Micro-coil magnetic stimulation of brain tissue presents new challenges for MEMS micro-coil probe fabrication. The main challenges are threefold; (i) low coil resistance for high power efficiency, (ii) low leak current from the probe into the in vitro experimental set-up, (iii) adaptive MEMS process technology because of the dynamic research area, which requires agile design changes. Taking on these challenges, we present a MEMS fabrication process that has three main features; (i) multilayer resist lift-off process to pattern up to 1800-nm-thick metal films, and special care is taken to obtain high conductivity thin-films by physical vapor deposition, and (ii) all micro-coil Al wires are encapsulated in at least 200 nm of ALD alumina and 6-μm-thick parylene C such the leak resistance is high (>210 GΩ), (iii) combining a multi-step DRIE process and maskless photolithography for adaptive design and device fabrication. The entire process requires four lithography steps. Because we avoided SOI wafers and lithography mask fabrication, the design-to-device time is shortened significantly. The resulting probes are 4-mm-long, 60-μm-thick, and down to 150 μm-wide. Selected MEMS coil devices were validated in vivo using mice and compared to previous work.

Multifunctional terahertz device based on a VO2-assisted metamaterial for broadband absorption, polarization conversion, and filtering

This paper proposes a multifunctional terahertz device based on VO2 with a simple structure that needs only one step lithography. The designed device can realize broadband absorption, reflective broadband cross-polarization conversion, reflective linear-to-circular polarization conversion, transmissive narrowband cross-polarization conversion, and filtering under different working conditions. When VO2 is in a metallic state, the device can perform two different functions depending on the direction of the incident wave. When the electromagnetic wave is a forward incident, the device is a broadband absorber in the frequency range from 3.53 THz to 9.68 THz with a corresponding absorption efficiency above 90% and a relative bandwidth of 93%. When the electromagnetic wave is a backward incident, the device can work as a reflective broadband cross-polarization converter in the frequency range from 0.77 THz to 1.79 THz with a polarization conversion rate greater than 97% and a relative bandwidth of 80% and a reflective linear-to-circular polarization converter at 0.66 THz and 1.86 THz. While for VO2in the insulating state, the device exhibits the transmissive narrowband cross-polarization converter with polarization conversion rate greater than 90% at 1.32 THz and the function of the transmissive narrowband filter with transmittance more than 60% at 1.84 THz for both forward and backward incident waves. This multifunctional device may have great potential in miniaturized terahertz systems.

Integrated O- and C-band silicon-lithium niobate Mach-Zehnder modulators with 100 GHz bandwidth, low voltage, and low loss.

Broadband integrated thin-film lithium niobate (TFLN) electro-optic modulators (EOM) are desirable for optical communications and signal processing in both the O-band (1310 nm) and C-band (1550 nm). To address these needs, we design and demonstrate Mach-Zehnder (MZ) EOM devices in a hybrid platform based on TFLN bonded to foundry-fabricated silicon photonic waveguides. Using a single silicon lithography step and a single bonding step, we realize MZ EOM devices which cover both wavelength ranges on the same chip. The EOM devices achieve 100 GHz EO bandwidth (referenced to 1 GHz) and about 2-3 V.cm figure-of-merit (V π L) with low on-chip optical loss in both the O-band and C-band.

A power-efficient integrated lithium niobate electro-optic comb generator

Integrated electro-optic (EO) frequency combs are essential components for future applications in optical communications, light detection and ranging, optical computation, sensing and spectroscopy. To date, broadband on-chip EO combs are typically generated in high-quality-factor micro-resonators, while the more straightforward and flexible non-resonant method, usually using single or cascaded EO phase modulators, often requires high driving power to realize a reasonably strong modulation index. Here, we show that the phase modulation efficiency of an integrated lithium niobate modulator could be enhanced by passing optical signals through the modulation electrodes for a total of 4 round trips, via multiple low-loss mode multiplexers and a waveguide crossing, reducing electrical power consumption by an experimentally measured factor of 15. Using devices fabricated from a wafer-scale stepper lithography process, we demonstrate a broadband optical frequency comb featuring 47 comb lines at a 25-GHz repetition rate, using a moderate radio frequency (RF) driving power of 28 dBm (0.63 W). Leveraging the tunability in repetition rate and operation wavelength, our power-efficient EO comb generator could serve as a compact low-cost solution for future high-speed data transmission, sensing and spectroscopy, as well as classical and quantum optical computation systems.

Multicolor detour phase holograms based on an Al plasmonic color filter.

The remarkable advances in nanofabrication that have occurred over the last decade present opportunities for the realization of new types of holograms. In this work, for the first time to the best of our knowledge, a method for phase multicolor holograms based on nanohole arrays is described. The nanoholes are in an aluminum film that is interposed between the glass substrate and a silicon dioxide layer. The nanoholes serve as color filters for blue, green, and red wavelengths and provide the necessary phase distribution via the detour phase method. Our nanohole arrays are optimized to maximize the transmission efficiency of the red, green, and blue channels and to minimize the cross-talk between them. We design two multicolor holograms based on these filters and simulate their performance. The results show good fidelity to the desired holographic images. The proposed structure has the advantages of being very compact, of requiring only a simple fabrication method with one lithography step, and of employing materials (aluminum and silicon dioxide) that are compatible with standard CMOS technology.

Over 10W/mm High Power Density AlGaN/GaN HEMTs With Small Gate Length by the Stepper Lithography for Ka-Band Applications

This study reports AlGaN/GaN high-electron-mobility transistors (HEMTs) fabricated by the Stepper Lithography on a 4-inch wafer for Ka-Band applications. Small gate length (LG) of 100 nm was achieved through a 2-Step Photolithography Process and the gate region of the AlGaN/GaN HEMT was defined by using two lithography steps to form gamma-shaped gates. The 4-inch AlGaN/GaN HEMT wafer demonstrated high electrical performance uniformity with respect to the maximum drain-source current density (IDSS), the peak extrinsic output transconductance (Gm), and the threshold voltage (Vth). At <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\mathrm{ V}}_{\mathrm{ DS}}\,\,=$ </tex-math></inline-formula> 20 V, the AlGaN/GaN HEMT exhibits an <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\mathrm{ I}}_{\mathrm{ DSS}}$ </tex-math></inline-formula> of 1004.2 mA/mm, a Gm value of 363.6 mS/mm, a maximum output power density (POUT(MAX)) of over 10 W/mm, and a power gain of 8.8 dB with a maximum 51.1% Power-added efficiency (PAE) at 28 GHz in Continuous Wave (CW) mode. The results show the potential of AlGaN/GaN HEMT fabrication with high yield and outstanding RF performance using Stepper Lithography for 5G applications.