LDPC Research Articles

Energy-Efficient Raptor-like LDPC Coding Scheme Design and Implementation for IoT Communication Systems

The large number of inexpensive and energy-efficient terminals in IoT systems is one of the emerging elements of the recent landscape of information and communication technologies. IoT nodes are usually embedded systems with limited processing power devices and strict requirements on energy consumption. In this paper, we consider the design and implementation of a part of the IoT communication uplink stack, namely the error correction coding scheme, for energy-efficient operation. We examine how an efficient rate-adaptive coding scheme, namely the Raptor-like (RL) quasi-cyclic (QC) subclass of low-density parity check (LDPC) codes, can be applied. We present an encoding algorithm designed for an embedded CPU; a respective QC-RL-LDPC decoding scheme, based on typical LDPC iterative decoding; and a combined design procedure for construction of the QC-RL-LDPC parity check matrices. Next, we conduct experiments to explore the time intervals for implemented encoding and the goodput of the coding system with incremental redundancy. We provide the statistical results by combining the measured energy consumption of the encoder and the simulated radio transmitter energy consumption. We demonstrate the comparison of normalized energy consumption statistics with the fixed-rate LDPC coding case. As conclusion, we note that under an unknown channel corruption level, the short block QC-RL-LDPC code implemented in the CPU can achieve higher energy efficiency per information bit compared to a fixed-rate LDPC code. Future work will include an extension of the work to nonbinary QC-RL-LDPC coding design.

FBEL: Enhanced LLR optimization algorithm based on the VSER prediction by flag bits in the bit-flipping scheme

With the development of storage technology, NAND Flash’s reliability becomes more serious. The bit-flipping schemes and low-density parity-check (LDPC) codes are two effective methods to solve this problem. Motivated by error characteristics of NAND Flash and flag bits added by the bit-flipping scheme, an enhanced LLR optimization algorithm of LDPC is proposed based on the prediction of the threshold voltage state error rate (VSER) by flag bits. Compared with the conventional scheme, the proposed algorithm extends the data retention time to 25.44 times. The decoding iterations of LDPC are reduced by up to 87.74%.

Rate-Compatible Protograph LDPC Codes for Source Coding in Joint Source—Channel Coded Modulation Systems

Using the source residual redundancy in a joint source and channel coded modulation (JSCCM) system to achieve a shaping gain has proven to be a good solution for probabilistic amplitude shaping. In a JSCCM system, rate-compatible source codes are essential for adapting to dynamically changing source probabilities. However, conventional rate-compatible source codes are not appropriate for JSCCM systems, since they may yield a loss in the shaping gain. Moreover, a code design that depends solely on the source decoding threshold appears to be ill suited, thus complicating the search for good source codes. In this paper, we propose a rate-compatible family of source codes for JSCCM systems based on an achievable system rate analysis and the source protograph extrinsic information transfer (PEXIT) algorithm. The proposed codes not only have good source decoding thresholds but also obtain shaping gains over the whole considered range of source probabilities. Numerical results show that the proposed rate-compatible family of source codes can significantly improve the bit-error-rate (BER) performance of the JSCCM system.

Reduced complexity XOR trees for LDPC codes and BS-LFSR techniques to High-Speed memory applications

Low-Density Parity Check (LDPC) Codes exhibit dominant role which deal with limitation of storage capacity. Hardware realization of Parity Check Codes is slow and consumes more power which makes it vulnerable for the light weight applications. Hence, to improve the throughput, area and power dissipation, parity check architectures must be constrained. This article proposes architecture of LDPC codes for high-speed memory applications with comparable XOR-gate tree-based VLSI design. The designed extension module includes Bit Swapping Linear Feedback Shift Register (BS-LFSR) technique that can illustrate and gauge expansion of faults in both the versions of faulty and fault-free. Furthermore, the power dissipation has been reduced by 8% and area by 83% with its extension module. This work has been designed using Vivado HLS and the hardware implementation of BS-LFSR has been verified on Zync 7000 series FPGA board for faulty and fault-free test patterns.

Fast phase error correction with reference beam-assisted LDPC coding for collinear holographic data storage.

Low-density parity-check (LDPC) coding is a significant technique for ensuring data reliability in phase-modulated holographic data storage. To accelerate LDPC decoding, we design reference beam-assisted LDPC coding for 4-level phase-modulated holography. The reliability of a reference bit is higher than that of an information bit during decoding because reference data are known during recording and reading processes. By considering the reference data as prior information, the weight of the initial decoding information (i.e., log-likelihood ratio (LLR) information) of the reference bit is increased during LDPC decoding. The performance of the proposed method is evaluated through simulations and experiments. In the simulation, compared with the conventional LDPC code with a phase error rate (PER) of 0.019, the proposed method can reduce bit error rate (BER) by 38.8%, uncorrectable bit error rate (UBER) by 24.9%, decoding iteration time by 29.9%, the number of decoding iterations by 14.8%, and improve decoding success probability by 38.4% approximately. Experimental results demonstrate the superiority of the proposed reference beam-assisted LDPC coding. The developed method can significantly decrease the PER, BER, the number of decoding iterations, and decoding time by using the real captured images.

Joint Optimization of OFDM and Channel Coding for URLLC in Industrial Channels

Industrial communications have very tight requirements of reliability and latency, which are challenging to achieve at highly dynamic industrial radio channels. Redundancy in the modulation and coding can improve reliability but incurs excess latency. Minimizing latency subject to reliability constraint for a given channel state opens up the scope for static and runtime optimization. In this paper we explore joint optimal configuration of Orthogonal Frequency Division Multiplexing (OFDM) and channel coding, using polar, Low Density Parity Check (LDPC) and convolutional codes to minimize the transmission time subject to a maximum acceptable packet error rate, for three realistic channels reported by National Institute of Standards and Technology, using channel impulse response measurements, as well as perfect and imperfect channel estimation. The results show that the use of strong channel codes can significantly reduce transmission time, by up to 24% compared to convolutional codes, with LDPC achieving fastest transmission. For transmission times of 10-20 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\mu$</tex-math></inline-formula> s the contribution of the Cyclic Prefix (CP) is significant, up to 30% for convolutional codes. Stronger channel codes allow reduced CP, even considering the added redundancy such as Cyclic Redundancy Check (CRC), resulting in overall lower transmission time. The decoding time also introduces significant overheads, up to 50% of transmission time for polar codes. The paper also investigates the impact of channel estimation errors, which adversely impact Ultra-Reliable Low-Latency performance: lower bound errors violate the reliability constraint and higher bound errors introduce excess transmission times.

Parity-Check Matrix Partitioning for Efficient Layered Decoding of QC-LDPC Codes

In this paper, we consider how to partition the parity-check matrices (PCMs) to reduce the hardware complexity and increase decoding throughput for the row layered decoding of quasi-cyclic low-density parity-check (QC-LDPC) codes. First, we formulate the PCM partitioning as an optimization problem, which targets to minimize the maximum column weight of each layer while maintaining a block cyclic shift property among different layers. As a result, we derive all the feasible solutions for the problem and propose a tight lower bound ω <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>LB</i></sub> on the minimum possible maximum column weight to evaluate a solution. Second, we define a metric called layer distance to measure the data dependency between consecutive layers and further illustrate how to identify the solutions with desired layer distance from those achieving the minimum value of ω <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>LB</i></sub> = 1, which is preferred to reduce computation delay. Next, we demonstrate that up-to-now, finding an optimal solution for the optimization problem with polynomial time complexity is unachievable. Therefore, both enumerative and greedy partition algorithms are proposed instead. After that, we modify the quasi-cyclic progressive edge-growth (QC-PEG) algorithm to directly construct PCMs that have a straightforward partition scheme to achieve ω <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>LB</i></sub> or the desired layer distance. Simulation results showed that the constructed codes have better error correction performance and achieve less average number of iterations than the underlying 5G LDPC codes.

Trapping and Absorbing Set Enumerators for Irregular Generalized Low-Density Parity-Check Code Ensembles

The definitions of (elementary) trapping and (fully) absorbing sets are extended to generalized low-density parity-check (GLDPC) codes. In particular, the fully absorbing sets are stable under the bit flipping algorithm. The finite-length (elementary) trapping and (fully) absorbing set enumerators for unstructured irregular GLDPC code ensembles are derived using generating functions. An efficient method to evaluate the asymptotic trapping and (fully) absorbing set distributions is presented, which requires solving a system of equations. Using this method, the asymptotic distribution of trapping and (fully) absorbing sets are evaluated for some example GLDPC code ensembles. Experimental results show that the proposed definitions yield graph structures that are harmful for bit flipping decoders. The generating function approach is also used to derive the finite-length and asymptotic trapping and (elementary) absorbing set enumerators for non-binary irregular LDPC code ensembles.

Further Improvements in Decoding Performance for 5G LDPC Codes Based on Modified Check-Node Unit

Further Improvements in Decoding Performance for 5G LDPC Codes Based on Modified Check-Node Unit

Asymmetric Dual-Mode Constellation and Protograph LDPC Code Design for Generalized Spatial MPPM Systems

To achieve reliable and efficient transmissions in free-space optical (FSO) communication, this paper designs a new protograph low-density parity-check (PLDPC) coded generalized spatial multipulse position modulation (GSMPPM) system over weak turbulence channels. Specifically, we investigate the PLDPC code, generalized space shift keying (GSSK) modulation, and MPPM constellation. First, we propose a type of novel GSMPPM constellations that intelligently integrates the GSSK into MPPM, referred to as asymmetric dual-mode (ADM) constellations, so as to improve the performance of the PLDPC-coded GSMPPM system. Furthermore, exploiting a protograph extrinsic information transfer (PEXIT) algorithm, we construct a type of improved PLDPC code, referred to as I-PLDPC code, which outperforms the existing PLDPC codes over weak turbulence channels. Analytical and simulation results show that the proposed ADM constellations and the proposed I-PLDPC code can obtain noticeable performance gains over their counterparts. Therefore, the proposed PLDPC-coded GSMPPM system with ADM constellations is competent to satisfy the high-reliability requirement for FSO applications.

Matryoshka Globally-Coupled LDPC Code

This paper proposes a new low-density parity-check (LDPC) code called Matryoshka globally-coupled (MGC) LDPC code. We give the definition of <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> -fold MGC-LDPC code which consists of <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> layers Matryoshka-style codes, i.e., <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mgc</sub> (1); <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mgc</sub> (2); ⋯; <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mgc</sub> ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> ). Moreover, the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> Matryoshka-style codes can form a Matryoshka chain <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mgc</sub> (1) ≺ <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mgc</sub> (2) ≺ ⋯ ≺ <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mgc</sub> ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> ), which indicates that a high-layer Matryoshka-style code contains a low-layer Matryoshka-style code just like the Matryoshka dolls. Thus, the proposed <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> -fold MGC-LDPC code naturally has rate-compatible feature. Based on the superposition (SP) construction, we present truncating and masking methods to construct the base matrices (BMs) of MGC-LDPC codes. More importantly, we introduce the double lower triangular (DLT) form of parity-check matrix for further developing a recursive encoding scheme for MGC-LDPC codes. With the help of the proposed encoding scheme, the local codes of MGC-LDPC code can be independently encoded, and the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</i> th layer Matryoshka-style codeword can be recursively obtained by the ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</i> – 1)th layer Matryoshka-style code and the local codes in nth layer Matryoshka-style code for 2 ≤ <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</i> ≤ N. Simulations show that MGC-LDPC codes can perform well over both the additive white Gaussian noise channel (AWGNC) and binary erasure channel (BEC), and provide a flexible rate-compatible feature to satisfy the requirements of different scenarios.

Block Markov superposition transmission of LDPC codes

In this paper, based on the block Markov superposition transmission (BMST) technique, we present a new class of coupled low-density parity-check (LDPC) codes for the transport block (TB)-based transmission to improve the error-correcting performance. For encoding, the previous LDPC codewords corresponding to a TB (at prior time slot) are interleaved and superimposed onto the current LDPC codewords, resulting in the transmitted codewords. For decoding, the sliding window decoding algorithm with sum-product or min-sum implementations can be employed, inheriting a relatively low-latency decoding. A distinguished advantage of the proposed coded transmission over spatially coupled LDPC (SC-LDPC) codes is that the encoder/decoder of the proposed codes can be designed by reusing the encoder/decoder architecture of component block LDPC codes. To analyze the waterfall performance of BMST-LDPC code ensembles, we present the protograph-based EXIT chart analysis, which can efficiently predict the error-correcting performance in waterfall region. To analyze the error-floor performance of BMST-LDPC codes, we employ the genie-aided (GA) lower bound, which can efficiently predict the error-correcting performance in error-floor region. For ease of implementation, the BMST-LDPC codes are constructed by taking the (2, 4)-raptor-like LDPC codes or the 5G LDPC codes as the basic components. The numerical results reveal that the proposed codes can have capacity-approaching performance, exhibiting a gap of 0.007 ​dB away from the corresponding Shannon limit. They also reveal that, by using the proposed BMST construction, the error-correcting performance of the original 5G block LDPC codes can be significantly improved, achieving coding gains up to one dB over the AWGN channels and two dB over the fast fading channels.

Non-Gaussian Reconciliation for Continuous-Variable Quantum Key Distribution

Non-Gaussian modulation can improve the performance of continuous-variable quantum key distribution (CV QKD). For Gaussian-modulated coherent-state CV QKD, photon subtraction can realize non-Gaussian modulation, which can be equivalently implemented by non-Gaussian postselection. However, non-Gaussian reconciliation has not been deeply researched, which is one of the key technologies in CV QKD. In this paper, we propose a non-Gaussian reconciliation method to obtain identical keys from non-Gaussian data. Multidimensional reconciliation and multiedge-type low-density parity-check codes (MET LDPC) are used in a non-Gaussian reconciliation scheme, where the layered belief propagation decoding algorithm of MET LDPC codes is used to reduce the decoding complexity. Furthermore, we compare the error-correction performance of Gaussian data and non-Gaussian data. The results show that the error-correction performance of non-Gaussian data is better than Gaussian data, where the frame error rate can be reduced by 50 % for code rate 0.1 at SNR of 0.1554 and the average iteration number can be reduced by 25 %.

Quantum Low-Density Parity-Check Codes for Modular Architectures

In efforts to scale the size of quantum computers, modularity plays a central role across most quantum computing technologies. In the light of fault tolerance, this necessitates designing quantum error-correcting codes that are compatible with the connectivity arising from the architectural layouts. In this paper, we aim to bridge this gap by giving a novel way to view and construct quantum LDPC codes tailored for modular architectures. We demonstrate that if the intra- and inter-modular qubit connectivity can be viewed as corresponding to some classical or quantum LDPC codes, then their hypergraph product code fully respects the architectural connectivity constraints. Finally, we show that relaxed connectivity constraints that allow twists of connections between modules pave a way to construct codes with better parameters.

Beyond Turbo: An Integrated ADMM Receiver for URLLC MIMO Systems

The emergence of ultra-reliable and low-latency communication (URLLC) poses challenges on the receiver design. Classical turbo receivers, which exhibit excellent performance under long data packet transmissions, can suffer from non-negligible error propagation in the context of URLLC due to the use of short error correction codes. To address this issue, we advocate a novel joint detection and decoding (JDD) receiver for URLLC multi-input multi-output (MIMO) systems with short low-density parity-check (LDPC) codes. Specifically, we first establish a maximum likelihood (ML) based JDD problem formulation by incorporating the bit-to-symbol mapping and the LDPC code constraints, which circumvents the error propagation issue in turbo receivers. In order to solve this difficult large-scale non-convex problem, we develop a low-complexity alternating direction method of multipliers (ADMM) algorithm to directly acquire the ultimate decoding results. Simulation results validate the performance advantage of the proposed JDD receiver over the turbo receivers in the URLLC scenario.

Construction of protograph LDPC codes based on the convolution neural network

This paper presents an intelligent protograph construction algorithm. Protograph LDPC codes have shown excellent error correction performance and play an important role in wireless communications. Random search or manual construction are often used to obtain a good protograph, but the efficiency is not high enough and many experience and skills are needed. In this paper, a fast searching algorithm is proposed using the convolution neural network to predict the iterative decoding thresholds of protograph LDPC codes effectively. A special input data transformation rule is applied to provide stronger generalization ability. The proposed algorithm converges faster than other algorithms. The iterative decoding threshold of the constructed proto-graph surpasses greedy algorithm and random search by about 0.53 dB and 0.93 dB respectively under 100 times of density evolution. Simulation results show that quasi-cyclic LDPC (QC-LDPC) codes constructed from the proposed algorithm have competitive performance compared to other papers.

Deterministic Construction of Compressed Sensing Measurement Matrix with Arbitrary Sizes via QC-LDPC and Arithmetic Sequence Sets

It is of great significance to construct deterministic measurement matrices with good practical characteristics in Compressed Sensing (CS), including good reconstruction performance, low memory cost and low computing resources. Low-density-parity check (LDPC) codes and CS codes can be closely related. This paper presents a method of constructing compressed sensing measurement matrices based on quasi-cyclic (QC) LDPC codes and arithmetic sequence sets. The cyclic shift factor in each submatrix of QC-LDPC is determined by arithmetic sequence sets. Compared with random matrices, the proposed method has great advantages because it is generated based on a cyclic shift matrix, which requires less storage memory and lower computing resources. Because the restricted isometric property (RIP) is difficult to verify, mutual coherence and girth are used as computationally tractable indicators to evaluate the measurement matrix reconstruction performance. Compared with several typical matrices, the proposed measurement matrix has the minimum mutual coherence and superior reconstruction capability of CS signal according to one-dimensional (1D) signals and two-dimensional (2D) image simulation results. When the sampling rate is 0.2, the maximum (minimum) gain of peak signal-to-noise ratio (PSNR) and structural similarity index (SSIM) is up to 2.89 dB (0.33 dB) and 0.031 (0.016) while using 10 test images. Meanwhile, the reconstruction time is reduced by nearly half.

A Cascade Network for Blind Recognition of LDPC Codes

Coding blind recognition plays a vital role in non-cooperative communication. Most of the algorithm for coding blind recognition of Low Density Parity Check (LDPC) codes is difficult to apply and the problem of high time complexity and high space complexity cannot be solved. Inspired by deep learning, we propose an architecture for coding blind recognition of LDPC codes. This architecture concatenates a Transformer-based network with a convolution neural network (CNN). The CNN is used to suppress the noise in real time, followed by a Transformer-based neural network aimed to identify the rate and length of the LDPC codes. In order to train denoise networks and recognition networks with high performance, we build our own datasets and define loss functions for the denoise networks. Simulation results show that this architecture is able to achieve better performance than the traditional method at a lower signal-noise ratio (SNR). Compared with the existing methods, this approach is more flexible and can therefore be quickly deployed.

Designing Protograph LDPC Codes for Differential Chaotic Bit-Interleaved Coded Modulation System for Underwater Acoustic Communications

Underwater acoustic (UWA) communications face many challenges, such as large multipath delay, severe fading and the time-varying distortions. Chaotic modulations have shown advantages in UWA communications, but the reliability of current chaotic modulations is still not guaranteed. In this paper, a short-length protograph low-density parity-check (P-LDPC) code design framework for the differential chaotic bit-interleaved coded modulation (DC-BICM) system for UWA communication is proposed. This design framework, considering the requirements of short codes in UWA communications, integrates the DC-BICM system, UWA channel and the differential evolutionary code searching algorithm. Through this design framework, the optimized short P-LDPC code can be obtained. Simulation results show that the DC-BICM system with the proposed P-LDPC code can obtain more than 0.48 dB coding gain and reduce 32.6%~69.5% of the average number of iterations compared with the counterparts. Moreover, the reconstructed underwater image with the proposed P-LDPC code is clearest with the highest peak-signal-noise ratio value when compared with counterparts.

Weighted BATS Codes with LDPC Precoding

Batched Sparse (BATS) codes are a type of network coding scheme that use a combination of random linear network coding (RLNC) and fountain coding to enhance the reliability and efficiency of data transmission. In order to achieve unequal error protection for different data, researchers have proposed unequal error protection BATS (UEP-BATS) codes. However, current UEP-BATS codes suffer from high error floors in their decoding performance, which restricts their practical applications. To address this issue, we propose a novel UEP-BATS code scheme that employs a precoding stage prior to the weighted BATS code. The proposed precoding stage utilizes a partially regular low-density parity-check (PR-LDPC) code, which helps to mitigate the high error floors in the weighted BATS code We derive the asymptotic performance of the proposed scheme based on density evolution (DE). Additionally, we propose a searching algorithm to optimize precoding degree distribution within the complexity range of the precoding stage. Simulation results show that compared to the conventional weighted BATS codes, our proposed scheme offers superior UEP performance and lower error floor, which verifies the effectiveness of our scheme.