Inversion Channel Mobility Research Articles

4H-SiC MOSFETs on C(000-,1) Face with Inversion Channel Mobility of 127cm<sup>2</sup>/Vs

4H-SiC MOSFETs on C(000-,1) Face with Inversion Channel Mobility of 127cm<sup>2</sup>/Vs

Enhancement of Inversion Channel Mobility in 4H-SiC MOSFETs using a Gate Oxide Grown in Nitrous Oxide (N<sub>2</sub>O)

Enhancement of Inversion Channel Mobility in 4H-SiC MOSFETs using a Gate Oxide Grown in Nitrous Oxide (N<sub>2</sub>O)

Interfacial properties and reliability of SiO2 grown on 6H-SiC in dry O2 plus trichloroethylene

A new process of growing SiO2 on n- and p-type 6H-SiC wafers in dry O2+trichloroethylene (TCE) was investigated. The interface quality and reliability of 6H-SiC metal-oxide-semiconductor (MOS) capacitors with gate dielectrics prepared by the process were examined. As compared to conventional dry O2 oxidation, the O2+TCE oxidation resulted in lower interface-state, border-trap and oxide-charge densities, and enhanced reliability. This could be attributed to the passivation effect of Cl2 or HCl on structural defects at/near the SiC/SiO2 interface, and the gettering effect of Cl2 or HCl on ion contamination. In addition, increased oxidation rate was observed in the O2+TCE ambient, and can be used to reduce the normally-high thermal budget for oxide growth. All these are very attractive for fabricating SiC MOS field-effect transistors (MOSFETs) with high inversion-channel mobility and high hot-carrier reliability.

Effective Normal Field Dependence of Inversion Channel Mobility in 4H-SiC MOSFETs on the (11-20) Face

Effective Normal Field Dependence of Inversion Channel Mobility in 4H-SiC MOSFETs on the (11-20) Face

Correlation between channel mobility and shallow interface traps in SiC metal–oxide–semiconductor field-effect transistors

The shallow interface trap density near the conduction band in silicon carbide (SiC) metal–oxide–semiconductor (MOS) structure was evaluated by making capacitance–voltage measurements with gate-controlled-diode configuration using the n-channel MOS field effect transistors (MOSFETs). The close correlation between the channel mobility and the shallow interface trap density was clearly found for the 4H- and 6H-SiC MOSFETs prepared with various gate-oxidation procedures. This result is strong evidence that a significant cause of the poor inversion channel mobility of SiC MOSFETs is the high density of shallow traps between the conduction band edge and the surface Fermi level at the threshold.

4H- and 6H-SiC MOSFETs Fabricated on Sloped Sidewalls Formed by Molten KOH Etching

Vertical 4H- and 6H-SiC MOSFETs have been fabricated on sloped sidewalls formed by molten KOH etching, which is expected to be free from the damage onto a channel region caused by a dry etching process. The slope angle could be controlled by adjusting etching temperature, and the anisotropy of inversion channel mobility was investigated. A higher inversion channel mobility and a lower threshold voltage were observed with increasing slope angle of channel region toward (1 (1) over bar 00) or (11 (2) over bar0). The highest mobility was 32 cm(2)/Vs for 6H-SiC, which is relatively high as an inversion channel mobility of UMOSFETs compared to previous works. The dependence of device performance on the slope angle and crystal orientation is discussed.

Correlation between Inversion Channel Mobility and Interface Traps near the Conduction Band in SiC MOSFETs

Correlation between Inversion Channel Mobility and Interface Traps near the Conduction Band in SiC MOSFETs

Influence of the Crystalline Quality of Epitaxial Layers on Inversion Channel Mobility in 4H-SiC MOSFETs

Influence of the Crystalline Quality of Epitaxial Layers on Inversion Channel Mobility in 4H-SiC MOSFETs

Significant Improvement of Inversion Channel Mobility in 4H-SiC MOSFET on (11-20) Face Using Hydrogen Post-Oxidation Annealing

Significant Improvement of Inversion Channel Mobility in 4H-SiC MOSFET on (11-20) Face Using Hydrogen Post-Oxidation Annealing

Strong dependence of the inversion mobility of 4H and 6H SiC(0001) MOSFETs on the water content in pyrogenic re-oxidation annealing

The inversion channel mobility of 4H and 6H-SiC(0001) metal-oxide-semiconductor field-effect transistors (MOSFETs) has been evaluated for its dependence on the re-oxidation annealing (ROA) conditions in a wet oxidizing ambient. The wet ambient was supplied by the pyrogenic reaction of hydrogen and oxygen gas (pyrogenic ROA), where the water vapor content (/spl rho/(H/sub 2/O)) was controlled by adjusting the hydrogen/oxygen gas flow rate. Not only the annealing temperature and the time, but also /spl rho/(H/sub 2/O) are found to be the critical parameters for improving channel mobility. As a result, field-effect channel mobilities as high as 47 cm/sup 2//Vs for 4H and 95 cm/sup 2//Vs for 6H-SiC MOSFETs were achieved by pryrogenic ROA treatment with a /spl rho/(H/sub 2/O) of 50%.

Excellent effects of hydrogen postoxidation annealing on inversion channel mobility of 4H-SiC MOSFET fabricated on (11 2 0) face

Effects of hydrogen postoxidation annealing (H/sub 2/ POA) on 4H-silicon carbide (SiC) MOSFETs with wet gate oxide on the (112~0) face have been investigated. As a result, an inversion channel mobility of 110 cm/sup 2//Vs was successfully achieved using H/sub 2/ POA at 800/spl deg/C for 30 min. H/sub 2/ POA reduces the interface trap density by about one order of magnitude compared with that without H/sub 2/ POA, resulting in considerable improvement of the inversion channel mobility to 3.5 times higher than that without H/sub 2/ POA. In addition, 4H-SiC MOSFET with H/sub 2/ POA has a lower threshold voltage of 3.1 V and a wide gate voltage operation range in which the inversion channel mobility is more than 100 cm/sup 2//Vs.

Improved inversion channel mobility for 4H-SiC MOSFETs following high temperature anneals in nitric oxide

Results presented in this letter demonstrate that the effective channel mobility of lateral, inversion-mode 4H-SiC MOSFETs is increased significantly after passivation of SiC/SiO/sub 2/ interface states near the conduction band edge by high temperature anneals in nitric oxide. Hi-lo capacitance-voltage (C-V) and ac conductance measurements indicate that, at 0.1 eV below the conduction band edge, the interface trap density decreases from approximately 2/spl times/10/sup 13/ to 2/spl times/10/sup 12/ eV/sup -1/ cm/sup -2/ following anneals in nitric oxide at 1175/spl deg/C for 2 h. The effective channel mobility for MOSFETs fabricated with either wet or dry oxides increases by an order of magnitude to approximately 30-35 cm/sup 2//V-s following the passivation anneals.

A cause for highly improved channel mobility of 4H-SiC metal–oxide–semiconductor field-effect transistors on the (112̄0) face

4H-silicon carbide (SiC) metal–oxide–semiconductor field-effect transistors fabricated on both (112̄0) and (0001) faces were characterized at various temperatures. From the temperature dependence of channel mobility, carrier transport in the inversion layer at the SiO2/4H-SiC(112̄0) interface was found to be affected by phonon scattering (μ0∼T−2.2), while that at the SiO2/4H-SiC(0001) interface was thermally activated (μ0∼T2.6) due to the decrease of Coulomb scattering by emission of electrons from acceptor-like interface states. From the temperature dependence of threshold voltage, the density of acceptor-like interface states near the conduction band edge seems to be low at the SiO2/4H-SiC(112̄0) interface, but quite high (>1013 cm−2 eV−1) at the SiO2/4H-SiC(0001) interface. The low density of acceptor-like interface states near the conduction band edge on the (112̄0) face should be the primary cause for the high inversion-channel mobility.

Anisotropy of Inversion Channel Mobility in 4H- and 6H-SiC MOSFETs on (11-20) Face

Anisotropy of Inversion Channel Mobility in 4H- and 6H-SiC MOSFETs on (11-20) Face

The Effects of Post-Oxidation Anneal Conditions on Interface State Density Near the Conduction Band Edge and Inversion Channel Mobility for SiC MOSFETs

ABSTRACTResults are reported for the passivation of interface states near the conduction band edge in n-4H-SiC using post-oxidation anneals in nitric oxide, ammonia and forming gas (N2/5%H2). Anneals in nitric oxide and ammonia reduce the interface state density significantly, while forming gas anneals are largely ineffective. Results suggest that interface states in SiO2/SiC and SiO2/Si have different origins, and a model is described for interface state passivation by nitrogen in the SiO2/SiC system. The inversion channel mobility of 4H-SiC MOSFETs increases with the NO annealing.

High channel mobility in inversion layers of 4H-SiC MOSFETs by utilizing (112~0) face

A dramatic improvement of inversion channel mobility in 4H-SiC MOSFETs was successfully achieved by utilizing the (112~0) face: 17 times higher (95.9 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs) than that on the conventional (0001) Si-face (5.59 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs). A low threshold voltage of MOSFETs on the (112~0) face indicates that the (112~0) MOS interface has fewer negative charges than the (0001) MOS interface. Small anisotropy of channel mobility in 4H-SiC MOSFETs (μ/sub (11~00)//μ/sub (0001)/=0.85) reflects the small anisotropy in bulk electron mobility.

Significantly improved performance of MOSFETs on silicon carbide using the 15R-SiC polytype

Recent studies regarding MOSFETs on SiC reveal that 4H-SiC devices suffer from a low inversion layer mobility, while in 6H-SiC, despite a higher channel mobility the bulk mobility parallel to the c-axis is too low, making this polytype unattractive for power devices. This work presents experimental mobility data of MOSFETs fabricated on different polytypes as well as capacitance-voltage (C-V) measurements of corresponding n-type MOS structures which give evidence that the low inversion channel mobility in 4H-SiC is caused by a high density of SiC-SiO/sub 2/ interface states close to the conduction band. These defects are believed to be inherent to all SiC polytypes and energetically pinned at around 2.9 eV above the valence band edge. Thus, for polytypes with band gaps smaller than 4H-SiC like 6H-SiC and 15R-SiC, the majority of these states will become resonant with the conduction band at room temperature or above, thus remarkably suppressing their negative effect on the channel mobility. In order to realize high performance power MOSFETs the results reveal that 15R-SiC is the best candidate among all currently accessible SiC polytypes.

Carrier mobility in inversion layers of Si–thin Ta 2O 5 structures

The behaviour of carrier mobility in the inversion channel of gateless p-MOSFETs with thin (7–50 nm) Ta 2O 5 layers, having a dielectric constant of (23–27) and prepared by rf sputtering of Ta in an Ar–O 2 mixture, has been investigated. It is shown that independently of the high dielectric constant of the layers, the transport properties in the channel are strongly affected by defects in Ta 2O 5/Si system in the form of oxide charge and interface states. These defects act as scattering centers and are responsible for the observed minority carrier mobility degradation. Both, the oxide and the interface state charges are virtually independent on the oxygen content (in the range 10–30%) during the sputtering process. A reduction of the oxide charge and the density of interface states with increasing Ta 2O 5 film thickness was found, which results in the observed increase of the inversion channel mobility with thickness. It is assumed that the bond defects (broken or strained Ta-bonds as well as weak Si–O bonds in the transition region between Ta 2O 5 and Si) are much more probable sources of defect centers rather than Ta and O vacancies or impurities.

Gate-self-aligned p-channel germanium MISFETs

The authors have fabricated the first gate-self-aligned germanium MISFETs and have obtained record transconductance for germanium FETs. The devices fabricated are p-channel, inversion-mode germanium MISFETs. A germanium-oxynitride gate dielectric is used and aluminum gates, serve as the mask for self-aligned source and drain implants. A maximum room-temperature transconductance of 104 mS/mm was measured for a 0.6- mu m gate length. A hole inversion channel mobility of 640 cm/sup 2//V-s was calculated using transconductance and capacitance data from long-channel devices. This large hole channel mobility suggests that germanium may be an attractive candidate for CMOS technology. >

MOSFET mobility degradation due to interface-states, generatd by Fowler-Nordheim electron injection.

The degradation of the MOSFET inversion channel mobility due to generated interface-states was studied, generating the interface-states by Fowler-Nordheim injection. The inversion channel carrier mobility was directly related to the interface-state density and was not affected by the generated oxide charge. The mobility degradation due to the interface-states was in agreement with previous degradation data based on fixed interface charge by Sun and Plummer [1], provided the mobility was measured at the point of maximum transconductance, and only the charged fraction of the total interface-state spectrum under strong inversion conditions was included in the mobility model.