Integrated Passive Device Process Research Articles

Ultra‐miniaturized filtering power divider chip on integrated passive device technology using complex isolation network

In this letter, an ultra-miniaturized filtering power divider (FPD) chip based on integrated passive device (IPD) technology using a complex isolation network is proposed. Three lumped L represents inductor, C represents capacitor (LC) tanks and two electromagnetic hybrid coupling units are used to realize the third-order quasi-elliptical filtering response with high-frequency selectivity and wide stopband, which are designed and realized by using the IPD process to achieve ultra-miniaturized size. In addition, the complex impedance is utilized to form the isolation network, so good in-band isolation can be easily achieved. Moreover, the working principle and design method of this proposed FPD is well illustrated, a prototype with 3-dB fractional bandwidth of 19.3% at 2.6 GHz (f0) is in final designed and fabricated. The isolation is higher than 16 dB within the passband, and upper-stopband attenuation higher than 20 dB is extended to 40 GHz (15.4f0). It occupies only 2.76 mm × 2.0 mm, that 0.023λ0 × 0.017λ0, where λ0 is the free-space wavelength at f0.

Compact, Reflectionless Band-Pass Filter: Based on GaAs IPD Process for Highly Reliable Communication

For highly reliable and compact communication of front-end modules, a miniaturized reflectionless band-pass filter, based on the GaAs integrated passive device (IPD) process, is proposed in this work. The stop-band signal absorption rate of the filter can reach more than 90% and greatly reduce the influence of electromagnetic interference for sensitive devices. First, a circuit topology of reflectionless filter is proposed. Then, the miniaturized reflectionless band-pass filter is designed and fabricated based on GaAs IPD process with a compact size of only 0.85 mm × 1.33 mm × 0.09 mm (0.011λ × 0.018λ × 0.001λ). The filter operates at frequency ranging from 3.3 GHz to 4.5 GHz for 5G communication, the insertion loss (S21) is less than 3 dB, the return loss in the passband (S11) is over 15 dB, the stopband return loss (S11) is over 10 dB, and the out-of-band suppression (S21) reached 19 dB. All the measured results are in good agreement with the simulated results. It shows great potential in the process of designing highly reliable and compact monolithic integrated wireless modules and wearable electronics.

IPD-Based Miniaturized Wideband Bandpass Filter With Frequency-Dependent Complex Source and Load

In this article, an ultraminiaturized bandpass-filtering matching network based on GaAs substrate integrated passive device (IPD) technology is proposed, which is suitable for frequency-dependent complex source and load. The presented bandpass filter (BPF) is derived from an equal-ripple Chebyshev low-pass filter prototype through frequency transformation and impedance scaling. The susceptance required by the source and load is extracted from the adjacent susceptance blocks, and the final reactance/susceptance block is equivalent to a series/parallel LC circuit at the two edge frequencies. Therefore, the proposed design has both bandpass high-selectivity and impedance matching functions, and simultaneously, the bandwidth can be flexibly controlled. Finally, a wideband BPF example with the center frequency of 3.5 GHz was simulated and fabricated with the IPD process, showing satisfactory performances.

On-Chip Dual-Band Millimeter-Wave Power Divider Using GaAs-Based IPD Process

A new on-chip dual-band Wilkinson power divider (WPD), developed on a GaAs-based integrated passive device (IPD) process, is designed at 28/60 GHz for millimeter-wave (mmW) applications. Composite right/left-handed lines in microstrip form are employed to achieve the dual-band property. Thanks to the low-loss feature of the GaAs-based IPD process, the proposed mmW WPD ensures comparable performance when compared to its counterparts at microwave frequencies. Besides, the proposed design, one of the few on-chip dual-band WPDs designed in mmW bands, yields better performance in terms of input matching and power loss when compared with the previous work.

Compact mm-Wave Bandpass Filters Using Silicon Integrated Passive Device Technology

In this letter, a compact bandpass filter (BPF) using integrated passive device (IPD) technology is presented, which is based on a pair of coupled-line inductors. To analyze the principle of this design, a simple but effective equivalent circuit model is provided. Using this model, it is easy to increase the number of resonators order. This structure is implemented by using a Si-based IPD process in which line inductors are located on a thick laminated organic ( $H = 40\,\,\mu \text{m}$ ) with a ground metal for shielding of lossy silicon. The minimum insertion loss of two-resonator BPF is 1.1 dB, and cascaded two-resonator structure is 2.3 dB. The size of two-resonator and cascaded two-resonator BPFs, excluding the pads, are only 0.246 $\text {mm} \times 0.44$ mm and 0.492 $\text {mm} \times 0.88$ mm, respectively.

Analytical Noise Optimization of Single-/Dual-Band MOS LNAs With Substrate and Metal Loss Effects of Inductors

Analytical noise formulations and design optimization of single- and dual-band inductively source-degenerated MOS low-noise amplifiers (LNAs) with the substrate and metal loss effects of on-chip inductors are established in this paper. It reveals that the noise figures of both single-/dual-band LNAs degrade substantially under the consideration of the loss effects. However, by increasing the device size, the noise optimization methodology of simultaneous noise and input match for a single-band LNA still holds true with concern for the loss effects. For a dual-band LNA, analytical noise optimization for a balanced noise design is established for inductors with metal and substrate loss and indicates a larger device size. The substrate and metal loss effects of inductors can be mitigated using integrated passive device (IPD) process for the input match network. The demonstrated single-band 0.18- $\mu \text{m}$ MOS LNAs with and without IPD process show noise figures of 1.53 and 2.52 dB at 2.4 GHz, respectively. Subsequently, the implemented dual-band 0.18- $\mu \text{m}$ MOS LNAs with and without IPD process show noise figures of 1.6/2.6 and 3.25/4.1 dB at 2.4/5 GHz, respectively.

Comparison of 5-GHz Quadrature Couplers Using GaAs and Silicon-Based IPD Technologies

The 5-GHz quadrature couplers implemented in GaAs and silicon-based integrated passive device (IPD) technologies are presented. Although GaAs technology is superior to silicon-based technology in terms of substrate resistivity and back-side vias, the quadrature coupler using a silicon IPD process achieved better insertion loss due to thick metal traces and comparable substrate resistivity. While the coupler using the GaAs process employed 4- $\mu \text{m}$ -thick metal traces, the coupler using silicon IPD technology employed 10.8- $\mu \text{m}$ -thick traces realized with via connections between a top metal of 5.3- $\mu \text{m}$ thickness and a bottom metal of 5.5- $\mu \text{m}$ thickness. The couplers using the silicon and GaAs IPD process technologies showed 0.15 and 0.27 dB of insertion loss, respectively. Also, the silicon IPD design uses a slightly different topology which splits a coupled inductor into two coupled inductors with shunt capacitors to achieve a broader distributed bandwidth.

New Wideband Miniature Branchline Coupler on IPD Technology for Beamforming Applications

In this paper, we present a new wideband miniature branchline coupler as a key circuit to be integrated in 60-GHz packaged beamforming networks for phased-array antennas. First, the integrated passive device (IPD) technology from STMicroelectronics is investigated in the mm-wave range through the simulation, fabrication, and measurements of a microstrip line and a simple hybrid coupler. Then, a novel coupler topology with emphasis on miniaturization and broadband operation is theorized. Analytical equations are derived and a 60-GHz coupler is optimized on IPD technology. Measurement results are discussed and compared with state-of-the art publications. The whole 57-66-GHz bandwidth is efficiently covered with the three following performance: -10-dB impedance matching, ±1-dB amplitude imbalance, and ±5° phase imbalance. As an application example, the novel coupler is integrated into a 4 × 4 Butler matrix suitable for an array-antenna demonstrating stateof-the art performance in terms of insertion loss and phase error. The measurement of different samples shows low variation of the IPD process because of very good reproducibility making it a suitable candidate for circuits operating in the 60-GHz band.

Optimization of NiCr Thin Film Resistor on Semi-insulating-GaAs Substrate in Advanced Integrated Passive Device Process

In this paper, a subtractive method is proposed for the optimization of NiCr thin film resistor (TFR) in steady of a method of depositing the bottom metal layer from the semi-additive method. The variations of the maximum sheet resistances in the optimized NiCr TFR are within 2.88% and the 3-sigma variation is around 0.87%, which are much higher accurate than the previous fabricated TFRs demonstrated in the lately published papers. The proposed manufacturing process is an optimal solution for manufacturing the NiCr TFRs in the advanced integrated passive devices (IPDs) process on the semi-insulating-GaAs substrate that require stringent size and volumetric efficiency.

RF System in Packages (SiP) using Integrated Passive Devices

Passive components are indispensible parts used in System in Packages (SiP) for various functions, such as decoupling, biasing, resonating, filtering, matching, transforming, etc. Making passive components embedded inside laminate substrates is limited on passive density. SMD solutions are by far the most popular approaches in the industry, and may still be dominant for some times. As high integration and high performance have become a trend in the packaging solutions, integrated passive device (IPD) technology shows some unique features, which helps to achieve these goals, especially for RF packages. In the IPD process, low-loss substrate material is used, and therefore high-Q inductors can be built. In addition, thin-film IPD process has finer pitch feature and better tolerance control than other commonly available ones, such as PCB and LTCC technologies, which may yield very repeatable electrical performance, and provide packages of high integration. Several cases of study will be presented and here are some highlights of them. In case one, a most straightforward SiP approach is presented using QFN package, where several dies (including IPD dies) are implemented side-by-side. This approach may give fast developing cycle times. But importantly, wire-bonding models have big impact on performance from RF packaging, and should be obtained accurately for designs. Another case of study is a stack-die package, where inter-die coupling/cross talk could be a big issue as far as electrical performance is concerned. Placement of some critical parts, such as coils in IPD and in VCO, should be investigated very carefully in design phases. This leads to a concept of ‘IC/IPD/package’ co-design. Finally, a hybrid SiP package solution, where an IPD die is embedded in a mold compound along side with a RF power amplifier die, is presented. This approach (so called ‘eWLB’ packaging), results in the shortest interconnection between dies to dies and dies to balls. With the benefit from both the IPD process and the eWLB process (where low-loss mold materials are used), this approach may lead to high electrical performance and small form-factor at the same time.

MMW Antenna in IPD Process for 60-GHz WPAN Applications

This letter presents an on-chip millimeter-wave (MMW) Yagi-Uda antenna implemented by the integrated passive device (IPD) process. This antenna consists of a half-wavelength dipole element and two director elements to achieve higher directivity than conventional wire dipole antennas and is excited using a micro-strip via-hole balun structure. Measurements indicate that the on-chip antenna achieves the bandwidth of 18% (53.8-64.8 GHz), a peak gain of 6 dBi. The simulated front-to-back ratio and radiation efficiency are 15 dB and 93%, respectively. Compared to the CMOS process, the characteristics of the designed antenna are much better. Thus, this 60-GHz chip antenna obtains a compact size of 1.5 × 1.8 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , high efficiency, and high-gain advantages.

Passive Device Integration from Silicon Technology

Passive components are indispensible parts used in electronics circuits for various functions, such decoupling, biasing, resonating, filtering, matching, transforming, etc. These passive components can be made on chips, or in PCBs, or in SMDs. SOC (system-on-chip) solutions where all passives are implemented may be long-term goals, but suffer high cost and long development cycle times at the time being. Making passive components embedded inside laminate substrates is limited on passive density. SMD solutions are by far the most popular approaches in the industry, and may still be dominant for some times. Passive components consume 70%–80% area of an electric package in a SiP solution, and therefore it is a great deal to reduce the area of passive components, in order to reduce the size of entire package. We have developed an IPD (integrated passive device) process from silicon technology to make these passive components of high-Q performance, preferably to be used in RF packages. Low-loss substrate material is used in this process, and thick Cu layer is used for high-Q inductors. From this process, we can make capacitors in 330pF/mm sq density, and the Q-factor is around 30–35 peak for a 3nH–5 nH inductor. Most importantly, the thin-film IPD process has better tolerance control than other commonly available ones, such as PCB and LTCC technologies, which may results in very repeatable electrical performance, and provides packages in high integration. For a passive function block, using BPF (band-pass-filter) as an example, an IPD filter is typically two times smaller in X-Y size and half thinner in Z-height. This makes such IPD very suitable to be integrated in a SiP package. Using some case studies (individual IPD and chip-scale-module-package), we will present how high integration can be achieved, and where are the right spots to use IPD approaches other than SAW, or SMD, or LTCC solutions for RF SiP applications.

Class-E CMOS PAs for GSM Applications

Various Class-E CMOS power amplifiers for GSM applications are presented. A stage-convertible transformer for a dual mode power amplifier is proposed to increase efficiency in the low-output power region. An integrated passive device(IPD) process is used to reduce combiner losses. A split secondary 1:2 transformer with IPD process is designed to obtain efficient and symmetric power combining. A quasi-four-pair structure of CMOS PA is also proposed to overcome the complexities of power combining.

Directional coupler for UHF mobile RFID reader

AbstractIn order to offer RFID services on mobile phones, the RFID reader must be embedded on the handset as a chip. However, the directional coupler was used as a ceramic passive component in conventional handsets. RFID system using an identical Tx/Rx carrier frequency has a significant volume limitation compared with active components. This article presents the directional coupler design for UHF RFID mobile reader using IPD (Integrated Passive Device) process. T and π‐type coupler with dimensions of 1.74 × 1.6 and 1.32 × 1.4 mm2 were assembled. © 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 1501–1504, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.22497

RF-IPD directional coupler for mobile RFID handset applications

To offer RFID services on mobile phones, the RFID reader must be embedded on the handset as a chip. However, the directional coupler, a ceramic passive component used in conventional RFID readers with identical Tx/Rx carrier frequency, has been too large for cellular handset applications. A miniaturised directional coupler design for UHF RFID mobile readers using an IPD (integrated passive device) process is presented. Parallel-coupled line theory has been used for formulation of a T-type and a -type coupler. Couplers with dimensions of 1.74 1.6 mm and 1.32 1.4 mm were assembled using the IPD process.