Integrated Gate Driver Research Articles

9‐3: BLA LTPS TFTs based μ‐LED Display with Integrated Digital Driving

We propose a blue laser annealed (BLA) LTPS TFT based μ‐LED display with integrated gate driver and digital data driver. The BLA LTPS TFTs are fabricated using a blue diode laser based lateral crystallization method, which reduces the cost compare to ELA process while offering higher mobility for high current driving. The integrated gate driver and digital data driver enable simplified driving scheme, which further reduces the cost for external driver ICs. Together with the μ‐LEDs which offer high brightness over 40,000 cd/m2, the fabricated 32 x 32 μ‐LED display demonstrates potential approach for smart headlamp and intelligent lighting applications.

15‐3: A High Image‐Quality OLED Display with Integrated Gate Driver using MPRT Enhancement Technology for Large Size Premium TVs

MPRT is one of the most important characteristics to enhance the image quality of the TVs. Despite of the fact that OLED device has fast response time, MPRT characteristics of the OLED display is limited by compensation driving method, frame frequency and resolution of the display panel. We present the high image quality OLED displays with integrated gate driver circuit using MPRT enhancement method for large size premium TVs. Its methods to turn emitting pixels off in advance by giving a black data, and the integrated gate driver designed for normal display, black data insertion, and compensation mode. Moreover, it is possible that adjust of the duty of inserting black data. With these results, we successfully enhanced MPRT characteristics of the 55, 65, and 77 inch UHD OLED panels for high image quality OLED TVs.

23‐4: Channel‐Dimension‐Scalable Oxide Thin‐Film Transistor for High‐Resolution Pixel and Integrated Gate Driver

We developed channel‐dimension‐scalable oxide TFT technology. To provide scalability, AlO sputtered self‐aligned source/drain, shield metal and AlO passivation structures were introduced. High reliability achieved by trap reduction using an undercoat offered display lifetimes of >10 years and gate driver integration. A 352‐ppi printed organic‐light‐emitting diode display demonstrated the technology's practicality.

P‐51: Design of Integrated Gate drivers with Low Temperature Poly‐Silicon Thin Film Transistor

A couple of gate drivers are fabricated with LTPS TFTs in this paper. In order to improve the stabilization of the circuit output, the three TFTs’ structure are utilized in the scan circuit and the method of inserting a TFT is adopted in the emission circuit. Moreover, high temperature operation at 85 °C within 240 hours and low temperature operation at −40 °C within 240 hours without failure show the useful stabilization of the proposed circuits. Finally, a 5.5‐in. QHD OLED panel on substrate was successfully demonstrated with the gate driver circuits.

P‐17: IGZO TFT Gate Driver with Independent both Bootstrapping and Control Units for AMOLED Mobile Display

An IGZO TFTs integrated gate driver with an independent bootstrapping structure and an independent control unit is proposed for AMOLED display. The driver can output both programmable multi‐pulse scan signals and normally‐high‐voltage emission control signals. Compared with the traditional bootstrapping node structure with a long rising time of 1.06 µs, and the diode‐connected bootstrapping node structure with a long falling time of 1.60 µs, the proposed driver has a short and symmetric rising and falling time of about 0.64 µs. Cascaded simulation results show that the driver may be applicable to 5.5‐in full HD AMOLED panel.

15‐2: Distinguished Paper: Integrated Gate Driver Circuit Technology with IGZO TFT for Sensing Operation

In this paper, we propose a new integrated gate driver circuit for sensing operation of external compensated OLED display using IGZO TFT. Using these technologies, we successfully launched 55‐inch and 65‐inch ultra‐high‐definition OLED TVs.

Bi-Direction Transmissible Gate Driver on Array

In recent years, gate driver using amorphous silicon (a-Si) technology for the TFT-LCD has become the main stream due to the mature manufacturing, low-cost processing, and elimination of the gate driver ICs. However, it’s still three challenges of design the integrated gate driver by a-Si encounters which are the low field-effect mobility, low reliability issue under high voltage stress, and the lack of P-type transistor.

Integrated gate driver circuit technology with IGZO TFT for sensing operation

AbstractIn this paper, we propose a new integrated gate driver circuit for random sensing operation of external compensated organic light‐emitting diode (OLED) display using oxide thin‐film transistor (TFT). Using this technology, we successfully launched 55‐inch and 65‐inch ultrahigh definition OLED TVs with gate in panel (GIP) circuit. The structure of the existing OLED TVs implemented gate signals through the gate integrated circuits (ICs) attached to the left and right sides of the panel. The structure using the gate IC was inferior to the panel structure using the GIP in terms of process and product design and cost. Thus, we propose a new oxide GIP circuit for OLED TV. Like the previous gate IC model, the proposed GIP circuit successfully implemented the random sensing function during the display operation. This GIP circuit is also designed to overcome the problems caused by the negative Vth characteristics of the oxide device.

Monolithic GaN Half-Bridge Stages With Integrated Gate Drivers for High Temperature DC-DC Buck Converters

This paper presents a GaN based synchronous buck DC-DC converter, which monolithically integrates gate drivers and a half-bridge power stage in a 3-μm enhancement-mode (E-mode) GaN-on-Si process. The fabricated synchronous converter with integrated gate drivers is based on E-mode GaN MIS-HFETs (metal-insulator-semiconductor heterojunction-field-effect-transistors), which have a large gate swing of 10 V due to the insertion of 20 nm high-k gate insulator Al 2 O 3 . At 100 kHz, the proposed DC-DC integrated circuits (ICs) exhibit good thermal stability at high temperatures up to 250 °C for 25 V down conversion. Furthermore, four different designs (asynchronous and synchronous) including converters with external drivers were systematically evaluated at different input voltages and duty cycles, the GaN-based DC-DC converters with integrated gate drivers exhibit small voltage overshoots and oscillations due to reduced parasitic inductance and chip size. These results validate the advantages of monolithic, lateral integration of half-bridge GaN ICs with gate drivers for high temperature power converters.

Fault-Tolerant Architecture for Reliable Integrated Gate Drivers

This paper proposes fault-tolerant (FT) architecture for integrated gate drivers. It can automatically detect faults in the gate driver caused by external physical stress and then immediately repair them as well. As a result, it can contribute to highly reliable display products. The proposed architecture uses redundant circuit structure with fault detection circuit. The detailed algorithm for the proposed method is presented in this paper. Simulation and measurement results verify that the proposed circuit and its driving algorithm operates successfully. Finally, the display system architecture is also suggested for realization of our FT method.

Ultra-High-Image-Density, Large-Size Organic Light-Emitting Device Panels Based on Highly Reliable Gate Driver Circuits Integrated by Using InGaZnO Thin-Film Transistors

Large-size, organic light-emitting device (OLED) panels based on highly reliable gate driver circuits integrated using InGaZnO thin-film transistors (TFTs) were fabricated to achieve ultra-high image density (UHD). These large-size OLED panels were driven by using a novel gate driver circuit not only for displaying images but also for sensing TFT characteristics for external compensation. Regardless of the negative threshold voltage of the TFTs, the proposed gate driver circuit in OLED panels functioned precisely, resulting from a decrease in the leakage current. The falling time of the circuit is approximately $1.6~{{\mu }}\text{s}$ , which is fast enough to drive UHD OLED displays at 120 Hz. 120 Hz is most commonly used as the operating voltage because images consisting of 12 frames per second can be quickly shown on the display panel without any image sticking. The reliability tests showed that the lifetime of the proposed integrated gate driver is at least $1 \times 10^{5}$ h.

Automatic Fault Detection Circuit for Integrated Gate Drivers of Active-Matrix Displays

This paper presents automatic fault detection circuit for integrated gate drivers. The proposed circuit consists of one capacitor and two TFTs per scan line. The circuit can detect three types of faults, such as line disconnection (LD), low voltage stuck (LVS), and high voltage stuck (HVS) for the gate driver due to external physical stress. Simulation results showed the proposed circuit operates well. In order to verify the circuit operation, it was fabricated with indium gallium zinc oxide thin film transistors process. The measurement results also verified that our proposed fault detection circuit could detect the types and locations of the LD and LVS of the gate driver successfully. However, we found that HVS can be detected, but further study is needed to accurately detect the position of HVS in the proposed circuit.

Integrated Gate Drivers Based on High-Voltage Energy Storing for GaN Transistors

This paper presents a fully integrated gate driver in a 180-nm bipolar CMOS DMOS (BCD) technology with 1.5-A max. gate current, suitable for normally OFF gallium nitride (GaN) power switches, including gate-injection transistors (GIT). Full-bridge driver architecture provides a bipolar and three-level gate drive voltage for a robust and efficient GaN switching. The concept of high-voltage energy storing (HVES), which comprises an on-chip resonant LC tank, enables a very area-efficient buffer capacitor integration and superior gate-driving speed. It reduces the component count and the influence of parasitic gate-loop inductance. Theory and calculations confirm the benefits of HVES compared to other capacitor implementation methods. The proposed gate driver delivers a gate charge of up to 11.6 nC, sufficient to drive most types of currently available GaN power transistors. Consequently, HVES enables to utilize the fast switching capabilities of GaN for advanced and compact power electronics.

Experimental comparison of SiC GTO and ETO for pulse power applications * * Project supported by the National Natural Science Foundation of China (No. 51577054) and the Science and Technology Major Project of Hunan Province (No. 2017GK1020).

Silicon carbide (SiC) emitter turn-off thyristors (ETOs) are very promising high power capacity semiconductor devices for high voltage and high power density power systems and pulse power applications. However, reports on comparison of high voltage SiC GTOs and ETOs in pulse power applications have been rare. In this paper, a comprehensive study on a 6.5 kV SiC GTO and ETO are carried out to demonstrate the superior performance of the SiC ETO over the GTO in pulse power application. A 6.5 kV SiC ETO was designed and tested with a printed circuit board (PCB) integrated gate driver. The forward conduction characteristics of the SiC ETO and GTO in elevated temperatures are measured and compared, showing the excellent temperature coefficient of the SiC ETO's output characteristics. Their turn-off characteristics with resistive load are measured and compared, demonstrating that the SiC ETO has much faster switching speed and smaller turn-off loss. Experimental results demonstrate that the SiC ETO has a better performance, especially with respect to its switching characteristics, making it a very competitive candidate for high power and pulse power applications.

High-Resolution Flexible AMOLED Display Integrating Gate Driver by Metal–Oxide TFTs

This letter proposes a high-resolution [200 (RGB) * 600, 282 PPI) flexible active matrix organic light emitting display (AMOLED) integrating a new gate driver, of which the substrate is a polyimide material. Flexible In–Zn–O thin-film transistors (TFTs) with back channel etched structure reveal a good stability at different curvature radii. The integrated gate driver employing bi-side driving method consists of seven TFTs and two capacitors with the advantages of simple topology, low power, full-swing output, and small area. The conventional 2T1C pixel circuit with top emission structure is applied to the proposed flexible AMOLED panel. And the flexible panel has a good full-color display quality without obvious defects at the bending condition. It is shown that the output signals of the proposed gate driver have no distortion and good noise suppressed characteristics even up to 600 stages and maintain stable under a long-time continuous operation up to 15 days.

28‐2: A Novel OLED Display Panel with High‐Reliability Integrated Gate Driver Circuit using IGZO TFTs for Large‐Sized UHD TVs

We present a novel OLED display panel with high‐reliability integrated gate driver circuit using IGZO TFTs. Our gate driver circuit can drive a large‐sized OLED display not only for displaying images but also for sensing TFT characteristics for external compensation. It functions correctly even when the threshold voltage of TFTs is negative by reducing leakage currents. We have achieved a life time longer than 60,000 hours in a reliability test and successfully applied it to 55‐inch UHD, 65‐inch UHD and 55‐inch FHD OLED displays, which improves cost‐competitiveness of OLED displays against LCDs.

P‐48: Integrated a‐IGZO TFT Gate Driver with Programmable Output for AMOLED Display

An a‐IGZO TFTs integrated gate driver with programmable output waveform for AMOLED display is proposed by shared input shift registers and output stages of multiple clock‐follower structure. The driver provides not only multiple scan and control signals for internal compensation, but also extended scan pulses for external compensation.

Monolithically integrated power circuits in high‐voltage GaN‐on‐Si heterojunction technology

This study presents monolithically integrated power circuits, fabricated in a high-voltage GaN-on-Si heterojunction technology. Different advanced concepts are presented and compared with solutions found in the literature. High switching transition slew rates are demonstrated by means of a monolithic power circuit with integrated gate driver. A highly linear temperature sensor is integrated in a GaN-high-electron-mobility transistor (HEMT) power device for the 600 V class and on-state resistance of 53 mΩ. An area-efficient HEMT structure with integrated freewheeling diodes is presented. This structure is applied in a monolithic multilevel converter chip, as well as in a 600 V class half-bridge chip. The multilevel chip is integrated by an advanced printed circuit board embedding technology and tested in inverter operation with a mains voltage output of 120 V RMS . The performance of the half-bridge is demonstrated in a synchronous buck converter operation from 400 to 200 V and with a switching frequency of 3 MHz.

1.3: An Evaluation Method of TFT Integrated Gate Driver for UHD Display

Reliability issues of TFT integrated gate driver are still of great concern for large size (i.e. TV) display applications, especially for a-Si:H TFT integrated panels with stressing test of high temperature and high humidity (HTHHO). In this paper, current detection method is proposed for gate driver failure identification. Measurements of 55-inch UHD TV (4K) panel with integrated gate driver are carried out. It is found that gate driver failure after HTHHO are strongly associates with via-hole open of clock bus-lines. It is demonstrated that current through clock lines will be increased with prolonged falling edge due to multi-pulses of gate driver outputs. And clock bus-line open is caused by oxygen of Cu after long operating time during the stressing test.

Poly-Si TFTs integrated gate driver circuit with charge-sharing structure**Project supported by the Science and Technology Project of Hunan Province, China (No. 2015JC3401)

A p-type low-temperature poly-Si thin film transistors (LTPS TFTs) integrated gate driver using 2 non-overlapped clocks is proposed. This gate driver features charge-sharing structure to turn off buffer TFT and suppresses voltage feed-through effects. It is analyzed that the conventional gate driver suffers from waveform distortions due to voltage uncertainty of internal nodes for the initial period. The proposed charge-sharing structure also helps to suppress the unexpected pulses during the initialization phases. The proposed gate driver shows a simple circuit, as only 6 TFTs and 1 capacitor are used for single-stage, and the buffer TFT is used for both pulling-down and pulling-up of output electrode. Feasibility of the proposed gate driver is proven through detailed analyses. Investigations show that voltage bootrapping can be maintained once the bootrapping capacitance is larger than 0.8 pF, and pulse of gate driver outputs can be reduced to 5 μs. The proposed gate driver can still function properly with positive shift within 0.4 V and negative shift within −1.2 V and it is robust and promising for high-resolution display.