Insulating Buffer Layer Research Articles

Silicon germanium photo-blocking layers for a-IGZO based industrial display

Amorphous indium- gallium-zinc oxide (a-IGZO) has been intensively studied for the application to active matrix flat-panel display because of its superior electrical and optical properties. However, the characteristics of a-IGZO were found to be very sensitive to external circumstance such as light illumination, which dramatically degrades the device performance and stability practically required for display applications. Here, we suggest the use for silicon-germanium (Si-Ge) films grown plasma-enhanced chemical vapour deposition (PECVD) as photo-blocking layers in the a-IGZO thin film transistors (TFTs). The charge mobility and threshold voltage (Vth) of the TFTs depend on the thickness of the Si-Ge films and dielectric buffer layers (SiNX), which were carefully optimized to be ~200 nm and ~300 nm, respectively. As a result, even after 1,000 s illumination time, the Vth and electron mobility of the TFTs remain unchanged, which was enabled by the photo-blocking effect of the Si-Ge layers for a-IGZO films. Considering the simple fabrication process by PECVD with outstanding scalability, we expect that this method can be widely applied to TFT devices that are sensitive to light illumination.

Electrical properties of Pb[Zr0.35Ti0.65]O3 on PEALD Al2O3 for NVM applications

PurposeDevelopment of (1T-type) ferroelectric random access memory (FeRAM) has most actively progressed since 1995 and motivated by the physical limits and technological drawbacks of the flash memory. 1T-type FeRAM implements ferroelectric layer at the field effect transistor (FET) gate. During the course of the investigation, it was very difficult to form a thermodynamically stable ferroelectric-semiconductor interface at the FET gate, leading to the introduction of one insulating buffer layer between the ferroelectric and the silicon substrate to overcome this problem. In this study, Al2O3 a high-k buffer layer deposited by plasma enhanced atomic layer deposition (PEALD) is sandwiched between the ferroelectric layer and silicon substrate.Design/methodology/approachFerroelectric/high-k gate stack were fabricated on the silicon substrate and pt electrode. Structural characteristics of the ferroelectric (PZT) and high-k (Al2O3) thin film deposited by RF sputtering and PEALD, respectively, were optimized and investigated for different process parameters. Metal/PZT/Metal, Metal/PZT/Silicon, Metal/PZT/Al2O3/Silicon structures were fabricated and electrically characterized to obtain the memory window, leakage current, hysteresis, PUND, endurance and breakdown characteristics.FindingsXRD pattern shows the ferroelectric perovskite thin Pb[Zr0.35Ti0.65]O3 film with (101) tetragonal orientation deposited by sputtering and PEALD Al2O3 with (312) orientation showing amorphous nature. Multiple angle analysis shows that the refractive index of PZT varies from 2.248 to 2.569, and PEALD Al2O3 varies from 1.6560 to 1.6957 with post-deposition annealing temperature. Increase in memory window from 2.3 to 8.4 V for the Metal-Ferroelectric-Silicon (MFS) and Metal-Ferroelectric-Insulator-Semiconductor (MFIS) structure has been observed at the annealing temperature of 500°C. MFIS structure with 10 nm buffer layer shows excellent endurance of 3 × 109 read-write cycles and the breakdown voltage of 33 V.Originality/valueThis paper shows the feature, principle and improvement in the electrical properties of the fabricated gate stack for 1T-type nonvolatile FeFET. The insulating buffer layer sandwiched between ferroelectric and silicon substrate acts as a barrier to ferroelectric–silicon interdiffusion improves the leakage current, memory window, endurance and breakdown voltage. This is perhaps the first time that the combination of sputtered PZT on the PEALD Al2O3 layer is being reported.

Graphene-based hybrid plasmonic waveguide for highly efficient broadband mid-infrared propagation and modulation.

In this paper, a graphene-based hybrid plasmonic waveguide is proposed for highly efficient broadband surface plasmon polariton (SPP) propagation and modulation at mid-infrared (mid-IR) spectrum. The hybrid plasmonic waveguide is composed of a monolayer graphene sheet in the center, a polysilicon gating layer, and two inner dielectric buffer layers and two outer parabolic-ridged silicon substrates symmetrically placed on both sides of the graphene. Owing to the unique parabolic-ridged waveguide structure, the light-graphene interaction and subwavelength SPPs confinement of the fundamental SPP mode for the hybrid waveguide can be significantly increased. Under the graphene chemical potential of 1.0 eV, the proposed waveguide can achieve outstanding SPP propagation performance with long propagation length of 12.1-16.7 μm and small normalized mode area of ~10-4 in the frequency range of 10-20 THz, exhibiting more than one order smaller in the normalized mode area while remaining the propagation length almost the same level with respect to the hybrid plasmonic waveguide without parabolic ridges. By tuning the graphene chemical potential from 0.1 to 1.0 eV, we demonstrate the waveguide has a modulation depth greater than 51% for the frequency ranging from 10 to 20 THz and reaches a maximum of nearly 100% at the frequency higher than 18 THz. Benefitting from the excellent broadband mid-IR propagation and modulation performance, the graphene-based hybrid plasmonic waveguide may open up a new way for various mid-IR waveguides, modulators, interconnects and optoelectronic devices.

Stress evolution of Ge nanocrystals in dielectric matrices

Germanium nanocrystals (Ge NCs) embedded in single and multilayer silicon oxide and silicon nitride matrices have been synthesized using plasma enhanced chemical vapor deposition followed by conventional furnace annealing or rapid thermal processing in N2 ambient. Compositions of the films were determined by Rutherford backscattering spectrometry and x-ray photoelectron spectroscopy. The formation of NCs under suitable process conditions was observed with high resolution transmission electron microscope micrographs and Raman spectroscopy. Stress measurements were done using Raman shifts of the Ge optical phonon line at 300.7 cm−1. The effect of the embedding matrix and annealing methods on Ge NC formation were investigated. In addition to Ge NCs in single layer samples, the stress on Ge NCs in multilayer samples was also analyzed. Multilayers of Ge NCs in a silicon nitride matrix separated by dielectric buffer layers to control the size and density of NCs were fabricated. Multilayers consisted of SiNy:Ge ultrathin films sandwiched between either SiO2 or Si3N4 by the proper choice of buffer material. We demonstrated that it is possible to tune the stress state of Ge NCs from compressive to tensile, a desirable property for optoelectronic applications. We also observed that there is a correlation between the stress and the crystallization threshold in which the compressive stress enhances the crystallization, while the tensile stress suppresses the process.

Growth of high-quality Bi2Se3 topological insulators using (Bi1-xInx)2Se3 buffer layers

In this article, the authors first report on the optimum growth parameters for (Bi1-xInx)2Se3 alloys of arbitrary composition using molecular beam epitaxy. It is found that smooth, single-phase films can only be obtained by using a sequential growth and annealing method to seed the film, after which normal codeposition growth can be used. The topological insulator Bi2Se3 is then grown on top of various (Bi1-xInx)2Se3 buffers and the electrical properties measured. For Bi2Se3 films grown on high-quality buffer layers, the mobility is greatly enhanced and the carrier density reduced compared to growth directly on sapphire substrates, indicating a significant improvement in film quality. The use of an almost lattice-matched trivially insulating buffer layer is therefore crucial to the growth of high-quality topological insulators on arbitrary substrates.

Structures and properties of buffer layers with nanometer thickness for PBCMO/YBCO epitaxial multilayers

Insulator buffer layer materials, PrBa2(Cu1-xMx)3O7-δ (PBCMO), with M = Al and Ga with different portions were synthesized to improve better buffer-layer materials for fabricating superconducting devices from YBa2Cu3O7-δ (YBCO) superconductor. Neutron and X-ray diffraction data reveal that the structures of PBCMO and YBCO are the same and their lattice parameters are well matched, while the resistivity shows that PBCMO have much higher resistivity than PrBa2Cu3O7 (PBCO). Epitaxial multilayers of PBCMO/YBCO were fabricated by laser ablation to explore the effect of PBCMO layer thickness on YBCO superconducting layers. Superconductivity was not found above 4.2 K for one unit cell thickness of YBCO. As the thickness of PBCMO was varied with constant thickness of YBCO films, the transition temperature of the multilayers remains unchanged even though the PBCMO layer is made as thin as the unit cell of 12.5Å. The difference indicates that PBCMO is better buffer layer and is adequate to insulate YBCO films in the multilayers and to cut off the superconducting coupling between YBCO layers.

An approach to enhance memory retention capacity in MFIS structures using different insulating buffer layer

ABSTRACTWe present a comparative study on the investigation of memory hysteresis and leakage current characteristics of the MFIS structure with Lead-Zirconate-Titanate (100 nm) and different insulating layers of thickness 5 nm. Effect of introducing buffer layer grown/deposited by different technique and processed under different conditions has been observed. For SiO2, Si3N4 and HfO2 layers, the memory window reduces from 6.5 to 4 V at the annealing temperature of 500°C. XRD data indicates phase change in deposited PZT film from tetrahedral to rhombohedral. Multiple angle ellipsometry indicates an increase in refractive index of the deposited HfO2 and PZT films with annealing temperature.

Suppression of interfacial layer in high-K gate stack with crystalline high-K dielectric and AlN buffer layer structure

The gate stack composed of a crystalline ZrO2 high-K dielectric and an AlN buffer layer treated with the remote NH3 plasma was proposed and developed. The AlN buffer layer was introduced between the crystalline ZrO2 and the Si substrate to suppress the low-K silicate interfacial layer, leading to a reduction in CET. The Jg was also suppressed by the AlN buffer layer by three orders of magnitude. In addition, the decrease of Dit could be accomplished because of the hydrogen passivation from the remote NH3 plasma used for the AlN deposition. Moreover, the remote NH3 plasma treatment on the AlN buffer layer further reduces the CET, Dit, and Jg due to deactivation of the nitrogen vacancies. Accordingly, a low CET (in accumulation region) of 1.21 nm, Dit (at mid gap) of 5.32 × 1011 cm−2 eV−1, and Jg (at flatband voltage-1V) of 1.09 × 10−5 A/cm2 were achieved in the crystalline ZrO2/AlN buffer gate stack treated with the remote NH3 plasma. The result indicated that the crystalline high-K dielectrics/AlN buffer layer is a promising gate stack to improve the sub-nanometer CET scaling.

First-Principles Study on LiCoO2/Sulfide Interfaces in All-Solid-State Li-Ion Battery: Space–Charge Layer and Interfacial Co Mixing

All-solid-state Li-ion batteries (ASS-LIBs), which contain inorganic solids as the electrolytes, have good properties such as high energy density, shelf life, and long cycle life. Recently, sulfide-based electrolytes attract considerable attention because some sulfide materials indicate high Li-ion conductivities, which have become comparable to those of organic-liquid electrolytes. However, large interfacial resistance is usually observed if we combine sulfide electrolytes and oxide cathode. [1,2] Rate-determining factor exists at the cathode/sulfide interfaces. In addition, the interfacial resistance is reduced dramatically by interposing an insulating buffer layer (LiNbO3 [3] or Li4Ti5O12[4]) to the interfaces. Therefore, microscopic investigations at the cathode/sulfide interfaces provide useful aspects to reduce the interfacial resistance and to design the components of ASS-LIBs. In this study, we focused on the effects of Li-ion space–charge layer (SCL) and transition metal leakage [5,6] because they are considered as the main origin of the interfacial resistance.Interfaces between oxide cathode, buffer layer, and sulfide electrolyte have been treated by first-principles calculations. LiCoO2 (LCO), β-Li3PS4 (LPS), and LiNbO3 (LNO) are selected as the interface components, because they are typical materials for cathode, sulfide electrolyte, and buffer layer, respectively. We have conducted first-principles calculation and obtained the stable structures and the electronic states. In addition, we calculated Li chemical potentials based on Li-vacancy formation energies at these interfaces. The values indicate that Li-depleted layer (i.e. SCL) grows at the beginning of the charge process, and the interposition of the buffer layer suppresses the depletion. [7] Furthermore, we have evaluated the possibilities of Co diffusion by comparing exchange energies of Co and other cationic elements. The results show preferential Co and P mixing at the LCO/LPS interface, and the LNO interposition can suppress these mixing, which is consistent with previous experiments [5,6]. These understanding of the microscopic properties will contribute to the reduction of interfacial resistance. [1] K. Takada, Acta Mater., 61, 759 (2013). [2] K. Takada, N. Ohta, L. Zhang, X. Xu, B. T. Hang, T. Ohnishi, M. Osada, T. Sasaki, Solid State Ionics, 225, 594 (2012). [3] N. Ohta, K. Takada, L. Zhang, R. Ma, M. Osada, T. Sasaki, Adv. Mater., 18, 2226 (2006). [4] N. Ohta, K. Takada, I. Sakaguchi, L. Zhang, R. Ma, K. Fukuda, M. Osada, T. Sasaki, Electrochem. Commun., 9, 1486 (2007). [5] A. Sakuda, A. Hayashi, M. Tatsumisago, Chem. Mater., 22, 949 (2010); T. Ohtomo, A. Hayashi, M. Tatsumisago, Y. Tsuchida, S. Hama, K. Kawamoto, J. Power Sources, 233, 231 (2013). [6] J. H. Woo, J. E. Trevey, A. S. Cavanagh, Y. S. Choi, S. C. Kim, S. M. George, K. H. Oh, S.-H. Lee J. Electrochem. Soc., 159, A1120 (2012). [7] J. Haruyama, K. Sodeyama, L. Han, K. Takada, Y. Tateyama, Chem. Mater., 26, 4248 (2014).

Dynamic tuning of mid-infrared plasmons in graphene–buffer–SiO_2–Si nanostructures

Dynamic tuning of the plasmonic properties of graphene-based multilayer nanostructures provides a promising platform for the development of novel optoelectronic devices. In this paper, we numerically demonstrate that inserting an ultrathin dielectric buffer layer between monolayer graphene and a SiO2/Si substrate can result in highly tunable and confined low-loss mid-infrared surface plasmons. The characteristics of surface plasmons in the proposed device can be effectively controlled by changing the permittivity and thickness of the buffer layer, operation frequency, and chemical potential of graphene. In particular, we show that using nanometric buffer materials with dielectric constants lower than that of SiO2 can lead to a low propagation loss with better performance. In contrast, utilizing nanometric buffer materials with dielectric constants higher than that of SiO2 reduce the guided wavelength, resulting in a strong optical confinement. Moreover, increasing the operation frequency (chemical potential) leads to an increase (decrease) in propagation loss in the proposed structure.

Influence of Plasma Polymerized Dielectric Buffer Layer and Gold Film on the Excitation of Long-Range Surface Plasmon Resonance

Recently, long-range surface plasmon resonance (LRSPR) sensor has attracted a great deal of attention as a potentially non-destructive and label-free technique for cellular studies in real time. Thus, much effort has been placed on the fabrication and optimization of multilayered structure required for the excitation of LRSPR. In this work, a detailed study about the influence of both plasma polymerized dielectric buffer layer (DBL) and thin gold film on the excitation of LRSPR was performed. The DBLs of different thicknesses were deposited directly onto SF11 glass slides by radio frequency plasma polymerization (pp) of perfluorooctyl ethylene (PFOE). Thereafter, Au films of different thicknesses were thermally evaporated onto the ppPFOE layers. Atomic force microscopy (AFM) results suggest that the resulting SF11/ppPFOE/Au structure has a smooth surface regardless of Au film’s thickness. LRSPR measurements indicate that the excitation of LRSPR relies not only on the thickness of the ppPFOE buffer layer, but also on the thickness and optical property of thin Au film. Theoretical simulation based on Fresnel’s equation allows for the determination of both the thickness and optical constant of each layer supporting the LRSPR, and also enables us to predict the optimum combination of ppPFOE and Au film in a LRSPR sensor. The performance of various LRSPR sensors to monitor the bulk refractive index variation has also been investigated.

Improved nonlinear slot waveguides using dielectric buffer layers: properties of TM waves.

We propose an improved version of the symmetric metal slot waveguides with a Kerr-type nonlinear dielectric core adding linear dielectric buffer layers between the metal regions and the core. Using a finite element method to compute the stationary nonlinear modes, we provide the full phase diagrams of its main transverse magnetic modes as a function of the total power, buffer layer, and core thicknesses that are more complex than the ones of the simple nonlinear metal slot. We show that these modes can exhibit spatial transitions toward specific modes of the new structure as a function of power. We also demonstrate that, for the main modes, the losses are reduced compared to the previous structures, and that they can now decrease with power. Finally, we describe the stability properties of the main stationary solutions using nonlinear FDTD simulations.

Low-Loss Fiber-Optic Polarizers

We calculate the characteristics (the extinction and loss coefficients) of a fiber-optic polarizer with a metal film and a dielectric buffer layer. It is shown that using the metals, in which the real part of the complex refractive index is much smaller than unity (e.g., silver, gold, and copper), in such polarizers makes it possible to significantly reduce the loss for the fundamental transmitted TE0 mode compared with the aluminum-film polarizers. In this case, a sufficiently high extinction coefficient is preserved.

Modeling and simulation of ionizing radiation effect on ferroelectric field-effect transistor

A theoretical model is developed to investigate the ionizing radiation effect on electrical characteristics of a metal–ferroelectric–insulator–semiconductor structure ferroelectric gate field-effect transistor (MFIS FeFET). Modeling results show that gate capacitance versus gate voltage curves and transfer characteristic curves shift significantly and the memory window becomes worse with the total dose. Moreover, the drain current and ION/IOFF ratio exhibit a considerable decrease under high incident dose rates. Finally, it is found that radiation-induced degradations can be affected strongly by the insulator layer thickness, and that MFIS FeFETs with a thin insulator buffer layer show a high radiation tolerance.

Low-temperature sol–gel processed AlOx gate dielectric buffer layer for improved performance in pentacene-based OFETs

An approach to achieve improved performance in pentacene-based organic field effect transistors (OFETs) using high-k AlOx prepared by a low temperature sol–gel technique as a thin buffer layer on a SiO2 gate dielectric was demonstrated.

Improvement of properties of an ambipolar organic field-effect transistor by using a singlet biradicaloid film

We have improved the properties of ambipolar organic field-effect transistors by chemically treating the source and drain electrodes with a vacuum-deposited biradicaloid film. Biradicaloid was a diphenyl derivative of s-indacenodiphenalene (Ph2-IDPL). An alkane thiol self-assembled monolayer (SAM) was used as an insulator buffer layer at the Ph2-IDPL/electrode interface to prevent off-current. We confirmed the transport level alignment at the Ph2-IDPL/SAM/electrode interface by ultraviolet photoemission spectroscopy and inverse photoemission spectroscopy. Although Ph2-IDPL transistors containing the SAM showed a higher on/off ratio or mobility than a previously reported device without the buffer layer, there was a trade-off between on/off ratio and mobility. Our results suggest that biradical molecules are promising candidates for use in low-power inverters.

Fabrication and Electrical Characteristics of P(VDF-TrFE) Films on Si(100) Substrates Using Cyanoethyl Pullulan Buffer Layers

We fabricated a metal-ferroelectric-insulator-semiconductor structure using a poly(vinylidene fluoride trifluorethylene) as a ferroelectric layer and a cyanoethyl pullulan as an insulating buffer layer for the first time. The CEP thin films were deposited on Si substrate by using a sol-gel method. The coated P(VDF-TrFE) films on CEP/Si structure were crystallized. For the Au/P(VDF-TrFE)/CEP/Si structure, the capacitance-voltage characteristics showed hysteresis loops, the memory window width was about 4.6V at a bias sweep range of ±5V. The leakage current density was about 5.5 × 10−7 A/cm2 at 5V for the thick film from the 5 wt% solution.

Multilevel metal/Pb(Zr0.52Ti0.48)O3/TiOxNy/Si for next generation FeRAM technology node

Metal–Ferroelectric–Insulator–Semiconductor (MFIS) thin film capacitors with lead zirconate titanate (Pb(Zr0.52Ti0.48)O3) as ferroelectric layer and ultrathin high-κ titanium oxynitride (TiOxNy) as insulating buffer layer on p-Si are fabricated by RF magnetron sputtering for non-volatile multilevel ferroelectric random access memory (FeRAM). Micro Raman analysis of the proposed systems confirmed the existence of most stable tetragonal rutile phase in ultrathin TiOxNy and perovskite phase of PZT thin films. AFM analysis showed that surface roughness of ultrathin TiOxNy and thin PZT films are ∼2.54nm and ∼1.85nm, respectively and result the uniform interface between substrate and metal. The maximum C–V memory window of ∼1.25V was obtained at cyclic sweep voltage of ±6V and starts to decrease when the sweep voltage exceeds 6V due to charge injection. The fabricated structure possesses good data retention measured till 1.5h and high, low capacitance states remain distinguishable even if extrapolated to 15years. The proposed system exhibited excellent TiOxNy–Si interface, incomparable high breakdown field strength ∼11.15MV/cm and low leakage current density (J) ∼5μA/cm2 at +4V. Thus, Au/PZT/TiOxNy/Si MFIS based FeRAM devices with multilevel operation, high breakdown field and excellent retention are prospective contender for next generation multilevel FeRAM technology node.

Effect of Ag doping and insulator buffer layer on the memory mechanism of polymer nanocomposites

Resistive memory devices based on nanocomposites have attracted great potential for future applications in electronic and optoelectronic devices. The successful synthesis of aqueous CdSe nanoparticles has been provided with UV–Vis and Photoluminescence spectroscopy. The two terminal planar devices of CdSe nanocomposite have been fabricated. The effect of Ag doping and additional dielectric buffer layers on the memory devices have been studied by current–voltage (I–V) and capacitance–voltage (C–V) measurements. The devices show hysteresis loops in both positive and negative bias directions. The memory window has been found to be increased with both Ag doping and PVA layer addition. The charge carrier transport mechanism in the memory devices has been studied by fitting the I–V characteristics with the theoretical model, Space charge conduction model (SCLC). C–V hysteresis loop in both positive and negative bias directions indicate that both the electrons and holes are responsible for memory mechanism of the devices. The switching mechanism of the memory devices has been explained by charge trapping/detrapping model. The retention characteristics show good stability and reliability of the devices.

Long-range surface plasmon resonance sensors fabricated with plasma polymerized fluorocarbon thin films

A rapid and simple approach to prepare the dielectric buffer layers is of crucial importance for the development of long-range surface plasmon resonance (LRSPR) sensors. In this regard, we describe for the first time the use of plasma polymerized fluorocarbon thin films as the dielectric buffer layers for the construction of LRSPR sensors. The fluorocarbon films were achieved by radio frequency plasma polymerization of perfluorooctyl ethylene (PFOE) at continuous wave mode with an input power of 60 Watts. The resulting ppPFOE exhibited good adhesion with both the glass substrate and the gold superstrate, and also remained relatively stable in aqueous solutions as seen by optical waveguide spectroscopy (OWS). The obtained LRSPR sensor consisting of a SF11-ppPFOE-Au structure was employed for the detection of both the bulk refractive index variation and the protein adsorption.