InP Double Heterojunction Bipolar Transistor Research Articles

A 16.9 dBm InP DHBT W-band power amplifier with more than 20 dB gain

A two-stage MMIC power amplifier has been realized by use of a 1-μm InP double heterojunction bipolar transistor (DHBT). The cascode structure, low-loss matching networks, and low-parasite cell units enhance the power gain. The optimum load impedance is determined from load-pull simulation. A coplanar waveguide transmission line is adopted for its ease of fabrication. The chip size is 1.5 × 1.7 mm2 with the emitter area of 16 × 1 μm × 15 μm in the output stage. Measurements show that small signal gain is more than 20 dB over 75.5–84.5 GHz and the saturated power is 16.9 dBm @ 79 GHz with gain of 15.2 dB. The high power gain makes it very suitable for medium power amplification.

Millimeter‐wave INP DHBT power amplifier based on power‐optimized cascode configuration

AbstractThis letter describes the use of a power‐optimized cascode configuration for obtaining maximum output power at millimeter‐wave (mm‐wave) frequencies for a two‐way combined power amplifier (PA). The PA has been fabricated in a high‐speed InP double heterojunction bipolar transistor technology and has a total active emitter area of 68.4 μm2. The experimental results demonstrate a small signal gain of 9.8 dB and saturated output power of more than 18.6 dBm at 72 GHz with a peak power‐added efficiency of 12%. The benefits of the power optimized cascode configuration over the standard cascode configuration at mm‐wave frequencies are confirmed by both simulations and experimental results. © 2013 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:1178–1182, 2013; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.27477

70 GSa/s and 51 GHz bandwidth track‐and‐hold amplifier in InP DHBT process

A differential 70 GSa/s track-and-hold amplifier has been designed and fabricated in a 320 GHz-f T InP double heterojunction bipolar transistor process. Measurements show a 51 GHz small-signal bandwidth with an S 11 parameter lower than -15 dB up to 56 GHz. The transient operation is verified up to 70 GSa/s. 60 GSa/s spectral measurements give total harmonic distortion ←46 dB up to 7 GHz and ←37 dB over the whole measurement range.

A 38 TO 44 GHZ SUB-HARMONIC BALANCED HBT MIXER WITH INTEGRATED MINIATURE SPIRAL TYPE MARCHAND BALUN

This work presents an active balanced sub-harmonic mixer (SHM) using InP double heterojunction bipolar transistor technology (DHBT) for Q-band applications. A miniature spiral type Marchand balun with five added capacitances for improved control of amplitude and phase balance is integrated with the SHM. The measured results for the SHM demonstrates a conversion gain of 1.2 dB at an RF frequency of 41 GHz with an associated LO power of 5 dBm. The conversion loss remains better than 3 dB from 38 to 44 GHz. The LO to IF isolation is better than 42 dB within the bandwidth of the mixer and confirms the excellent balance of the integrated spiral type Marchand balun. The DC power consumption of the SHM is only 22.5mW under normal mixer operation.

Stability investigation for InP DHBT mm-wave power amplifier

In this article, we discuss stability issues for mm-wave monolithic integrated power amplifiers using InP double heterojunction bipolar transistor (DHBT) technology targeting E-band applications at 71–76 GHz and 81–86 GHz. Different stability detection methods based on the classical two-port K-Δs pair, linear three-port graphical analysis, system identifications, circuit modal analysis, and normalized determinant function are all reviewed. The corresponding techniques are employed to predict the occurrence of instability at 15 GHz observed during measurements on a fabricated monolithic microwave integrated circuit power amplifier. Experimental results from a redesigned power amplifier with improved stability are presented to confirm that the previously detected oscillation loop is removed using odd-mode stabilization resistors with the correct choice of values and locations. © 2012 Wiley Periodicals, Inc. Int J RF and Microwave CAE 23: 662–674, 2013.

Future Device Modeling Trends

Good transistor models are essential for efficient computer-aided-design (CAD) of nonlinear microwave and RF circuits, monolithic microwave integrated circuits (MMICs), power amplifiers (PAs), and nonlinear RF systems. Increasingly complicated demands of the various semiconductor technologies (e.g., GaAs pHEMTs, InP double heterojunction bipolar transistors (DHBTs), silicon on insulator (SOI), LDMOS, GaN HFETs, etc.), and their applications in terms of power and frequency of operation and complexity of applied signals (e.g., modern communication signals with high peak-toaverage ratios) have placed commensurate requirements on the accuracy and generality of the device models used for design. New semiconductor material systems (e.g., GaN) have been developing at such a fast rate that conventional compact modeling approaches may not be able to keep up. These and other challenges have spawned much research into the advanced nonlinear device modeling techniques that are the focus of this article.

InP HBT Transferred to Higher Thermal Conductivity Substrate

We report the first demonstration of an InP double heterojunction bipolar transistor (HBT) transferred to a higher thermal conductivity substrate. This process allows lithographic access to both the frontside and backside of the device to minimize parasitic capacitances while transfer to a SiC substrate should reduce junction temperature by 42%, allowing for higher current density operation. The 0.20 × 3 μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> emitter-area HBT has peak common-emitter current gain β = 22 and breakdown V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BR</sub> , <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CEO</sub> >; 4 V. No electrical degradation from the transferred-substrate process is observed. RF measurements show device peak <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">τ</sub> = 397 GHz, <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> ≥ 400 GHz, and maximum available gain (MAG) at 100 GHz is 15.3 dB.

A Combined Model With Electrothermal Coupling and Electromagnetic Simulation for Microwave Multifinger InP-Based DHBTs

This paper presents a combined model with electrothermal coupling and electromagnetic (EM) simulation for multifinger InP-based double heterojunction bipolar transistors (DHBTs). The electrothermal coupling effect, which occurs in multifinger InP DHBTs, is characterized based on 3-D thermal simulation. In addition, EM simulation technique is presented to account for the distributed effect of interconnection of the fingers and their surroundings. A large-signal model for single-finger DHBTs is implemented as a seven-port symbolically defined device, which accounts for several physical phenomena, including the self-heating effect, Kirk effect, current blocking effect, mobile charge modulation of the base-collector capacitance, and velocity field modulation in the transit time. The combined model implemented in Agilent-ADS is verified by comparing the simulated and measured data in dc small-signal <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</i> -parameters and large-signal microwave power characteristic. This approach allows a simple method to analyze and predict microwave multifinger InP DHBTs for power amplifier circuit design using commonly available computer-aided design tools such as Agilent-ADS.

65 GHz small-signal-bandwidth switched emitter follower in InP heterojunction bipolar transistors

Performances of two switched emitter follower structures for large bandwidth applications have been optimised, compared, implemented and measured. These circuits have been fabricated with a 320 GHz-FT InP double heterojunction bipolar transistor process. Measurements in track mode show a small-signal bandwidth over 65 GHz for one structure and over 50 GHz for the other. Track mode SFDR measured for 500 mVPP up to 15 GHz signal input is greater than 45 dBc.

InP DHBT-Based IC Technology for 100-Gb/s Ethernet

It is now clear that 112-Gb/s data rate is the next step in the network evolution (100-Gb/s Ethernet). Due to its high speed and high breakdown voltage, the InP double-heterojunction bipolar transistor (DHBT) technology is particularly suited for signal processing and high-speed communication systems. This paper summarizes our InP DHBT device and integrated circuit (IC) technology developed for >; 100-Gb/s-class medium scale mixed-signal ICs. Key features and issues important for the growth and manufacturing of InP DHBTs with step-graded collectors are first discussed. The molecular-beam-epitaxy-grown transistors have cut-off frequencies (f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> and f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> ) of over 350 GHz, current gains of ~90, and common-emitter breakdown voltages of >; 4.5 V. Using this technology, we then fabricated and succeeded in 112-Gb/s testing of multiplexers and integrated clock and data recovery/1:2 demultiplexer ICs and modules with very clear eye waveforms. Using the same technology, a distributed amplifier intended for use as a modulator driver exhibited an output voltage swing of ~2 V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">pp</sub> . These building-block ICs combine high-speed operation with high signal quality and enable 112-Gb/s optical fiber transmission.

42 GBd 3-bit power-DAC for optical communications with advanced modulation formats in InP DHBT

A 3-bit power-DAC was designed and fabricated in 0.7 µm InP double-heterojunction bipolar transistor (DHBT) technology. An 8-level differential output signal with 3.6 Vpp amplitude was measured at symbol rates in the range of 40 GBd. The circuit combines DAC and driver functions allowing to directly drive a modulator without need for a linear amplifier. This compact IC solution is suitable for transmitters with advanced modulation formats like 64-QAM operating at high symbol rate.

Differential distributed amplifier with 2:1 selector in InP DHBT for 100 Gbit/s operation

A differential distributed amplifier integrated with a 2:1 selector has been designed and fabricated in a 0.7 ?m InP double hetero-junction bipolar transistor (DHBT) technology. Measurements were performed at 86 and 100 Gbit/s, showing clear output eye opening and a voltage swing of 2 × 2.3 V. The circuit is well suited to dual-drive electro-optical modulators for 100-Gbaud-based optical communications systems.

A symbolically defined InP double heterojunction bipolar transistor large-signal model

A self-built accurate and flexible large-signal model based on an analysis of the characteristics of InP double heterojunction bipolar transistors (DHBTs) is implemented as a seven-port symbolically defined device (SDD) in Agilent ADS. The model accounts for most physical phenomena including the self-heating effect, Kirk effect, soft knee effect, base collector capacitance and collector transit time. The validity and the accuracy of the large-signal model are assessed by comparing the simulation with the measurement of DC, multi-bias small signal S parameters for InP DHBTs.

Simulation of electrical characteristics of InP double-heterojunction bipolar transistors with InGaAsSb base

We study the effect of antimony (Sb) content in the InGaAsSb base layer of InP double-heterojunction bipolar transistors (DHBTs), under the condition of lattice match, by using a two-dimensional device simulator Medici. Careful calibration of physical parameters is first done to ensure that the simulation result matches data measured from a reference device. When the composition of Sb in the InGaAsSb base region is varied, the conduction band offset (Δ E C), effective density of states in conduction band and valence band ( N C, N V), bandgap energy ( E G), and intrinsic carrier concentration ( n i ) are changed accordingly. These semiconductor material parameters are considered in the simulation to compare the electrical characteristics of the DHBT. In addition to the Sb composition, different materials of In 0.52Al 0.48As or InP in the emitter are simulated. The study on Sb content in the base and the heterostructure of E–B junction helps the development and optimization of InGaAsSb DHBTs.

A Physics-Based Charge-Control Model for InP DHBT Including Current-Blocking Effect

We develop a physics-based charge-control InP double heterojunction bipolar transistor model including three important effects: current blocking, mobile-charge modulation of the base-collector capacitance and velocity-field modulation in the transit time. The bias-dependent base-collector depletion charge is obtained analytically, which takes into account the mobile-charge modulation. Then, a measurement based voltage-dependent transit time formulation is implemented. As a result, over a wide range of biases, the developed model shows good agreement between the modeled and measured S-parameters and cutoff frequency. Also, the model considering current blocking effect demonstrates more accurate prediction of the output characteristics than conventional vertical bipolar inter company results.

A physical-model of small-signal InP-based double heterojunction bipolar transistors and its parameter extraction technique

The influence on the base-collector junction capacitance Cbc of the energy band structure of the InP heterojunction bipolar transistors is researched. A physical model of small-signal InP double heterojunction bipolar transistor （DHBT） is developed, which takes into account the base-emitter and collector-emitter metalisations by using two additional capacitances Cmb and Cmc. The resistance of the model is divided into the intrinsic resistance, the extrinsic resistance and the parasitic resistance. Meanwhile, a physically meaningful small-signal parameter extraction procedure for the model is presented, in which all the equivalent circuit elements are extracted without reference to numerical optimization. An experimental validation is carried out, and excellent results are obtained over a wide range of bias points, which demonstrates good modeling accuracy.

InP DHBT selector-driver with 2×2.7 V swing for 100 Gbit/s operation

An integrated selector-driver is designed for 100 Gbit/s operation and fabricated using 0.7 µm InP double-heterojunction bipolar transistor (DHBT) technology. The driver has a lumped architecture and operates in differential mode. Two complementary signals each with 2.7 V amplitude (3.2 Vpp) have been measured at 100 Gbit/s.

ROM-Based Direct Digital Synthesizer at 24 GHz Clock Frequency in InP DHBT Technology

A direct digital synthesizer (DDS) implemented in InP double heterojunction bipolar transistor technology is reported. The DDS has a 12 b phase accumulator and a ROM-based phase converter. The DDS is capable of synthesizing output frequencies up to 12 GHz in steps that are 1/4096 of the 24 GHz clock rate. The worst case measured spurious free dynamic range (SFDR) is 30.7 dBc and the average SFDR over all frequency control words is 40.4 dBc. The DDS test circuit is implemented with 4470 transistors and it consumes 19.8 W of power.

A High Conversion-Gain $Q$-Band InP DHBT Subharmonic Mixer Using LO Frequency Doubler

The paper presents analysis and design of a Q-band subharmonic mixer (SHM) with high conversion gain. The SHM consists of a local oscillator (LO) frequency doubler, RF pre-amplifier, and single-ended mixer. The SHM has been fabricated in a high-speed InP double heterojunction bipolar transistor (DHBT) technology using coplanar waveguide structures. To the best of our knowledge, this is the first demonstration of an SHM using InP DHBT technology at millimeter-wave frequencies. The measured results demonstrate a conversion gain of 10.3 dB at 45 GHz with an LO power of only 1 mW. The fundamental mixing product is suppressed by more than 24 dB and the output is around . The mixer is broadband with a conversion gain above 7 dB from 40 to 50 GHz. The conversion gain for the fabricated SHM is believed to be among the best ever reported for millimeter-wave SHMs.

36-GHz, 16$\times$6-Bit ROM in InP DHBT Technology Suitable for DDS Application

A 16times6-bit read-only memory (ROM), employing an architecture suitable for use as a phase to amplitude converter for direct digital synthesizers (DDS), has been implemented in InP double heterojunction bipolar transistor (DHBT) technology. The ROM uses a -3.8 V power supply and dissipates 1.13 W of power. The ROM is implemented in a test circuit that includes an 8-bit accumulator and a 6-bit digital-to-analog converter (DAC) to facilitate demonstration of high-speed operation. The maximum operating clock frequency is measured to be 36 GHz