Increasing Stress Time Research Articles

Explanation of SILC Probability Density Distributions With Nonuniform Generation of Traps in the Tunnel Oxide of Flash Memory Arrays

In this paper, we develop a detailed physical model to interpret the dependence of the stress induced leakage current (SILC) distributions on the nature and position of the generated defects, and we exploit it to reconsider in detail previously published experimental data on the statistical distribution of the SILC in Flash arrays. We found that a unique symmetrical spatial distribution of traps, which is rapidly decreasing from the Si-SiO2 interfaces toward the center of the oxide, can explain the oxide-thickness and stress-level dependence of the measured SILC distributions. The generation of cooperating defects with increasing stress time is also analyzed and discussed.

Analysis of Thermal Distribution in Low-Temperature Polycrystalline Silicon p-Channel Thin Film Transistors

Degradation by Joule heating is one of the important issues for realizing systems on a panel. We have investigated the thermal distribution of low-temperature polycrystalline silicon (poly-Si) p-channel thin-film transistors (TFTs) using an infrared imaging system. In order to design optimum circuits in which Joule heating is taken into account, a systematic analysis of Joule heating focusing on gate size and bias voltage dependences was performed. Using TFTs with channel lengths of 50 and 6 µm, thermal distributions were compared under linear and saturation regions for drain current. The asymmetrical distribution observed in the 50-µm-channel TFT under the saturation condition was small in the 6-µm-channel TFT. Different distributions were was analyzed using the simulation results obtained with a device simulator. Furthermore, maximum temperature was measured as a function of input power by varying gate and drain voltages. Degradation was also measured using p-channel TFTs with various gate sizes. A negative threshold voltage shift was observed with increasing stress time. It was revealed that the maximum temperature was dominated by the input power independent of bias voltage or gate length and that the main cause of this shift was Joule heating. This result also indicated that we do not have to take the impact ionization caused by the electric field distribution into account.

Interface trap and oxide charge generation under negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin plasma-nitrided SiON gate dielectrics

The interface trap generation (ΔNit) and fixed oxide charge buildup (ΔNot) under negative bias temperature instability (NBTI) of p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) with ultrathin (2 nm) plasma-nitrided SiON gate dielectrics were studied using a modified direct-current–current-voltage method and a conventional subthreshold characteristic measurement. Different stress time dependences were shown for ΔNit and ΔNot. At the earlier stress times, ΔNit dominates the threshold voltage shift (ΔVth) and ΔNot is negligible. With increasing stress time, the rate of increase of ΔNit decreases continuously, showing a saturating trend for longer stress times, while ΔNot still has a power-law dependence on stress time so that the relative contribution of ΔNot increases. The thermal activation energy of ΔNit and the NBTI lifetime of pMOSFETs, compared at a given stress voltage, are independent of the peak nitrogen concentration of the SiON film. This indicates that plasma nitridation is a more reliable method for incorporating nitrogen in the gate oxide.

Variable chlorophyll fluorescence in response to water plus heat stress treatments in three coniferous tree seedlings

Effects of water and heat stress treatments on chlorophyll fluorescence of Chinese fir (Cunninghamia lanceolata), Masson pine (Pinus massoniana) and western redcedar (Thuja plicata D. Don)_seedlings were monitored during a three-cycle stress period. It was shown that ratio of variable to maximal chlorophyll fluorescence (Fv/Fm) of these three species responded differently to water stress treatments. The Fv/Fm ratio of western redcedar decreased dramatically after water stress, while that of Chinese fir had only a slight reduction and that of Masson pine had no significant change. The experiment also showed that the Fv/Fm ratio of all three species differed significantly under heat stress treatments. Concerning three different water plus heat stress cycles, it was found that the Fv/Fm ratios of Chinese fir and Masson pine measured at the end of each water plus heat stress cycle were not significantly different. However, the Fv/Fm ratio of western redcedar was diminished significantly in response to an increase of stress time.

Formation and inhibition of free radicals in electrically stressed and aged insulating polymers

AbstractPrevious work has shown that prebreakdown, electrical aging, and breakdown phenomena are directly associated with charge carriers injected from electrical contacts and their subsequent dissociative trapping and recombination. In addition, the energy released from each trapping or recombination event is dissipated in the breaking of the bonds of macromolecules, thus forming free radicals and new traps in the electrically stressed insulating polymers, as predicted by Kao's model. It is this gradual degradation process that leads to electrical aging and destructive breakdown. New experimental results are presented to confirm previous findings and a new approach to inhibit the degradation process by the incorporation of suitable dopants into the polymer. The concentration of free radicals in the polymer increases with an increasing electric field at a fixed stress time of 250 h and with increasing stress time at a fixed electric field of 833 kV cm−1. The concentration of free radicals is directly related to the concentration of new traps created by stress. However, when suitable dopants are incorporated, the initiation voltage for the occurrence of electrical treeing and the breakdown strength are both increased. The dopants tend to create shallow traps and have little effect on the deep trap concentration. This implies that the dopants act as free‐radical scavengers that tend to satisfy the unpaired electrons of the broken bonds, which create new acceptor‐like electron traps and new shallow traps. By doing so, the shallow traps screen the deep traps, thereby reducing the energy released during trapping and recombination and the probability of breaking the macromolecular bonds and causing structural degradation. © 2003 Wiley Periodicals, Inc. J Appl Polym Sci 89: 3416–3425, 2003

Junction area dependence of breakdown characteristics in magnetic tunnel junctions

Breakdown characteristics of the magnetic tunnel junctions (MTJ) with different junction areas of S=200 μm2 and S=0.5 μm2 are investigated under constant voltage stress. The breakdown process is found to be quite different for the two junction areas. For the large junctions with S=200 μm2, magnetoresistance (MR) ratio decreases gradually with increasing time of constant voltage stress and lasts for 10–30 min. The low frequency 1/f noise power also increases with increasing stress time due to the Johnson and shot noises, caused by current flowing through ohmic shorts or pinholes across tunnel barrier. Meanwhile, the junctions with S=0.5 μm2 show abrupt junction breakdown after stress time of 1–7 h. There is no significant change in both MR ratio and its bias dependence during the voltage stress. In particular, soft-breakdown events are observed before total breakdown occurs. The junction breakdown of small junction area is of intrinsic nature of the junction while the one of large junction area is due to extrinsic factors.

Mechanism of device instability for unhydrogenatedpolysilicon TFTs under off-state stress

The effects of off-state stress (Vgs = 0 V,Vds = 0 to -20 V) on unhydrogenated p-channelpolysilicon thin-film transistors (TFTs) were studied.It was observed that the post-stressed subthreshold swing isfirst improved due to the annealing effect from the interactionof tunnelling electrons and captured holes. As the stress timeincreases or as the stress bias increases, the generation oftraps caused by tunnelling electrons will cancel out theannealing effect and then degrade the subthreshold swing. Inaddition, the trapping of tunnelling electrons in the gate oxidecauses a shift of threshold voltage. However, improving thequality of the gate oxide interface by oxidation of the channelpolysilicon on submicrometre bottom-gate TFTs can reduce theimpact of the off-state stress.

Stress-induced high-field gate leakage current in ultra-thin gate oxide

A number of groups have reported that the low-field stress-induced leakage current (SILC) in thin oxides increased after the oxides had been subjected to high voltage stresses. In this study, we observed that high-field SILC increased after the oxides had been subjected to high voltage stresses. The experimental results suggest strongly that SILC must be considered at a high-field region, and the dependence of the high-field SILC on the measurement field E ox is proportional to exp (cE ox ) , as compared to the exp (−c/E ox ) , at a low field which was reported by some researchers. The high-field SILC increases and saturates after a long stress time, when the stress time increases, which is similar to the low-field SILC. Using the method of proportional difference operator, the trap generation/capture time constant can be obtained.

Stability of electron emission current in hydrogen-free diamond-like carbon deposited by plasma enhanced chemical vapor deposition

We have studied the electron emission characteristics of the hydrogen-free diamondlike carbon (DLC) and conventional DLC films. The electron emission current of conventional DLC increases at first and then decreases continuously with bias stress time. The emission current of the hydrogen-free DLC, deposited by the layer-by-layer technique, increases at first and then stabilizes with increasing stress time. The resistivity of the hydrogen-free DLC decreases after long bias stress, and that appears to be due to the changes in the density of states in the gap of the hydrogen-free DLC.

Degradation of bipolar junction transistors under dynamic high current stress and biased in open-collector condition

The reliability of bipolar junction transistors (BJTs) at high current densities is an important issue and requires detailed study. In the past, there have been studies on the effect of d.c. high current stress on the BJT current-voltage characteristics, but there is no report on the effect of dynamic high current stress on the BJT I- V characteristics. In this paper, we study experimentally the degradation of metal-emitter Si n- p- n and p- n- p bipolar junction transistors under dynamic high current stress and biased in open collector condition. Reduction and increase of base current at low bias voltage with increasing stress time have been found. Decrease of base and collector currents at high bias in n- p- n BJTs was found only after a large stress time has elapsed.

Effects of Current Stress on the Characteristics of a Si Heterojunction Bipolar Transistor with a Hydrogenated Microcrystalline Si Emitter

Changes in the characteristics of a µc-Si:H-emitter Si-HBT induced by forward current stress imposed on the emitter-base junction are studied. The principal changes appear in the base current which consists of the diffusion and the band-gap-state-assisted tunneling currents. The diffusion current at first increases and later decreases as stressing proceeds; the overall result due to long-term stressing is reduction. Consequently, the maximum hFE, governed by the diffusion current component, is enhanced as a result of stressing. The tunneling current increases monotonically with increasing stress time, resulting in degradation of hFE at low output currents. Changes in both diffusion and tunneling currents can be explained by the simultaneous occurrence in µc-Si:H of increases in the active dopant and the defect densities.

Hot-carrier-induced degradation in p-channel LDD MOSFET's

When the p-channel MOSFET is stressed near the maximum substrate current I sub , the lifetime t (5-percent increase in the transconductance) follows tI_{sub} = A(I_{sub}/I_{d})^{-n} , with n = 2.0. A simple electron trapping model is proposed to explain the observed power law relationship. The current ratio I_{sub}/I_{d} and the maximum channel electric field decrease with increasing stress time, which is consistent with electron trapping in the oxide during the stress.

Role of hot-hole injection in hot-carrier effects and the small degraded channel region in MOSFET's

Drain avalanche hot-carrier (DAHC) injection, which imposes the most severe limitations on n-channel MOS device design, is investigated from the viewpoint of surface-state generation and its localized area in the channel. It is shown, using the charge pumping technique, that the surface states are mainly created by hot-hole injection, and its small degraded area stretches toward the source region with increased stress time. A remarkable correlation between the increase of surface-state density, transconductance degradation, and substrate current is also described. In addition, to clarify the role of hot-hole injection, p-channel devices, as well as n-channel devices, are used, and hot-hole injection is shown to create more surface states than hot-electron injection.