Interface trap and oxide charge generation under negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin plasma-nitrided SiON gate dielectrics

Abstract

The interface trap generation (ΔNit) and fixed oxide charge buildup (ΔNot) under negative bias temperature instability (NBTI) of p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) with ultrathin (2 nm) plasma-nitrided SiON gate dielectrics were studied using a modified direct-current–current-voltage method and a conventional subthreshold characteristic measurement. Different stress time dependences were shown for ΔNit and ΔNot. At the earlier stress times, ΔNit dominates the threshold voltage shift (ΔVth) and ΔNot is negligible. With increasing stress time, the rate of increase of ΔNit decreases continuously, showing a saturating trend for longer stress times, while ΔNot still has a power-law dependence on stress time so that the relative contribution of ΔNot increases. The thermal activation energy of ΔNit and the NBTI lifetime of pMOSFETs, compared at a given stress voltage, are independent of the peak nitrogen concentration of the SiON film. This indicates that plasma nitridation is a more reliable method for incorporating nitrogen in the gate oxide.