III-V Materials Research Articles

Chemical and Electrochemical Regeneration of InP after GD-OES/XPS Profiling Experiments

The interest in III-V materials for photovoltaic applications has grown with the development of tandem or multi-junction solar cells. However, with the devices architecture getting more and more complex, the multiple processing steps have to be characterized by means of adapted characterization strategies. Indeed, the better efficiencies can be obtained once the entire solar cell is widely known and optimized. In this purpose, the best way would be a combination of electrical properties measurements, chemical and optical characterizations of all the layers and interfaces in the final cell stack. The present study focuses on physico-chemical characterizations from the surface to the different interfaces of interest, to help in determining optimal experimental conditions during the whole cell fabrication. To this end, we developed and implemented a new and specific approach combining two analytical techniques. To access the different buried interfaces, a fine quantitative chemical profiling through each layer is performed thanks to a combination of Glow Discharge – Optical Emission Spectroscopy (GD-OES), with its new Differential Interferometry Profiling (DiP) module, and X-ray Photoelectron Spectroscopy (XPS). The advantage of coupling these techniques is to combine the high etching rate of GD-OES and the XPS surface chemical (composition and chemical environment) diagnostic. In particular, specific in-depth location can be precisely reached by live GD-OES intensity profile monitoring, while XPS analyses (400 µm spot size) can be directly performed inside the GD-OES crater (4mm diameter) in order to obtain the detailed chemical composition. The proof of concept has been established [1], however, previous studies have demonstrated that, stopping the GD-OES profiling, and so the dynamic of the plasma sputtering, leads to possible degradation of the material and re-deposition processes. Therefore, a dedicated study of the degradation nature and perturbed depth dimension has to be performed to adopt the best strategy to regenerate the initial chemical and structural information and ensure the reliability of the analyses implemented inside the crater. For our purpose, this point is critical to certify that surface XPS analyses inside the crater bring representative information about the chemistry. Different regeneration solutions can be employed to eliminate the damaged surface [2] and we specifically investigate the capabilities of surface wet chemical engineering, by soaking, or physical removal by Ar+ or Arn + sputtering. This issue will be illustrated on the practical case of InP. First, the evaluation of the degradation of InP due to the GD-OES stopping for a better XPS exploitation of the GD crater will be presented. To obtain an overall characterization complementary analyses techniques were employed. Crater imaging and global chemical and microstructural analyses were achieved by scanning electron microscopy (SEM), Electron dispersive spectrometry (EDS) and electron BackScattered Diffraction (EBSD). Surface analyses were performed ex-situ by XPS and, at local scale (12 nm spot size) by nano-Auger) and in-situ by electrochemistry. Optical properties were obtained by ellipsometry (Fig. 1). From this work, a superficial In enrichment inside the GD-OES crater (Fig. 2), very close to the one obtained by the cathodic decomposition in aqueous solution, was shown. In addition, electrochemistry and XPS measurements displayed that this enrichment was attributed to the presence of metallic In. Then, a comparative study of the InP GD-OES crater evolution after different regeneration options, including wet chemical nano-engineering, electrochemistry and physical treatments, will be detailed.

Photo-Atomic Layer Etching of GaAs/AlGaAs Nanoheterostructures.

Photo-atomic layer etching (photo-ALE) of GaAs and AlGaAs semiconductors was investigated in deionized H2O and aqueous solution of NH4OH under weak excitation conditions ( P ≈ 20 mW/cm2). The process is based on digital photocorrosion in a processed solution and a negligible corrosion during the light-off phase employed for dissolution of the photocorrosion products. An inductively coupled plasma mass spectroscopy (ICP-MS) analysis revealed that photo-ALE of GaAs in an aqueous solution of NH4OH proceeds linearly with the number of reaction cycles, typically at ∼0.1 nm/cycle, and with the light-off phase as short as 22 s sufficient to entirely dissolve the photocorrosion products generated during a 3 s irradiation. In agreement with the ICP-MS data, the constant photo-ALE rates in NH4OH were also demonstrated in situ with the photoluminescence measurements. Our results suggest that the congruent decomposition of III-V materials and the etching of deep structures with atomic layer resolution could be facilitated by switching in situ between different etching environments.

Laser restructuring and photoluminescence of glass-clad GaSb/Si-core optical fibres

Semiconductor-core optical fibres have potential applications in photonics and optoelectronics due to large nonlinear optical coefficients and an extended transparency window. Laser processing can impose large temperature gradients, an ability that has been used to improve the uniformity of unary fibre cores, and to inscribe compositional variations in alloy systems. Interest in an integrated light-emitting element suggests a move from Group IV to III-V materials, or a core that contains both. This paper describes the fabrication of GaSb/Si core fibres, and a subsequent CO2 laser treatment that aggregates large regions of GaSb without suppressing room temperature photoluminescence. The ability to isolate a large III-V crystalline region within the Si core is an important step towards embedding semiconductor light sources within infrared light-transmitting silicon optical fibre.

Nanoscale Wet Chemical Engineering of III-V Quantum Dots for Emerging Solar Applications

Multi-junction solar cells architectures have gained interest among the photovoltaic community, as they are very promising architectures for high efficiency devices. Among the different configuration envisaged, the use of III-V materials has yet proved to be relevant. More especially, recent studies have shown that the implementation of quantum dots on the surface of a III-V layer leads to the generation of an intermediate band with the benefit to reach efficiencies around 48%. Two issues are considered: the elimination of the wetting layer detrimental for optoelectronic properties and then the control of the quantum dots shape and chemistry to adjust the band-gap. Wet chemistry is a conventional strategy used for III-V material surface engineering. In the present case, specific formulations and protocols are developed to fulfill the nanometric dimension considerations and take account for specificities of this 1 or 0-Dimension like structuration, on the base of surface analyses expertise.

Design and investigation of dopingless dual-gate tunneling transistor based on line tunneling

The dopingless tunneling FET (DLTFET) has attracted more and more attention due to the reduction of process complexity comparing to traditional TFET with heavy doping source and drain regions. But the on-state current of conventional DLTFET is lower because its on-state current is only determined by point tunneling (PT) between source and channel. In this work, a new dual-gate DLTFET based on line tunneling (LT) is designed and studied by Sentaurus TCAD simulation tool. The on-state current and subthreshold swing (SS) of DLTFET are greatly improved by skillfully designing back gate engineering and bias. Applying this novel design, the line tunneling is created from channel bottom to channel top, which dramatically enhances tunneling area and tunneling current. So the on-state current of LT_DLTFET consists of point tunneling between source and channel as well as line tunneling in channel region. Comparing to the traditional PT_DLTFET based on Ge, the simulation results reveal that the on-state current of LT_DLTFET based on Ge is increased to 14.8μA/μm from 6.5μA/μm at Vg=1V and Vd=0.5V, and the average SS and minimum SS are decreased to 22.9mV/dec and 6.5mV/dec from 33.9 mV/dec and 9.5mV/dec, respectively. The LT_DLTFET is also proper to both Si and III-V materials. This design greatly promotes the application potential of DLTFET.

Challenges for high performance and very low power operation at the end of the Roadmap

Future Nanoelectronic devices faces substantial challenges, in particular increased power consumption, saturation of performance, large variability and reliability limitation. In this respect, novel materials and innovative device architectures will be needed for Nanoscale FETs.This paper presents some promising solutions for the end of the roadmap with Multigate Nanodevices, Nanowires, Tunnel transistors, Ferroelectric FET, and Hybrid Nanocomponents using Phase Change materials or nanofilament. Other alternative materials, as ultra-thin films, 2D and 1D nanostructures, Heterostructures using strained or III-V materials, will also allow to boost these advanced nanotransistors.

On the mechanism of cross-hatch pattern formation in heterostructures with a small lattice mismatch

The mechanism of cross-hatch (CH) pattern formation on the surface of GaMnAs/InGaAs/GaAs (001) heterostructures with a small lattice mismatch, related to the peculiarities of glide process of dislocations in epilayers, is considered. Electrically active defects in these heterostructures and the surface morphology of epilayers were investigated by electron beam induced current imaging, transmission electron microscopy (TEM), atomic force microscopy and differential interference contrast microscopy in combination with selective chemical etching. The studies revealed a high-density system of extended defects (EDs) in the bulk of InGaAs epilayers in addition to misfit dislocations at the epilayer/substrate interface. These defects possess a number of properties reflecting their unusual core structure: pronounced crystallography, recombination activity, existence of elastic strains in the core, and at the same time the absence of contrast in the TEM images. Model experiments performed on InGaAs epilayers give grounds to consider that the revealed EDs are similar in properties to a new type of EDs generated by moving dislocations in plastically deformed Si and SiGe crystals. The formation of CH surface structure is assumed to be directly related to the emergence of the EDs during the strain relaxation process in heterostructures based on III-V and IV-group materials.

Calculation of the band structure, carrier effective mass, and the optical absorption properties of GaSbBi alloys

The details of the electronic band structure of GaSbBi as functions of Bi mole fraction and along different symmetry directions of the crystal are calculated using a 14 band k.p model considering the band anti-crossing interaction between the valence band of the host III-V material and the Bi related impurity level resonant with the host. The effect of the lattice strain on the band structure as a result of incorporating a higher amount of Bi in the material is also studied. Variations of the bandgap energy, spin orbit split-off energy, band offsets, and the different sub-band energies are presented as functions of Bi content in GaSbBi as well as along the three symmetric k directions. Effective mass of the charge carriers and their dependence on Bi content is investigated. Furthermore, the intrinsic carrier concentration of the material as a function of Bi composition is evaluated. Finally, the optical absorption in the material is investigated considering the electronic transitions involving various valence sub bands and the conduction band.

Anomalous tilting in InGaAs graded buffers from dislocation sources at wafer edges

Uniform strain relaxation and defect densities across the entire wafer are important aspects of lattice-mismatched or metamorphic epitaxy of semiconductors. Achieving this requires an understanding of the sources of dislocations that lead to relaxation. We show that wafer edges are a major source of misfit dislocations in InGaAs graded buffers on GaAs substrates. AlInP solar cells fabricated from regions on the wafer affected by edge sources have a markedly lower performance due to a local increase in the threading dislocation density. Spatially resolved x-ray reciprocal space maps and electron backscattered diffraction maps of the InGaAs compositionally graded buffer reveal anomalous epi-layer tilting on 2-inch substrates from these dislocation sources at the wafer edge. The tilting abruptly changes direction partially through the graded buffer growth as the dislocations from the wafer edge appear in the x-ray sampling areas. We speculate that anisotropic misfit dislocation glide in III-V materials in combination with non-uniform stress states during growth biases slip system activity. These experiments demonstrate that lattice-mismatched epitaxy requires additional controls over the growth environment to achieve uniform strain relaxation for wafer scale heterogeneous integration.

Electroluminescent Cooling in III–V Intracavity Diodes: Practical Requirements

Recent studies of electroluminescent cooling (ELC) in III-V structures demonstrate the need to better understand the factors affecting the efficiency of light emission and energy transport in light-emitting diodes (LEDs). In this paper, we establish the physical and operational requirements for reaching the efficiencies needed for observing ELC in the III-V intracavity double-diode structures at high powers. The experimentally validated modeling framework used in this paper, coupling the drift-diffusion charge transport model with a photon transport model, indicates that the bulk properties of the III-V materials are already sufficient for ELC. Furthermore, the results suggest that the bulk power conversion efficiency of the LED in the devices, which allowed the experimentally measured record high coupling quantum efficiency of 70%, already exceeds 115%. However, as shown here, direct observation of ELC by electrical measurements still requires a combination of a more efficient suppression of the nonradiative surface recombination at the LED walls and the reduction of the detection losses in the photodetector of the intracavity structures.

O-Band and C/L-Band III-V Quantum Dot Lasers Monolithically Grown on Ge and Si Substrate

Direct epitaxial growth of III-V heterostructure on CMOS-compatible silicon wafer offers substantial manufacturing cost and scalability advantages. Quantum dot (QD) devices are less sensitive to defect and temperature, which makes epitaxially grown III-V QD lasers on Si one of the most promising technologies for achieving low-cost, scalable integration with silicon photonics. The major challenges are that heteroepitaxial growth of III-V materials on Si normally encounters high densities of mismatch dislocations, antiphase boundaries and thermal cracks, which limit the device performance and lifetime. This paper reviews some of the recent developments on hybrid InAs/GaAs QD growth on Ge substrates and highly uniform (111)-faceted hollow Si (001) substrates by molecular beam epitaxy (MBE). By implementing step-graded epitaxial growth techniques, the emission wavelength can be tuned into either an O band or C/L band. Furthermore, microcavity QD laser devices are fabricated and characterized. The epitaxially grown III-V/IV hybrid platform paves the way to provide a promising approach for future on-chip silicon photonic integration.

Hybrid functional study of nonlinear elasticity and internal strain in zinc-blende III-V materials

We investigate the elastic properties of selected zinc-blende III-V semiconductors. Using hybrid functional density functional theory, we calculate the second- and third-order elastic constants and first- and second-order internal strain tensor components for Ga, In, and Al containing III-V compounds. For many of these parameters, there are no available experimental measurements, and this work is the first to predict their values. The stricter convergence criteria for the calculation of higher-order elastic constants are demonstrated, and arguments are made based on this for extracting these constants via the calculated stresses, rather than the energies, in the context of plane-wave-based calculations. The calculated elastic properties are used to determine the strain regime at which higher-order elasticity becomes important by comparing the stresses predicted by a lower- and a higher-order elasticity theory. Finally, the results are compared with available experimental literature data and previous theory.

Selective area growth of InxGa1\u2212xAs nanowires on HfO2 templates for highly scaled nMOS devices

The replacement of the strained Si channel in metal-oxide-semiconductor-field-effect-transistors (MOSFETs) with high electron mobility III-V compound semiconductors, particularly InGaAs, is being intensively investigated as an alternative to improve the drive current at low supply voltages in sub-10 nm CMOS applications. As device scaling continues, the reduction of the source and drain contact resistance becomes one of the most difficult challenges to fabricate highly scaled III-V-MOSFETs. In this article, we describe a self-aligned process based on selective molecular beam epitaxial regrowth of InxGa1−xAs (x=0–1) raised source/drain nanowire structures on etched recessed areas of a nanopatterned HfO2 template as a key element to integrate high mobility III-V materials with high-κ dielectrics in three-dimensional device architectures. The interaction of atomic H with the surface of the HfO2 nanopatterns has been investigated by using AFM, ToF-SIMS, and ARXPS. Selective growth has been observed for all values of x between 0 and 1. AFM results show that atomic H lowers the temperature process window for InxGa1−xAs selective growth. HRTEM images have revealed the conformality of the growth and the absence of nanotrench formation near the HfO2 mask edges. InxGa1−xAs alloys grown on H-treated HfO2 patterned substrates exhibit a higher uniformity in chemical composition and full strain relaxation for x≥0.5.

Heterogeneous Dielectric gate technique to enhance the performance of InGaAs/InP trench MOSFET

Based on group III-V material, a new InGaAs/InP based Trench MOSFET has been proposed with heterogeneous dielectric gate, which exhibits a significant improvement of device parameters in terms of peak transconductance,on state resistance and effective mobility. Using 2D Sentaurus device simulator the proposed device structure shows approximately 82% improvement in peak transconductance, 92% reduction in on state resistance, 103% improvement in effective mobility as compared to SiO2 dielectric gate.

III-V-Based Optoelectronics with Low-Cost Dynamic Hydride Vapor Phase Epitaxy

Silicon is the dominant semiconductor in many semiconductor device applications for a variety of reasons, including both performance and cost. III-V materials exhibit improved performance compared to silicon, but currently, they are relegated to applications in high-value or niche markets, due to the absence of a low-cost, high-quality production technique. Here we present an advance in III-V materials synthesis, using a hydride vapor phase epitaxy process that has the potential to lower III-V semiconductor deposition costs, while maintaining the requisite optoelectronic material quality that enables III-V-based technologies to outperform Si. We demonstrate the impacts of this advance by addressing the use of III-Vs in terrestrial photovoltaics, a highly cost-constrained market.

Nanowires for energy: A review

Semiconductor nanowires (NWs) represent a new class of materials and a shift from conventional two-dimensional bulk thin films to three-dimensional devices. Unlike thin film technology, lattice mismatch strain in NWs can be relaxed elastically at the NW free surface without dislocations. This capability can be used to grow unique heterostructures and to grow III-V NWs directly on inexpensive substrates, such as Si, rather than lattice-matched but more expensive III-V substrates. This capability, along with other unique properties (quantum confinement and light trapping), makes NWs of great interest for next generation optoelectronic devices with improved performance, new functionalities, and reduced cost. One of the many applications of NWs includes energy conversion. This review will outline applications of NWs in photovoltaics, thermoelectrics, and betavoltaics (direct conversion of solar, thermal, and nuclear energy, respectively, into electrical energy) with an emphasis on III-V materials. By transitioning away from bulk semiconductor thin films or wafers, high efficiency photovoltaic cells comprised of III-V NWs grown on Si would improve performance and take advantage of cheaper materials, larger wafer sizes, and improved economies of scale associated with the mature Si industry. The thermoelectric effect enables a conversion of heat into electrical power via the Seebeck effect. NWs present an opportunity to increase the figure of merit (ZT) of thermoelectric devices by decreasing the thermal conductivity (κ) due to surface phonon backscattering from the NW surface boundaries. Quantum confinement in sufficiently thin NWs can also increase the Seebeck coefficient by modification of the electronic density of states. Prospects for III-V NWs in thermoelectric devices, including solar thermoelectric generators, are discussed. Finally, betavoltaics refers to the direct generation of electrical power in a semiconductor from a radioactive source. This betavoltaic process is similar to photovoltaics in which photon energy is converted to electrical energy. In betavoltaics, however, energetic electrons (beta particles) are used instead of photons to create electron-hole pairs in the semiconductor by impact ionization. NWs offer the opportunity for improved beta capture efficiency by almost completely surrounding the radioisotope with semiconductor material. Improving the efficiency is important in betavoltaic design because of the high cost of materials and manufacturing, regulatory restrictions on the amount of radioactive material used, and the enabling of new applications with higher power requirements.

Epitaxial Bonding and Transfer Processes for Large-Scale Heterogeneously Integrated Electronic-Photonic Circuitry

A process flow for the heterogeneous integration of III-V epitaxial material onto a silicon host wafer using CMOS-compatible materials and methods toward the goal of forming electronic-photonic circuitry is presented. Epitaxial structures for compound-semiconductor-based transistors are assembled on a silicon carrier wafer using a commercially-available polymer and then formed into distinct patterns for scalable processing. A CMOS-compatible metallization process is performed on the back side collector terminal of the aligned epitaxial structures, followed by a metal-eutectic bonding process that transfers the wafer-scale array of III-V material onto a separate silicon host wafer allowing the fabrication of both electronic and photonic devices on a single wafer. Characterization of the epitaxial bonding and transfer is performed to ensure material alignment is maintained without additional tooling and that the interconnect layer established between III-V collector and silicon host wafer performs as an ohmic contact, thermal path, and mechanical bond compatible with back-end-of-line (BEOL) integrated circuit processing. These processes are shown for GaAs-based light-emitting transistor (LET) epitaxial material to demonstrate that subsequent photonic devices and systems may be patterned into the integrated material allowing a direct electrical interconnect to embedded CMOS-based electronic systems for new functionalities as electronic-photonic integrated circuitry.

Design evolution of MOVPE reactors for improved productivity: Adaptation to nitrides and feedback to classical III-V

High growth rate of GaAs more than 90 μm/h is achieved in the attempt of the productivity improvement of solar cells. The design concept is derived from the MOVPE reactor for nitrides. The design criteria for nitride MOVPE reactor were found to be very useful for GaAs MOVPE. Originally, MOVPE reactors for nitrides were developed on the basis of the reactor design for classical III-V materials. Today, the principle of reactor design to cope with the singularity of nitrides brings about essential feedback to the next-generation reactors for classical III-V materials for improved productivity.At first, design criteria for GaN MOVPE reactor are described in light of the vapor phase reaction. Secondly, cost analysis of a 19 µm-thick GaN layer on a bulk GaN substrate for a vertical diode is briefly discussed in light of a trade-off between a high purity and a high growth rate of GaN.In GaAs-based solar cells, the thickness of light absorber is a couple of micrometers, accompanied by a thin (Al)InGaP cap, the growth time of which can be reduced to a few minutes if the growth rate is on the order of a few tens µm/h. In consideration of these factors, cost analysis of MOVPE for GaAs solar cells will be discussed in comparison with GaN on GaN diode.

Bandlike and localized states of extended defects in n-type In0.53Ga0.47As

In0.53Ga0.47As p + n diodes with different densities of extended defects have been analyzed by detailed structural and electrical characterization. The defects have been introduced during Metal-Organic Vapor Phase Epitaxy (MOVPE) growth by using a lattice-mismatched layer on a semi-insulating InP or GaAs substrate. The residual strain and indium content in the n-type In0.53Ga0.47As layer have been determined by high-resolution X-ray diffraction, showing nearly zero strain and a fixed indium ratio of 0.53. The deep levels in the layer have been characterized by Deep Level Transient Spectroscopy. The mean value of electron traps at 0.17 ± 0.03 eV below the conduction band minimum EC is assigned to the “localized” states of α 60° misfit dislocations; another broad electron trap with mean activation energies between EC− 0.17 ± 0.01 and 0.39 ± 0.04 eV, is identified as threading dislocation segments with “band-like” states. A high variation of the pre-exponential factor KT by 7 orders of magnitude is found for the latter when changing the filling pulse time, which can be explained by the coexistence of acceptor-like and donor-like states in the core of split dislocations in III-V materials. Furthermore, two hole traps at EV+ 0.42 ± 0.01 and EV+ 0.26 ± 0.13 eV are related to the double acceptor of the Ga(In) vacancy (VGa/In3-/2-) and 60° β misfit dislocations, respectively. Finally, the dislocation climbing mechanism and the evolution of the antisite defects AsGa/In are discussed for n-type In0.53Ga0.47As.

Nanoscale etching of III-V semiconductors in acidic hydrogen peroxide solution: GaAs and InP, a striking contrast in surface chemistry

In this study of nanoscale etching for state-of-the-art device technology, the importance of surface chemistry, in particular the nature of the surface oxide, is demonstrated for two III-V materials. Striking differences in etching kinetics were found for GaAs and InP in sulphuric and hydrochloric acidic solutions containing hydrogen peroxide. Under similar conditions, etching of GaAs was much faster, while the dependence of the etch rate on pH, and on H2O2 and acid concentrations also differed markedly for the two semiconductors. Surface analysis techniques provided information on the product layer present after etching: strongly non-stoichiometric porous (hydr)oxides on GaAs and a thin stoichiometric oxide that forms a blocking layer on InP. Reaction schemes are provided that allow one to understand the results, in particular the marked difference in etch rate and the contrasting role of chloride in the dissolution of the two semiconductors. A critical factor in determining the surface chemistry is considered to be the ease with which a proton can be removed from the group V hydroxide, which is formed in the initial etching step (the breaking of the III-V surface bond).