III-V Compound Semiconductors Research Articles

Лимитирующие факторы скорости роста при эпитаксии полупроводниковых соединений III-V

Limiting factors for the growth rate of epitaxial III-V compound semiconductors are investigated. A model based on the two connected diffusion equations for the group III and V adatoms applies for planar layers and different nanostructures including III-V nanowires. An expression for the step growth rate is obtained and a physical parameter is revealed which determines an element which actually limits the growth process.

InAs nanowire arrays for room-temperature ultra-broadband infrared photodetection.

Detection of short-wave infrared (SWIR) and mid-wave infrared (MWIR) emissions remains challenging despite their importance in many emerging applications, including night vision, space imaging and remote sensing. III-V compound semiconductor materials such as InAs have an ideal band gap covering a spectral regime from near-infrared (NIR), SWIR to MWIR. However, due to their high dark current, InAs photodetectors normally require a low-temperature operation, which has greatly limited their practical applications. Here, we report the engineering of InAs nanowire arrays to achieve efficient photodetection of light at wavelengths ranging from NIR to MWIR (3500 nm). By using selective area metal-organic vapour-phase epitaxy, we optimise the nanowire growth temperature and V/III ratio to achieve wurtzite (WZ)-based InAs nanowire arrays with a high WZ density of ∼67%. Due to the n-type background doping of the InAs nanowires and the p-type InAs substrate used for nanowire growth, a p-n junction is formed, and an ultrawide room-temperature photoresponse ranging from 500 to 3500 nm is obtained under zero bias. It is found that the waveguide modes supported by the InAs nanowires result in a high peak responsivity of 0.44 A W-1 and a detectivity of 1.25 × 1010 cm √Hz W-1 at a wavelength of 1600 nm, a bias voltage of only -0.1 V and a relatively high operating temperature of 150 K. Such a strong light trapping effect in the InAs nanowires also leads to significantly lower reflection compared to that observed in planar photodetectors, and thus strong absorption in the substrate extending the photoresponse up to the InAs bandgap edge of 3500 nm. Our work shows that through careful material optimisation and device design, InAs nanowire arrays are promising for the development of high-performance ultra-broadband infrared photodetectors for wavelengths ranging from NIR, SWIR to MWIR.

MOVPE and its future production challenges

III-V Compound Semiconductors (CS) such as Gallium Arsenide (GaAs), Indium Phosphide (InP) and more latterly, Gallium Nitride (GaN) are critical Key Enabling Technologies, fundamentally underpinning several recent major technology revolutions. Two major current and likely-future markets within the burgeoning photonics industry ($7 billion) are 3D imaging and sensing and LIDAR applications, with high predicted market growth. Datacom and industrial markets add considerable further momentum to this market growth. Evidence of such expansion is provided in the manufacturing of VCSEL-based devices, which have in recent years, entered a rapid growth phase. For the mass-manufacturing of for example, GaAs/AlGaAs-based VCSEL MOVPE epitaxy, many areas require addressing in key underlying R&D, such as cost-reduction and in thickness and wavelength uniformity. In addition, scalability, (e.g. to 150 mm wafers), automation and in-situ process control will impact yield and throughput improvements.We will demonstrate the preparations for mass-manufacturing, through improvements implemented across the evolution of the VCSEL epiwafers from smaller diameters, through 100 mm and on to 150 mm wafers. More recently however, further developments have led to even larger diameter VCSEL wafer epitaxy, on both GaAs and Ge 200 mm substrates. Challenges in growing on such large diameter wafers will be presented from the epitaxy (layer uniformity and wafer bow) and device fabrication perspective. We will demonstrate how these improvements impact on the manufacturing readiness of production VCSEL wafers.

Isotherm Theoretical Study of the AlxGa1-xAsySb1-y Quaternary Alloy Using the Regular Solution Approximation for Its Possible Growth via Liquid-Phase Epitaxy at Low Temperatures.

This work presents the theoretical calculation of isotherm diagrams for quaternary alloys of III-V semiconductor compounds with the form IIIxIII1-xVyV1-y. In particular, the isotherm diagrams for the AlxGa1-xAsySb1-y quaternary alloy at low temperatures were calculated (500 °C, 450 °C, 400 °C, and 350 °C). The AlxGa1-xAsySb1-y quaternary alloy was formed from four binary compounds such as GaAs, AlAs, AlSb, and GaSb, all with direct bandgaps. The regular solution approximation was used to find the quaternary isotherm diagrams, represented in four linearly independent equations, which were solved using Parametric Technology Corporation Mathcad 14.0 software for different arsenic and antimony atomic fractions. The results support the possible growth of layers via liquid-phase epitaxy in a range of temperatures from 500 °C to 350 °C, where the crystalline quality could be improved at low temperatures. These semiconductor layers could have applications for optoelectronic devices in photonic communications, thermophotovoltaic systems, and microwave devices with good crystalline quality.

Laser-assisted local metal-organic vapor phase epitaxy.

Selective area epitaxial growth is an important technique, both for monolithic device integration as well as for defect reduction in heteroepitaxy of crystalline materials on foreign substrates. While surface engineering with masking materials or by surface structuring is an effective means for controlling the location of material growth, as well as for improving crystalline properties of epitaxial layers, the commonly involved integral substrate heating presents a limitation, e.g., due to constraints ofr the thermal budget applicable to existing device structures. As a solution, an epitaxial growth approach using a laser source only locally heating the selected growth area, in combination with metal-organic precursors to feed a pyrolithic chemical reaction (also known as metal-organic vapor phase epitaxy, MOVPE), is presented. Without masking or surface structuring, local epitaxial growth of III-V compound semiconductor layers on a 50-1500 µm length-scale, with high structural and optical quality, is demonstrated. We discuss general design rules for reactor chamber, laser heating, temperature measurement, sample manipulation, gas mixing, and distinguish laser-assisted local MOVPE from conventional planar growth for the important compound semiconductor GaAs. Surface de-oxidation prior to growth is mandatory to realize smooth island surfaces. Linear growth rates in the range 0.5-9 µm/h are demonstrated. With increasing island diameter, the probability for plastic deformation within the island increases, depending on reactor pressure. A step-flow mode on the island surface can be achieved by establishing a sufficiently small temperature gradient across the island.

Ultrasensitive UV-C detection based on MOCVD-grown highly crystalline ultrawide bandgap orthorhombic κ-Ga2O3

Orthorhombic κ-Ga2O3, as one of the Ga2O3 polymorphs, is considered a promising as ultrawide bandgap material for extreme environment devices. It is considered more superior than the conventional group III-V compound semiconductors and silicon carbides in extreme environments demanding material/device characteristics of high-voltage, high-temperature, high-pressure, high-impact, and high-radiation. In this study, we demonstrate ultrasensitive ultraviolet-C (UV-C) detection using Si-doped orthorhombic κ-Ga2O3 photodetectors. A 150 nm thick κ-Ga2O3 film was grown on a 2-inch diameter sapphire (α–Al2O3) wafer via metal organic chemical vapor deposition (MOCVD) method. The crystallinity of orthorhombic κ-Ga2O3 film was investigated by X-ray diffraction (XRD) and transmission electron microscopy (TEM). The ultrawide bandgap of approximately 4.9 eV was confirmed by UV transmittance measurement. For UV-C detection analysis, a planar device with a channel length of 20 μm was fabricated using Au/Ti metal contacts on the orthorhombic κ-Ga2O3 film. The device doped under 15 sccm SiH4 flow rate showed ultrahigh photoresponse of ∼72.1 A/W, Ion/Ioff of ∼14, and decent rise (∼0.35 s) and decay (∼1.79 s). Our results will contribute to the understanding on a new material phase of κ-Ga2O3, as well as on developing optoelectronics devices with high radiation hardness suitable for operation in extreme environments.

Transfer Printable Single-Crystalline Coupons for III-V on Si Integration

The next-generation internet (6G) requires highly functional devices that e.g. realize frequencies in the THz range for higher data rates and lower latencies. Those requirements exceed the physical limits of established CMOS technologies based on silicon (Si). Hence, there is demand for other semiconductor materials with superior electronic and optical properties that complement Si. One of the key candidates is the III-V compound semiconductor, indium phosphide (InP). Due to its high electron mobility and direct band gap, InP-based devices allow access to frequencies >100 GHz and operate at the optical fibre compatible wavelength of 1.55 μm.1 With the perspective of leveraging the advantages of Si-based CMOS technology and III-V semiconductors, hetero-integration of III-V materials on Si is of great interest. However, existing integration approaches entail certain disadvantages: (i) High dislocation densities due to the lattice mismatch of InP and Si for integration via hetero-epitaxial growth;2 (ii) limited integration density and the requirement of accurate alignment for flip-chip integration; and (iii) high process-related losses of Si and III-V materials as well as thermal stress and low thermal conductivity of adhesive layers degrading device performance for wafer/die bonding technologies.3 Another promising approach for III-V-on-Si integration is micro-transfer-printing (μTP) that involves pick-up and transfer of µm-small chips from a source substrate to a target substrate with high alignment accuracy by using an elastomeric stamp. Advantages of μTP are high integration densities and efficient material use. The technique was already implemented for III-V-on-Si photonic integrated circuits by transfer of epitaxial III-V layers.4 However, using sacrificial III-V interlayers for release and adhesives for bonding still leads to transfer issues and low operation temperature for the devices, respectively.We pursue a new approach to hetero-integration of III-V on Si that aims at the transfer of single-crystalline InP coupons onto Si via μTP. This will be achieved by obtaining crystalline coupons with a thickness of d ≤ 10 µm and two polished surfaces that attain low roughness, needed i.a. for µTP. If the high structural quality of the single-crystalline InP source material can be maintained, this process will provide high quality templates for subsequent epitaxial growth. Towards this goal, we developed a sophisticated micro-preparation process in cooperation with the Leibniz Institute for High Performance Microelectronics IHP.5 Starting from 4-inch single crystals with homogeneous, low dislocation density of 2×103 cm- 2 grown at IKZ,6 thinned InP dies were obtained by sawing, grinding and employing an optimized two-step chemical mechanical polishing (CMP). In order to produce µm-sized transfer-printable coupons, the InP dies were micro structured by means of photolithography assisted patterning and wet (under-)etching (Fig. 1). The coupons can then be picked up with a stamp and transferred to the target wafer. Main innovation of this process is the resin which serves as low stress fixing layer for CMP as well as sacrificial layer for later release.The optimized CMP process with abrasive-free final polishing yielded InP platelets of the desired thickness below 10 μm with low thickness deviation < 1 µm and excellent surface roughness of S q ≈ 0.3 nm (Fig. 2a,b,d). This value even meets the requirements for adhesive-free bonding (S q ≤ 2 nm) and subsequent epitaxial growth (S q ≤ 0.5 nm). X-ray rocking curve mapping provides accurate spatial maps of lattice deformations in the material that may be a consequence of the mechanical processing. Rocking curve widths mappings of the 004 reflection of a (001) sample before and after thinning are homogeneous and below 25 arcsec in the majority of the sample area. Overall no signs of systematic crystal quality deterioration in the product platelets compared to bulk samples have been detected.In summary, the feasibility of μm-thin InP platelet fabrication was demonstrated. Final platelets meet the prerequisites of low and uniform thickness, high planarity, low roughness and little crystal quality deterioration. Furthermore, first InP platelets could successfully be patterned to 100–400 µm-sized coupons using optical lithography and wet etching (Fig. 2c). This opens a path to take the next steps towards hetero-integration on Si by means of µTP with high potential for adhesive-free bonding.

Perspectives on the Development of Metalorganic Vapor Phase Epitaxy for III-V Optoelectronic Devices

The mainstream production of optoelectronic and electronic devices based on epitaxial III-V compound semiconductor materials largely employs metalorganic vapor phase epitaxy, a process first demonstrated for devices in the 1970’s. For this special issue in honor of Prof. P. Daniel Dapkus, this paper first briefly reviews his early contributions that spearheaded the interest of MOVPE as a III-V device epitaxy process. Next, the paper discusses MOVPE reactor development in the 1980’s, which at the time was one of the key challenges in establishing MOVPE technology as a reliable epitaxy manufacturing process. The approach combined physical modeling and numerical simulations of reactor processes followed by materials and device demonstrations. Highly uniform performance metrics of AlGaAs/AlGaAs quantum-well diode lasers and two-dimensional monolithic surface-emitting lasers were demonstrated with excellent run-to-run reproducibility. This foundational approach advanced efforts to standardize reactors and subsequent scaling for high-throughput production.

Revealing fundamentals of charge extraction in photovoltaic devices through potentiostatic photoluminescence imaging

Revealing fundamentals of charge extraction in photovoltaic devices through potentiostatic photoluminescence imaging

MOS Capacitor-Driven Silicon Modulators: A Mini Review and Comparative Analysis of Modulation Efficiency and Optical Loss

Metal-oxide-semiconductor (MOS) capacitor-driven silicon modulators have demonstrated exceeding performance in driving voltage, energy efficiency, and bandwidth through heterogeneous integration with other active materials, including III-V compound semiconductors, transparent conductive oxides (TCOs), and graphene. However, a proper quantitative comparison is lacking among various device structures due to the difference in material properties and device designs. In this article, we first briefly reviewed state-of-the-art MOS capacitor-driven silicon modulators. Following that, we modeled the modulation efficiency and optical loss of two most representative device structures by incorporating the optical properties such as plasma dispersion, band-filling, and bandgap shrinkage effects for several heterogeneously integrated materials. The comparative analysis based on simulated results shows that Ge, III-Vs, and TCOs all offer larger index modulation than Si, whereas graphene has the largest index modulation. At the end of this article, we discussed the strategy of heterogeneous integration based on device design and scalable fabrication.

The Properties of the Polaron in III-V Compound Semiconductor Quantum Dots Induced by the Influence of Rashba Spin-Orbit Interaction

The Properties of the Polaron in III-V Compound Semiconductor Quantum Dots Induced by the Influence of Rashba Spin-Orbit Interaction

Soliton frequency comb generation in CMOS-compatible silicon nitride microresonators

The monolithic integration of soliton microcomb devices with active photonic components and high-frequency electronics is highly desirable for practical applications. Among many materials, silicon nitride ( SiN x ) waveguide layers prepared by low-pressure chemical vapor deposition (LPCVD) have been the main platform for on-chip optical frequency comb generation. However, the high temperatures involved in LPCVD render it incompatible as a back-end process with complementary metal oxide semiconductor (CMOS) or active III-V compound semiconductor fabrication flows. We report the generation of coherent soliton frequency combs in micro-ring resonators fabricated in deuterated silicon nitride ( SiN x : D ) waveguides with a loss of 0.09 dB/cm. Deposited at 270°C by an inductance-coupled plasma chemical vapor deposition (ICP-CVD) process, the material preparation and fabrication flow are fully CMOS-compatible. These results enable the integration of silicon-nitride-based optical combs and photonic integrated circuits (PICs) on prefabricated CMOS and/or III-V substrates, therefore marking a major step forward in SiN x photonic technologies.

Heterogeneous and Monolithic 3D Integration of III-V-Based Radio Frequency Devices on Si CMOS Circuits.

Next-generation wireless communication such as sixth-generation (6G) and beyond is expected to require high-frequency, multifunctionality, and power-efficiency systems. A III-V compound semiconductor is a promising technology for high-frequency applications, and a Si complementary metal-oxide-semiconductor (CMOS) is the never-beaten technology for highly integrated digital circuits. To harness the advantages of these two technologies, monolithic integration of III-V and Si electronics is beneficial, so that there have been everlasting efforts to accomplish the monolithic integration. Considering that the on horizon 6G wireless communication requires faster and more energy-efficient system-on-chip technologies, it is imperative to realize a radio frequency (RF) system in which III-V technology and Si CMOS technology are integrated at a device level. Here we report heterogeneous and monolithic three-dimensional (3D) analog/RF-digital mixed-signal integrated circuits that contain two types of InGaAs high-electron-mobility transistors (HEMTs) designed for high fT and fMAX in the top and Si CMOS mixed-signal circuits consisting of an analog-to-digital converter and digital-to-analog converter in the bottom. A high unity current gain cutoff frequency of 448 GHz and unity power gain cutoff frequency of 742 GHz have been achieved by the fT oriented and fMAX oriented InGaAs HEMTs, respectively, without being affected by mixed-signal interference. At the same time, the bottom Si CMOS circuits provide valid signals without any performance degradation by the integration process.

Analysis using a two-layer model of the transport properties of InGaN epilayers grown on GaN template substrate

In this paper, a two-layer model was used to investigate the electrical properties of InGaN epilayer grown by MOCVD on a semiconducting GaN template substrate. The elaboration process was optimized to obtain high-quality InGaN epilayers with respect to the indium composition. The details of structural and optical properties as well as the surface morphology evolution were studied using X-ray diffraction, photoluminescence spectroscopy, and atomic force microscopy, respectively. The electrical transport properties were measured using the van der Pauw/Hall effect method combined with a two layer model for the first time for InGaN. The obtained experimental results combined with the developed model allowed to precisely extract the electrical properties of the InGaN epilayers and correlate them to the structural properties. The developed model procedure and code are made available and can be easily adapted to other III-N and III-V compound semiconductors grown on a semiconducting substrate.

Phase Control Growth of InAs Nanowires by Using Bi Surfactant

To realize practical applications of nanowire-based devices, it is critical, yet challenging, to control crystal structure growth of III-V semiconductor nanowires. Here, we demonstrate that controlled wurtzite and zincblende phases of InAs nanowires can be fabricated using bismuth (Bi) as a surfactant. For this purpose, catalyst free selective area epitaxial growth of InAs nanowires was performed using molecular beam epitaxy (MBE). During the growth, Bi was used which may act as a wetting agent influencing the surface energy at growth plane ends, promoting wurtzite crystal phase growth. For a demonstration, wurtzite and zincblende InAs nanowires were obtained with and without using Bi-flux. Photoluminescence spectroscopy (PL) analysis of the nanowires indicates a strong correlation between wurtzite phase and the Bi-flux. It is observed that the bandgap energy of wurtzite and zincblende nanowires are ∼0.50 eV and ∼0.42 eV, respectively, and agree well with theoretical estimated bandgap of corresponding InAs crystal phases. A blue shift in PL emission peak energy was found with decreasing nanowire diameter. The controlled wurtzite and zincblende crystal phase and its associated heterostructure growth of InAs nanowires on Si may open up new opportunities in bandgap engineering and related device applications integrated on Si. Furthermore, this work also illustrates that Bi as a surfactant could play a dynamic role in the growth mechanism of III-V compound semiconductors.

A review on III-V compound semiconductor short wave infrared avalanche photodiodes.

The on-chip avalanche photodiodes (APDs) are crucial component of a fully integrated photonics system. Specifically, III-V compound APD has become one of the main applications of optical fiber communication reception due to adaptable bandgap and low noise characteristics. The advancement of structural design and material choice has emerged as a means to improve the performance of APDs.Therefore, it is inevitable to review the evolution and recent developments on III-V compound APDs to understand the current progress in this field. To begin with, the basic working principle of APDs are presented. Next, the structure development of APDs is briefly reviewed, and the subsequent progression of III-V compound APDs (InGaAs APDs, AlxIn1-xAsySb1-y APDs) is introduced. Finally, we also discuss the key issues and prospects of AlxIn1-xAsySb1-y digital alloy avalanche APDs that need to be addressed for the future development of ≥2µm optical communication field.

Heterogeneously integrated membrane III-V compound semiconductor devices with silicon photonics platform

Silicon photonics is a key technology for constructing large-scale photonic integrated circuits (PICs) because it enables large-scale wafer processes with high uniformity and quality. To further improve device characteristics, heterogeneous integration of III-V compound semiconductors that provide optical gain, a high modulation efficiency, and optical non-linearity is desired. This paper describes the heterogeneous integration of membrane III-V compound semiconductor photonic devices that have a similar structure including thickness and refractive index. These devices provide efficient optical coupling with a Si waveguide using a simple taper waveguide structure. If the total thickness of the film structure is designed to be less than the critical thickness (calculated to be 430 nm for fabrication conditions such as bonding and growth temperatures), high-quality epitaxial layers can be grown on a thin InP layer directly bonded to the Si substrate. Therefore, regrowth techniques are employed on bonded InP layer on SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /Si substrate. We fabricate two kinds of laser-integrated Mach-Zehnder modulators using epitaxial regrowth on Si substrates. One uses Si phase modulators, and the other uses InP-based modulators. A micro-transfer-printing technology is also important when the number of III-V devices is relatively small. Furthermore, the micro-transfer-printing technology enables devices to be selected that meet the required characteristics before integration. For this purpose, we try to integrate a membrane laser on a Si substrate, in which the membrane laser is fabricated on InP substrate. The device shows a threshold current of 0.8 mA when the active region length is 140 μm. Finally, we briefly describe a transmission module, in which directly modulated membrane lasers and electronic drivers are integrated by flip-chip bonding through Au bumps. To reduce power consumption, it is important to design driver circuits that incorporate semiconductor lasers as electronic components. We demonstrate a 2-channel 53-Gbit/s 4-level pulse amplitude modulation (PAM4) transmitter front-end consisting of a 2-channel PAM4 shunt laser driver and 2-channel O-band directly modulated membrane lasers. The total power consumption is only 60.7 mW, resulting in 0.57 mW/Gbit/s.

Phase diagram prediction and high pressure melting characteristics of GaN

The III-V compound semiconductor, GaN, has become an excellent semiconductor material for developing the high-frequency and high-power electronic devices because of its excellent characteristics, including large band width, high thermal conductivity and fast electron saturation rate, and has received extensive attention in recent years. However, the decomposition temperature of GaN is lower than the melting temperature, some of its fundamental properties, such as melting temperature and high temperature phase transition pressure, are still unclear, and so, now the investigation of fundamental properties dominates the whole process of this material from development to mature applications. In the present work, the classical molecular dynamics simulations combined with the first-principles calculations and lattice dynamics methods are adopted to predict the phase diagrams of GaN with wurtzite and rocksalt structures in a pressure range of 0–80 GPa. The phase transition pressures, 44.3 GPa and 45.9 GPa, obtained from the first-principles calculations and molecular dynamics simulations from wurtzite to rocksalt structure in GaN at zero temperature, are in agreement with the available experimental results (Sadovyi B, et al. &lt;ext-link ext-link-type="uri" xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://doi.org/10.1103/PhysRevB.102.235109"&gt;2020 &lt;i&gt;Phys. Rev. B&lt;/i&gt; &lt;b&gt;102&lt;/b&gt; 235109&lt;/ext-link&gt;). The melting temperature at 0 GPa is 2295 K obtained by extrapolating the GaN melting curve of the wurtzite structure. With the pressure increasing to 33.3 GPa, the melting curve of wurtzite structure in GaN intersects with the melting curve of rocksalt structure, and the melting temperatures of both structures increase with pressure increasing. It is found that GaN may have a superionic phase and the superionic phase transition occurs in the wurtzite structure at pressures greater than 2.0 GPa and temperatures above 2550 K, whereas the rocksalt structure undergoes a superionic phase transition at pressures and temperatures higher than 33.1 GPa and 4182 K, respectively, and both of the phase transition temperatures increase with pressure increasing. The slope of the phase boundary line of GaN is positive at high temperatures and gradually changes into a curve with a negative slope as the temperature decreases.

III-V compound semiconductor membrane quantum well waveguide lasers emitting at 1 μm

We demonstrate epitaxially grown semiconductor membrane quantum well lasers on a SiO2/Si substrate lasing in a waveguide configuration, for potential uses as coherent light sources compatible with photonic integrated circuits. We study the emission characteristics of In0.13Ga0.87As/GaAs0.94P0.06 quantum well lasers, by using real and reciprocal space imaging. The laser cavity length is 424 μm, it emits light at 1 μm, and lasing thresholds as low as 211 mW were recorded. Control over the position and size of the laser spots by the pump was demonstrated.

Doping Profiles in Ultrathin Vertical VLS-Grown InAs Nanowire MOSFETs with High Performance.

Thin vertical nanowires based on III–V compound semiconductors are viable candidates as channel material in metal oxide semiconductor field effect transistors (MOSFETs) due to attractive carrier transport properties. However, for improved performance in terms of current density as well as contact resistance, adequate characterization techniques for resolving doping distribution within thin vertical nanowires are required. We present a novel method of axially probing the doping profile by systematically changing the gate position, at a constant gate length Lg of 50 nm and a channel diameter of 12 nm, along a vertical nanowire MOSFET and utilizing the variations in threshold voltage VT shift (∼100 mV). The method is further validated using the well-established technique of electron holography to verify the presence of the doping profile. Combined, device and material characterizations allow us to in-depth study the origin of the threshold voltage variability typically present for metal organic chemical vapor deposition (MOCVD)-grown III–V nanowire devices.