Hold Circuit Research Articles

A 1-GSample/s 10-b full Nyquist silicon bipolar Track&Hold IC

This article gives a detailed presentation of an all-npn silicon bipolar Track&Hold IC for 10-b operation up to 1 GSample/s under full Nyquist conditions. Circuit techniques were implemented to reduce the pedestal, hold-mode feedthrough, and droop errors. An experimental Track&Hold IC was fabricated in a 25-GHz-f/sub T/, 0.4-/spl mu/m-emitter-width single-poly base silicon bipolar production technology. Each of the Track&Hold circuits in this IC consists of 103 active devices and consumes 490 mW from a single supply voltage, including bandgap-references and input buffers.

Error suppressing encode logic of FCDL in a 6-b flash A/D converter

A 6-b, 166-Ms/s BiCMOS flash A/D converter was fabricated using a folded cascoded differential logic (FCDL). This FCDL reduces glitch errors caused by comparator metastability and improves encoder operation speed. The measured error rates of a chip implemented in a 0.7-/spl mu/m, f/sub t/=12 GHz BiCMOS was less than 10/sup -10/ times/sample. Without power-consuming highspeed track and hold circuit, the FCDL achieved low error rate and low power consumption of 505 mW at a 5.0-V power supply.

Control system for three-phase active power filter which simultaneously compensates power factor and unbalanced loads

The effectiveness of an active power filter depends basically on three characteristics: (a) the modulation method used; (b) the design characteristics of the PWM modulator; and (c) the method implemented to generate the reference template. For the last characteristic there are many methods, most of them complicated and hence difficult to implement and adjust. In this paper, a new method, which has simplicity at its main characteristic, is presented. The method is based on sample and hold circuits, synchronized with the peak value of the phase-to-neutral mains voltage. This method is useful for shunt active power filters and is capable to eliminate harmonics, compensate power factor, and correct unbalance problems simultaneously. It also has the ability to slow-down sudden transient changes in the load. Experimental results, with the reference template obtained with the method, are presented in the paper.

10 bit 200 MSPS GaAs BiFET sample and hold circuit

A GaAs BiFET sample and hold circuit has been implemented and evaluated. SINAD (signal to noise and distortion) was measured to be ~60 dB, but was limited by the test setup. The device accepts a differential input and produces a differential output. The S/H is clocked differentially at rates of up to 200 MHz. 12 bit performance was expected from SPICE simulations. Despite our test setup limitations, 10 bit performance was observed at 200 MSPS with an input signal frequency of 198 MHz.

A low-power, CMOS peak detect and hold circuit for nuclear pulse spectroscopy

A low-power CMOS peak detecting track and hold circuit optimized for nuclear pulse spectroscopy is presented. The circuit topology eliminates the need for a rectifying diode, reducing the effect of charge injection into the hold capacitor, incorporates a linear gate at the input to prevent pulse pileup, and uses dynamic bias control that minimizes both pedestal and droop. Both positive-going and negative-going pulses are accommodated using a complementary set of track and hold circuits. Full characterization of the design fabricated in 1.2 /spl mu/m CMOS including dynamic range, integral nonlinearity, droop rate, pedestal, and power measurements is presented. The circuit operates with only 250 /spl mu/w for input pulses with 7 /spl mu/s peaking time. Power consumption was increased to 750 /spl mu/w for driving off-chip and test system capacitances. Analysis and design approaches for optimization of operational characteristics are also discussed. >

Design and evaluation of an optically triggered monolithic sample and hold circuit using GaAs MESFET technology

The design and evaluation of an optically triggered, fully integrated sample and hold circuit (OS/H) is described. Measured results are presented that demonstrate operation of this circuit at 250 Ms/s and with effective resolution approaching 8 bits. The integrated circuit, which measures 2.1 mm/spl times/1.4 mm, is realized in -1.0-V threshold, 20-GHz ft GaAs MESFET technology, consumes approximately 200 mW of power, and requires one optical address. The OS/H will find applications in high precision, hybrid, and integrated signal processing systems where high speed, high levels of parallelism, and low timing jitter are important. Measured results of a series photoconducting (Auston switch) OS/H realized in the same technology are presented for comparison purposes.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Principle and applications of an autocharge-compensated sample and hold circuit

This paper describes an autocharge-compensated sample and hold circuit (ACC-SH) for thin film transistor active matrix liquid-crystal displays (TFT-AM-LCD's, TFT-LCD's, or LCD's). The operating principle and actual application problems for TFT-LCD's are also discussed. The applicability of the ACC-SH is verified not only by circuit simulation but also by experimental circuit die measurement. >

Differential MSM photoconductive-switch-typesample and hold circuit for reducing signal feedthrough

An MSM photoconductive-switch-type sample and hold circuit having a differential configuration is proposed. Signal feedthrough, which has been one of the most serious problems with the conventional MSM-S/H, is reduced to a common mode signal in this configuration. An experimental comparison between the proposed MSM-S/H and conventional circuits demonstrates that the signal feedthrough is improved from 6% of signal amplitude to less than 1% under the experimental conditions for a 10.2 MHz input.

A CMOS peak detect sample and hold circuit

In pulse electronics systems, like particle calorimeters, circuits that can hold the peak value of a signal are important links. The desire of integrating complete particle detection systems on a single IC requires compact and low power peak detect sample and hold circuits (PDSH). In this paper, a PDSH architecture is presented which is especially designed for CMOS integration.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A simplified method for selecting a carbon-fiber electrode in pulse voltammetry

A method for selecting a usable carbon-fiber electrode using the equivalent resistance and capacitance is presented. This method uses an instrument with a PC-based look-up table for measuring the electrical characteristics of a carbon-fiber electrode in pulse voltammetry. Using this instrument, the equivalent resistance and capacitance of the carbon-fiber electrode in saturated sodium chloride solution can be obtained. This instrument includes a decade resistance box, a peak current detection and hold circuit, a half peak comparator and a decay duration counter. A look-up table is established by using RC circuits to emulate the electrochemical reaction of the carbon-fiber electrode in pulse voltammetry. The equivalent resistance is obtained from the decade resistance box according to Kirchhoff's law. Then the equivalent capacitance is determined from the decay duration counter reading and equivalent resistance with the look-up table via a PC interpolation program. After obtaining the equivalent resistance and capacitance of an electrode, the values are compared with the usable thresholds. This method provides an effective quality evaluation index of carbon-fiber electrode for the user in order to reduce electrode-induced experimental failure. The method is also available for other kinds of carbon-fiber electrodes as long as their look-up table and desired thresholds are established.

A monolithic CMOS 16 channel, 12 bit, 10 microsecond analog to digital converter integrated circuit

A monolithic CMOS 16-channel, 12-b, 10- mu s analog-to-digital converter has been designed and tested. The circuit converts 16 channels in parallel via a single slope ramp and Gray code counter algorithm. When biased for 10.0 mu s conversions of a 2-V input range into 4050 voltage bins, and ohmically connected to a computer, initial testing shows that typical performance is a noise level of 0.3 bins rms, an integral nonlinearity of 4 bins, adjacent channel crosstalk effects of less than 1 bin, and a total chip power consumption of 110 mW. The chip contains 16 sample and hold circuits, out of range logic, a Gray-to-binary converter, and tri-state data outputs for microprocessor compatibility. The die size is 4.4 by 1.5 mm in a 2 polysilicon, 1.2- mu m feature size CMOS process, and has 52 bonding pads. Off-chip requirements are a single power supply, a single high speed clock, a precision voltage reference, three biasing resistors, and supply filtering capacitors. This custom circuit has advantages of lower power dissipation and less PC board area than competitive approaches, and is designed for further monolithic system integration. Design details and test results are presented. >

Peak hold monolithic integrated circuit with built-in shaping amplifier for hard X-ray detector

A peak hold monolithic integrated circuit, a pulse shape discriminator (PSD), was designed and fabricated for a hard X-ray telescope of a well-type phoswich counter: Welcom-2. It will be loaded in an X-ray astronomical satellite, the Deep Universe Exploring Telescope (DUET). In order to fit the small area of the satellite, this PSD is manufactured by using a semi-custom bipolar junction transistor LSI. The circuit consists of two shaping amplifiers (100 and 500 ns), with peak hold circuits: a low level threshold comparator with a latch; a high level comparator; an auto reset circuit; and an input signal suppress circuit. Requirements for satellite use such as low power consumption under 200 mW/channel were satisfied. The circuit design and circuit analysis of the PSD have been carried out using the SPICE package. A quantitative measurement of the sample chips was carried out. The integral nonlinearity was measured to be less than 0.2% range, and the drop rate of the peak hold circuit was measured to be 0.2%/ mu s. >

Recent Developments in Digital Control Theory

Recent, reasearches on application of nonconventional digital controllers are surveyed, Here, nonconventional digital controllers mean digital controllers equipped with general hold circuits, general samplers or periodically time-varying discribe-time compensators, and include multirate digital controllers as a spcial case, First, their basic features ane studied. Then, their advantages pitfalls, and limitation are explained. After that, the problem: “when and how to use nonconventional digital controllers?” is considered. The scope is limited to the control problems of time-invariant continuous-time plants, emphasis is placedon explaining the basic aspects of reasearches and clarifying their interrelations.

A new device for determination of arrival direction of large EAS

The design, fabrication and development of a fast timing circuit suitable for recording time difference of nonosecond order between the input pulses have been described. The system consists of a three channel device based on three sample and hold (S/H) circuits and a coincidence unit, and is found to be much less expensive. The circuit has a time resolution better than three nonoseconds. The circuit developed will be useful in the field of cosmic ray research involving investigation on arrival direction of high energy inclined cosmic ray showers.

5038785 Cardiac and respiratory monitor with magnetic gradient noise elimination

A magnetic resonance imaging apparatus (A) generates a uniform magnetic field, causes gradient fields transversely thereacross, excites resonance in nuclei within the image region, receives radio frequency signals from resonating nuclei, and reconstructs images representative thereof. Electrodes (30) monitor the cardiac cycle of a patient (B) being imaged and an expansion belt (32) monitors the respiratory cycle. During a magnetic resonance imaging scan, noise signal wave forms or spikes are superimposed on the cardiac cycle signal. A noise spike detector detects noise spikes. Specifically, a comparator (48) compares each wave form received from the electrodes with properties of a cardiac signal, such as the slope. When the comparator determines that a noise wave form is being received, it gates a track and hold circuit (52). The track and hold circuit passes the received signal except when gated by the comparator. When gated by the comparator, the track and hold circuit continues to supply the same output amplitude as it had in the beginning of the gating period. A filter (54) smooths the plateaus in the cardiac signal formed as the noise signal wave forms are removed.

Optically triggered monolithic sample and hold circuit

A novel, optically triggered, fully integrated sample and hold circuit (OS/H) is described, and measured results are presented which demonstrate operation of this circuit at 250 Msample/s. This OS/H will find applications in signal processing systems where high speed, high levels of parallelism and low jitter are important. >

WA 80 BGO calorimetry electronics

The authors describe instrumentation designed for BGO scintillator-based calorimetry of particles covering a very wide range of energies (from less than 50 MeV to 50 GeV). The instrumentation was designed to have a measurement accuracy of 0.1% over as much of the energy range as possible so that the energy resolution of BGO would be the limiting factor. Two 1.5-cm/sup 2/ photodiodes were used per 2.5-cm*2.5-cm*25-cm BGO crystal. Both a charge-sensitive preamplifier and a pulse processor were developed specifically for the needs of the WA80 experiment. The preamplifier was designed for high detector capacitance (100 to 700 pF), low integral and differential nonlinearity, and low power consumption (200 mW). The pulse processor is a time-invariant shaping amplifier with integral peak-detect-and-hold and automatic gain selection circuits. The amplifier uses quasi-triangular shaping with 4- mu s peaking time, and the hold circuit is gated with a fast level trigger. The system has more than 20 b of effective resolution when used with an external 12-b ADC (analog-to-digital converter). Preliminary results from beam tests at CERN are presented. >

A high performance peak-detect and hold circuit for pulse height analysis

Peak extractor circuits are an important link in most pulse-height analysis systems. A novel architecture with performance exceeding previous state-of-the-art designs is presented. A droop rate ranging from 125 mu V/ mu s and a charge injection of 5 mV are reported along with a 2.2 MHz bandwidth, a 38 V/ mu s slew rate, and integral nonlinearity of 50 PPM. The low droop rate allows temporary storage of the signal in an analog FIFO (first-in first-out) with minimal peak broadening, suitable for high-resolution low-energy X-ray analysis. This configuration has been implemented in an analog-to-digital converter system using the peak-detect and hold circuit architecture. The complete system had a differential linearity of 1.5% at 64 K conversion gain, an integral linearity of +or-0.016%, and an effective conversion time of 1.9 mu s for a count rate of 210000 C/s to the input of a pulse processor producing 3- mu s-wide pulses.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Digital signal processor for providing timbral change in arbitrary audio signals

An audio signal processor in which the harmonic content of the output signal (Figure 3g) varies with the amplitude of the input signal (Figure 3a). The preferred embodiment includes an analog to digital converter (102), a sample and hold circuit (101), timing circuits (106), a RAM look-up table (103) for performing non-linear transformation, a digital to analog converter (104) and a post filter (105) from which processed analog audio is output.

Linear image sensor with high performance and large photosensitive element

A linear image sensor with high performance and large photosensitive element has been developed, which integrates photosensors, a shift register, address switches, a charge-sensitive amplifier and a sample and hold circuit. This linear image sensor has a high sensitivity with an on-chip charge-sensitive amplifier and good stability in the ultraviolet spectral region using the most suitable process design. It has 1024 photoelements, each 2.0 mm×25 μm, giving a total active area of 2.0 mm×25.6 mm. This sensor has been demonstrated experimentally to exhibit excellent performance, such as a high responsivity (120 V/lx s), a wide dynamic range ( > 80 dB), low dark current (<0.1 pA/element), low power dissipation (<3.0 mW), excellent linearity (< ±0.3%) and good stability in the UV spectral region.