High Voltage Blocking Capability Research Articles

Monolithic Bidirectional WBG Switches Rekindle Power Electronics Technology [Expert View

There are numerous mass volume power applications where it is necessary to control the flow of bidirectional power, including electric vehicles (vehicle to grid, vehicle to home, and vehicle to vehicle), distributed and grid-tie power systems using regenerated energy and/or energy storage components, and solid-state circuit breaker protection. Silicon carbide (SiC) and gallium nitride (GaN) based bidirectional power switches can enable these applications with their compelling advantages of high efficiency, high blocking voltage capability, and low system weight and volume. In particular, monolithic switches that allow for bidirectional symmetric conduction and voltage blocking with a chip area close to that of a similarly rated unidirectional switch are ideally suited to fuel a revolution in power electronics technology.

Cascaded SiC JFET Topology for High-Voltage Solid-State Circuit Breaker Applications

With evolving landscape of direct current (DC) power transmission and distribution, a reliable and fast protection against faults is critical. High performance DC solid-state circuit breakers (SSCBs) can be designed using silicon carbide (SiC) junction field-effect transistors (JFETs), which utilize the device's intrinsic normally-ON characteristic and low ON-resistance. However, for SSCB that require high-voltage (HV) blocking capability, a proper number of JFETs need to be connected in series to achieve the desired voltage blocking rating. It has been conventional to add a controlling normally-OFF transistor, such a metal-oxide-semiconductor field-effect transistor (MOSFET), resulting in a circuit with normally-OFF behavior. However, disparities both in the voltage rating and in the ON-resistance between MOSFETs and JFETs tend to complicate the circuit design, and physically, they may lead to serious localized thermal stresses. A significant challenge remains with ensuring equal voltage balancing across the JFETs during the switching transitions as well as the blocking stage as it is crucial to prevent permanent damages from over-voltage stresses. Therefore, this article presents a new switch topology, in which a cascaded JFET configuration is operated without using a control MOSFET or other added control device. The dynamic voltage balancing network to synchronize both the JFETs' turn ON and OFF intervals is described analytically. Moreover, a novel static voltage balancing network is proposed to establish equal sharing of the total blocking voltage across the series connection of JFETs while maintaining low power loss.

Active Gate Driver With Turn-off Delay Control for Voltage Balancing of Series–Connected SiC MOSFETs

Connecting semiconductor switches in series is a way to increase the voltage rating of a power electronic converter. However, if two switches are directly connected without any special effort, an uneven voltage between the switches can occur due to nonidentical characteristics of them. A significant voltage imbalance may destroy the switches, and both thermal and loss imbalance also lead to the unstable system. Since a silicon carbide (SiC) metal–oxide–semiconductor field–effect transistor ( <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> ) has a faster switching speed and higher voltage blocking capability than silicon (Si) devices, existing voltage balancing methods for Si devices may not be suitable. This article proposes a voltage balancing method that controls turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> delay time of the switch by adding one bipolar junction transistor (BJT) on a gate turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> path. Depending on the base voltage of the BJT, turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> resistance and delay time are actively changed which mitigates the imbalance problem. The theoretical analysis of the proposed method has been discussed in detail based on the classical <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> model. Both the simulations and experiments have been performed to verify the theory and the validity of the proposed method where the voltage imbalance is reduced from 22.4% to 3.2% as well as reducing the switching loss at the entire voltage and load conditions.

GaN HEMTs on low resistivity Si substrates with thick buffer layers for RF signal amplification and power conversion

We report GaN high-electron-mobility transistors (HEMTs) with a thick (7.7 µm) GaN buffer on a Czochralski low resistivity Si (LRS) substrate. The GaN HEMTs exhibit high performance for both radio-frequency (RF) amplification and power conversion. The thick GaN buffer was grown by means of vacancy engineering, delivering a low dislocation density of ∼1.6 × 108 cm−2, contributing to suppressed RF signal coupling to the lossy Si substrate and a high vertical voltage blocking capability. For RF performance, GaN HEMTs with a 650 nm gate exhibit an fT/fMAX value of 25.1/32.3 GHz and a maximum output power POUT of 2.2 W/mm at 4 GHz with a drain voltage VDS of 20 V, which is comparable with the performance of RF GaN HEMTs on a high-resistivity silicon substrate without the existence of the field plate. For power performance, the vertical breakdown voltage of the wafer is 1160 V, and the three-terminal lateral breakdown voltage is 885 V in a GaN HEMT with a gate-to-drain distance of 8 µm. The thick GaN layer on the LRS substrate scheme thus provides a compelling platform for monolithic integration of high-performance RF devices and high-voltage power devices.

Formation of highly vertical trenches with rounded corners via inductively coupled plasma reactive ion etching for vertical GaN power devices

A trench-gate metal-oxide-semiconductor field-effect transistor (T-MOSFET) has great potential for use in gallium nitride (GaN)-based vertical power switching devices owing to its high blocking voltage and high current capability. To form an optimal trench shape that has highly vertical sidewalls and rounded corners, we developed a dry-etching technique using inductively coupled plasma reactive ion etching (ICP-RIE). A highly vertical trench was obtained by including SiCl4 reactive gas mixed with Cl2 gas in the ICP-RIE process, where Si-related byproducts suppressed the etching of the sidewall and allowed selective etching in the vertical direction. We found that the optimization of the bias power was a key to suppress the formation of subtrenches and to avoid an isotropic etching mode. The optimal etching condition leads to natural formation of rounded corners at the trench bottom. In addition, a multistep-bias etching technique was applied to reduce etching-induced damage. Cross-sectional transmission electron microscopy images revealed that lattice distortion on the sidewall surface was eliminated by multistep-bias etching. Based on the rectification properties of the Schottky barrier diodes formed on the trench sidewalls, the Schottky barrier height was comparable to the not-etched surfaces. This indicates that the gap states caused by etching-induced damage can almost be eliminated in the multistep-bias process. The proposed technique is suitable for GaN-based vertical T-MOSFETs.

A Normally-off Copackaged SiC-JFET/GaN-HEMT Cascode Device for High-Voltage and High-Frequency Applications

A 1200-V/100-mΩ silicon carbide (SiC) junction field-effect-transistor (JFET)/ gallium nitride (GaN) high-electron-mobility-transistor (HEMT) hybrid power switch is demonstrated, which features a flip-chip copackaged cascode configuration incorporating a vertical SiC JFET and a lateral GaN-HEMT. The high-voltage SiC-JFET provides the high-voltage blocking capability while the low-voltage GaN-HEMT enables the normally- off gate control with superior switching characteristics. Compared to conventional SiC-JFET/Si- mosfet cascode devices, the SiC-JFET/GaN-HEMT cascode device exhibits fast switching speed, which has been validated by systematic characterizations including static/dynamic device-level measurements and board-level hard-switching tests. Meanwhile, the device is free from several notorious issues of high-voltage GaN power transistors such as dynamic on -state resistance degradation and threshold voltage shift. Such a wide-bandgap semiconductor-based hybrid switch is suitable to be deployed in high-power and high-efficiency power conversion systems.

Cascode GaN/SiC: A Wide-Bandgap Heterogenous Power Device for High-Frequency Applications

Wireless power transfer systems and plasma generators are among the increasing number of applications that use high-frequency power converters. Increasing switching frequency can reduce the energy storage requirements of the passive elements that can lead to higher power densities or even the elimination of magnetic cores. However, operating at higher frequencies requires faster switching devices in packages with low parasitics. Wide-bandgap (WBG) power devices, such as gallium nitride (GaN) and silicon carbide (SiC) devices, have high-critical fields and high-thermal conductivity that make them good candidates for efficient high-voltage and high-frequency operations. Commercially available GaN and SiC devices have ratings targeting different applications. Lateral GaN devices dominate in lower voltage ( $C_{\text{oss}},C_{\text{iss}}$ ), which make them easy to drive at high frequencies. On the other hand, vertical SiC devices are often used in high-voltage and low-frequency applications since they have higher blocking voltages and larger gate charge than their GaN counterparts. As a result, SiC devices usually require high power and complicated gate drive circuitry. Recent work shows that in both GaN and SiC devices, losses in device $C_{\text{oss}}$ can exceed the conduction losses at high-switching frequencies and relatively high voltages under zero-voltage-switching conditions. Moreover, the $C_{\text{oss}}$ energy loss ( $E_{\text{oss}}$ ) per switching cycle increases with frequency in GaN devices but remains roughly independent of frequency in SiC devices. This means that at high frequencies, SiC devices can be preferable due to their smaller $C_{\text{oss}}$ energy loss even when taking into consideration the complexity of the gate drive circuit. In this article, we present a WBG high-voltage cascode GaN/SiC power device, combining the advantages of both a GaN and an SiC device—namely, simple gate drive requirements, $E_{\text{oss}}$ loss per cycle roughly independent of frequency, and relatively high-voltage blocking capability. Comparing this cascode GaN/SiC device with an SiC mosfet and a SiC junction gate field-effect transistor of similar voltage ratings and $R_{ds,{\text{ON}}}$ , we find that the inverter using the cascode GaN/SiC device has the highest efficiency and simplest auxiliary gate drive circuitry. Finally, integrating the cascode GaN/SiC device has the potential benefits of achieving lower $C_{\text{oss}}$ losses, higher device ratings, and better heat removal capability.

(Invited) Ag Sinter Joining Technology for Different Metal Interface (Au, Ag, Ni, Cu, Al) in Wide Band Gap Power Modules

Wide-bandgap (WBG) semiconductor materials are expected to be widely utilized in next-generation power devices as modules to replace Si-based devices owing to their higher voltage-blocking capability, higher temperature operation, and switching frequencies, as well as their reduced power loss [1][2]. In WBG devices, die-attached materials that bond WBG dies to substrates are crucial for maintaining high performances in environments reaching 250 °C [3]. Conventional die bonding materials, such as Pb-5Sn solder [4], Au-Sn solder [5], and Bi-based solder [6], are not suitable for use in next-generation packaging because cracks can form at the intermetallic solder interface in high-temperature environments . One of the promising alternative approaches is Ag sinter joining technology, which allows for a sintering temperature below 300 °C at low pressure. As the melting point of Ag is higher than 900 °C, Ag sinter joining can be used in high-temperature environments exceeding 250°C .The quality of die-attach by Ag sinter joining depends on the bond-line cohesion from Ag sintering and interfacial adhesion from atomic inter-diffusion. Therefore, the bonding quality depends on the surface finish such as its chemistry and microstructure, on both device and substrate . Usually, electro-plated Ag, electroless-plated Ni(P)/Ag, electro- and electroless-plated Ni(P)/Au is used as surface finish layer for sinter Ag joining. On the other hand, the electro- and electroless-plated Ni(P) technology was well developed and used widely, which can achieve a sufficient resin adhesion resulting from the chemical interaction between the base metal Ni and the resins. However, this additional metallization layer increase costs due to the additional raw materials and processing steps. Ag paste-based, die-attachments on a bare the direct bonded copper (DBC) substrate or direct bonded aluminum (DBA) seems an ideal option due to reduced cost and a simplified process .Here we report a robust joint by Ag sinter joining technology for different metal interface (Au, Ag, Ni, Cu, Al) in wide band gap power modules. Micron-scale Ag flakes (AgC239, Fukuda Metal Foil, and Powder Co. Ltd, Japan) were used as the Ag fillers. The thermal behaviors and morphology of the Ag paste sintered at different temperatures were firstly studied to understand the sintering behavior of the prepared Ag paste. Sinter Ag joint structure for different metal interface was implemented by a sintering process under temperatures of 250 °C in air without pressure. In addition, each sinter Ag joint structure was investigated to obtain a comprehensive understanding for different metal interface bonding. A possible mechanism was proposed based on the SEM and TEM observation of the cross-sectional part of each sinter Ag joint structure.Fig. 1 shows the sinter Ag joint structure for Ag metallization metal interface, and the die shear strength of sinter Ag joint structure for different metal interface. Sintered Ag shows a microporous network structure and bonding well with the Ag metallization layer at the both SiC chip and substrate side. The die shear strength of each sinter Ag joint structure is larger than 25 MPa which comparable with the value of traditional Sn–Pb solders (19~24MPa. This study helps to understand the Ag sinter joining for different metal metallization interface, enlarger the Ag sinter joining for wide band-gap power modules in high temperature applications. ACKNOWLEDGMENTS This work was supported by the JST Advanced Low Carbon Technology Research and Development Program (ALCA) project “Development of a high frequency GaN power module package technology” (Grant No. JPMJAL1610). The author is thankful to the Network Joint Research Centre for Materials and Devices and Dynamic Alliance for Open Innovation Bridging Human, Environment and Material.

Performance Evaluation of High-Power SiC MOSFET Modules in Comparison to Si IGBT Modules

The higher voltage blocking capability and faster switching speed of silicon-carbide (SiC) mosfet s have the potential to replace Si insulated gate bipolar transistors (IGBTs) in medium-/low-voltage and high-power applications. In this paper, a state-of-the-art commercially available 325 A, 1700 V SiC mosfet module has been fully characterized under various load currents, bus voltages, and gate resistors to reveal their switching capability. Meanwhile, Si IGBT modules with similar power ratings are also tested under the same conditions. From the test results, several interesting points have been obtained: different to the Si IGBT module, the over-shoot current of the SiC mosfet module increases linearly with the increase of the load current and it has been explained by a model of the over-shoot current proposed in this paper; the induced negative gate voltage due to the complementary device turn- off (crosstalk effect) is more harmful to the SiC mosfet module than the induced positive gate voltage during turn- on when the gate off-voltage is –6 V; the maximum dv / dt and di / dt (electromagnetic interference) during switching transients of the SiC mosfet module are close to those of the Si IGBT module when the gate resistance is larger than 8 Ω but the switching loss of the SiC mosfet module is much smaller; the switching losses of the Si IGBT module are greater than those of the SiC mosfet module even when the gate resistance of the former is reduced to zero. An accurate power loss model, which is suitable for a three-phase two-level converter based on SiC mosfet modules considering the power loss of the parasitic capacitance, has been presented and verified in this paper. From the model, a 96.2% efficiency can be achieved at the switching frequency of 80 kHz and the power of 100 kW.

A Novel Series-Connected Xenon Lamp Power Supply System Using a Pulse Trigger With Simmer Circuits for Pulsed Light Sintering Application

Conventional power supply systems for xenon lamps have only limited applicability in sintering, because sintering needs to drive the lamp itself as well as enable instantaneous and strong discharge of voltage and current for generating intense light. This implies that, for sintering applications, a method should be developed that would enable instantaneous and strong discharge of energy. In this paper, we propose a new xenon lamp sintering system with an additional capacitor charger and bank. The proposed system features three power supplies. Two power supplies, called the trigger and the simmer, ionize gaseous xenon using a 23-kV trigger pulse output and sustain the ionized xenon gas using a 2.5-kW simmer power supply. The used trigger is also specially designed to conduct high current through its transformer, and it makes the proposed system an outstanding high voltage blocking capability. Another 36-kW power supply charges a 130-mF capacitor bank with a high-efficiency resonant converter. In addition, some components such as the simmer blocking diode and the trigger output capacitor are introduced, because combining different power supplies causes operational problems. These components are analyzed with some circuits that show its features, and finally, the validity of the suggested system was confirmed in two steps. First, the simmer power supply and the capacitor charger were tested for the rated operating performance by using a resistive load condition. As a result, the rated operation of the simmer power supply was confirmed under the 2.5-kW output condition, and the efficiency of the capacitor charger was found to be greater than 96% at the rated 36-kW rated load condition. In addition, a pulse discharge current of 900 A was also observed with the equivalent resistor load through a pulsed discharge experiment of the capacitor bank, which was charged at 1500 V. The trigger power supply, whose equivalent resistive load was difficult to realize, was experimented directly using the real xenon lamp to check the stable trigger operation of the xenon lamp at its 23-kV output pulse voltage. After the verification using the resistive load condition, the real operation and performance of the combined xenon lamp power supply system that includes three kinds of power supplies were finally tested and verified by using the actual xenon lamp as a total system.

On-State Voltage Measurement of Fast Switching Power Semiconductors

The on-state resistance R ds,on is a key characteristic of unipolar power semiconductors and its value depends on the operating conditions, e.g. junction temperature, conducted current and applied gate voltage. Hence, the exact determination of the R ds,on value cannot rely on datasheet information and requires the measurement of current and on-state voltage during operation. Besides the determination of the conduction losses, the on-state voltage measurement enables dynamic R ds,on analysis, device temperature estimation, condition monitoring and consequently time-to-failure prediction. However, in contrast to a switch current measurement, several challenges arise in the design of an on-state voltage measurement circuit (OVMC), i.e. high measurement accuracy (mV-range) during on-state, high blocking voltage capability (kV-range) during off-state and fast dynamic response (ns-range) during switching transitions are demanded. Different OVMC concepts are known from IGBT applications, however, the more severe requirements introduced from the high switching frequency and low OV characterizing the operation of fast switching power semiconductors, prevent their usage. Off-the-shelf products hardly satisfy the mentioned specifications, whereas the performance of state-of-the-art OVM research prototypes require further investigations and/or improvements. With this aim, an innovative OVMC concept is designed, analyzed, calibrated and tested in this paper. Furthermore, the conduction losses of different power semiconductors are measured as function of their operating conditions to validate the performance and highlight the potential of the proposed OVMC.

Experimental Verification of a Self-Triggered Solid-State Circuit Breaker Based on a SiC BIFET

In this work, the feasibility of the Bipolar-Injection Field Effect-Transistor (BIFET) [5] in two different Dual Thyristor type circuits [4] for an application as solid-state circuit breaker (SSCB) is experimentally verified. The Dual Thyristor type circuits are assembled from discrete silicon JFETs and a silicon carbide BIFET and are electrically characterized at various temperatures. The current-voltage characteristic shows the expected regenerative self-triggered turn-off capability under over-currents and the option to control the turn-off current by a passive resistor network. The issue with the adverse positive temperature coefficient of the trigger-current can be solved by putting the SiC BIFET in a cascode arrangement with a silicon Dual Thyristor. In this configuration the SiC BIFET provides the high voltage blocking capability and the silicon Dual Thyristor with its negative temperature coefficient controls the trigger-current. Transient analyses of both circuits indicate fast switching times of less than 50 μs seconds. It is demonstrated for the first time, that the SiC BIFET, due to its normally-on behaviour, used in a Dual Thyristor type circuit is a promising concept for self-triggered fuses in high current and high voltage applications.

Optimum Number of Cascaded Cells for High-Power Medium-Voltage AC–DC Converters

For power electronic systems to interface medium-voltage grids, e.g., in future electric ships, usually cascaded cells converters need to be employed, whereby either few cells featuring power semiconductors with high blocking voltage capability or a larger number of cells using low-voltage (LV) semiconductors can be used. As shown in this paper, physics-inspired empirical models of the dependence of Insulated-Gate Bipolar Transistor (IGBT) power modules' loss-relevant characteristics on the blocking voltage enable an analytic optimization of the efficiency of a cascaded H-bridges (ac-dc) converter, which is complemented by a full efficiency versus power density ηρ-Pareto optimization. For a 10-kV grid, 1200V or 1700V are identified as optimum blocking voltages, resulting in a suitable trade-off between efficiency and power density. Significant efficiency and power density gains can be realized by replacing silicon IGBTs by LV silicon carbide (SiC) devices in multi-cell systems, whereas single-cell designs based on high-voltage SiC devices suffer from the high dv/dt and di/dt values required to limit switching losses. Reliability is analyzed considering redundancy, showing that the reliability of designs based on lower blocking voltages can be comparable with that of designs using higher blocking voltages, and hence fewer cells, if similar effort concerning additionally installed power capability is considered.

Guest Editorial Special Issue on Wide Bandgap Power Devices and Applications

Wide bandgap (WBG) power devices, e.g., silicon carbide (SiC) and gallium nitride (GaN)-based diodes, metal-oxide field-effect transistors (MOSFETs), junction gate field-effect transistors, bipolar junction transistors, insulated gate bipolar transistors (IGBT), high-electron-mobility transistors, etc., are poised to change the landscape of power electronics industry. Ideally, these devices are expected to have better efficiency, higher temperature tolerance, and higher voltage blocking capability than their silicon (Si) counterparts. Emerging applications of WBG devices include ultrahigh power density switching power supplies, high-temperature converters and inverters for automobiles, ships, and airplanes, medium-voltage and high-speed motor drives, voltage source converter-based high-voltage dc systems, high-frequency power supplies for medical devices and wireless charging, etc. But to achieve the expected superior system performance with WBG devices, innovations are needed not only in materials and devices but also in circuit topology, and systems design and optimization.

Package design and development of a low cost high temperature (250°C), high current (50+A), low inductance discrete power package for advanced Silicon Carbide (SiC) and Gallium Nitride (GaN) devices

The demands for high-performance power electronics systems are rapidly surpassing the power density, efficiency, and reliability limitations defined by the intrinsic properties of silicon-based semiconductors. The advantages of post silicon materials, including Silicon Carbide (SiC) and Gallium Nitride (GaN), are numerous, including: high temperature operation, high voltage blocking capability, extremely fast switching, and superior energy efficiency. These advantages, however, are severely limited by conventional power packages, particularly at temperatures higher than 175°C and &amp;gt;100 kHz switching speeds. In this discussion, APEI, Inc. presents the design of a newly developed discrete package specifically intended for high performance, high current (&amp;gt;50A), rapid switching, and extended temperature (&amp;gt;250°C) wide band gap devices which are now readily available on the commercial market at voltages exceeding 1200V. Finite element analysis (FEA) results will be presented to illustrate the modeling process, design tradeoffs, and critical decisions fundamental to a high performance package design. A low profile design focuses on reducing parasitic impedances which hinder high speed switching. A notable increase in the switching speed and frequency reduces the size and volume of associated filtering components in a power converter. Operating at elevated temperatures reduces the requirements of the heat removal system, ultimately allowing for a substantial increase in the power density. Highlights of these packages include the flexibility to house a variety of device sizes and types, co-packaged antiparallel diodes, a terminal layout designed to allow rapid system configuration (for paralleling or creating half- and full-bridge topologies), and a novel wire bondless backside cooled construction for lateral GaN HEMT devices. Specific focus was placed on minimizing the cost of the materials and fabrication processes of the package components. The design of the package is discussed in detail. High temperature testing of a SiC assembly and electrical test results of a high frequency GaN based boost converter will be presented to demonstrate system level performance advantages.

High Temperature Silicon Carbide Power Modules for High Performance Systems

The demands of modern high-performance power electronics systems are rapidly surpassing the power density, efficiency, and reliability limitations defined by the intrinsic properties of silicon-based semiconductors. The advantages of silicon carbide (SiC) are well known, including high temperature operation, high voltage blocking capability, high speed switching, and high energy efficiency. In this discussion, APEI, Inc. presents two newly developed high performance SiC power modules for extreme environment systems and applications. These power modules are rated to 1200V, are operational at currents greater than 100A, can perform at temperatures in excess of 250 °C, and are designed to house various SiC devices, including MOSFETs, JFETs, or BJTs.

High Temperature Silicon Carbide Power Modules for High Performance Systems

The demands of modern high-performance power electronics systems are rapidly surpassing the power density, efficiency, and reliability limitations defined by the intrinsic properties of silicon-based semiconductors. The advantages of silicon carbide (SiC) are well known, including high temperature operation, high voltage blocking capability, high speed switching, and high energy efficiency. In this discussion, APEI, Inc. presents two newly developed high performance SiC power modules for extreme environment systems and applications. These power modules are rated to 1200V, are operational at currents greater than 100A, can perform at temperatures in excess of 250 °C, and are designed to house various SiC devices, including MOSFETs, JFETs, or BJTs. One newly developed module is designed for high performance, ultra-high reliability systems such as aircraft and spacecraft, and features a hermetically sealed package with a ring seal technology capable of sustaining temperatures in excess of 400°C. The second module is designed for high performance commercial and industrial systems such as hybrid electric vehicles or renewable energy applications, implements a novel ultra-low parasitic packaging approach that enables high switching frequencies in excess of 100 kHz, and weighs in at just over 130 grams (offering ~5× mass reduction and ~3× size reduction in comparison with industry standard power brick packaging technology). It is configurable as either a half or full bridge converter. In this discussion, APEI, Inc. introduces these products and presents practical testing of each.

1200 V SiC vertical‐channel‐JFETs and cascode switches

AbstractWide band gap semiconductors like silicon carbide (SiC) are currently being developed for high power/temperature applications. Silicon carbide is ideally suited for power switching due to its high saturated drift velocity, its high critical field strength, its excellent thermal conductivity, and its mechanical strength. For power devices, the tenfold increase in critical field strength of SiC relative to Si allows high voltage blocking layers to be fabricated significantly thinner than those of comparable Si devices. This reduces device on‐state resistance and the associated conduction and switching losses, while maintaining the same high voltage blocking capability. The specific on‐state resistance of 4H‐SiC is approximately 400 times lower than that of Si at a given breakdown voltage. This allows for high current operation at relatively low forward voltage drop. In addition, the wide band gap of SiC allows operation at high temperatures where conventional Si devices fail. In this article, we will review Northrop Grumman's single‐implant no‐epitaxial‐regrowth vertical‐channel JFET. The feasibility of efficient 1200 V normally‐off VJFET operation will be investigated. The all‐SiC VJFET based cascode switch will be introduced and aspects of its operation evaluated. High temperature DC characteristics of VJFETs and 1200 V normally‐off cascode switches will be discussed. Finally, the development of large‐area high‐current 1200 V VJFETs and their edge termination performance will be presented. (© 2009 WILEY‐VCH Verlag GmbH &amp; Co. KGaA, Weinheim)

Progressive Development of Superjunction Power MOSFET Devices

The originally proposed superjunction (SJ) power MOSFET structure with interdigitated p-n columns is highly recognized for its higher voltage-blocking capability and lower specific on -state resistance. However, in practice, the performance of SJ devices is greatly handicapped due to difficulties in the formation of perfect charge-balanced p-n columns by the limitation of fabrication process technology, particularly, for devices with small p-n column widths at low voltage ratings. Recently developed structures of polysilicon-flanked and oxide-bypassed SJ MOSFETs are to overcome the conventional SJ device fabrication limitation. The follow-up development on extending the scope of these recently reported device structures to lateral SJ structures, which is suitable for SJ power integrated circuits, is reported for the first time. In this paper, detailed descriptions of the progressive development and the technical advancement of several SJ MOSFET structures are presented with both simulation and experimental results.

Design, tests and applications of 3.3 kV asymmetrical thyristor

This paper outlines the design, rating and applications of a 3.3 kV asymmetrical thyristor (ASCR) originally designed for crowbar application in power electronics. For high-voltage applications, the trade-off between the high-voltage blocking capability and the dynamic and steady-state characteristics becomes increasingly difficult to achieve for conventional thyristor structures. It is shown that for fast turn-on switch in pulse power applications, the asymmetrical design offers the best performance. Other fast switches such as GTOs and IGBTs can be used in pulse power applications. However, for the GTOs, the gate drive requirements are not simple and the IGBTs have peak current limitation. The preliminary characteristics of a new 3.3 kV ASCR is presented and by comparing with other fast switches, such as GTOs and IGBTs, ASCR is shown to have several performance advantages.