High Temperature Power Electronics Research Articles

Ga2O3/NiO junction barrier Schottky diodes with ultra-low barrier TiN contact

Power Schottky barrier diodes (SBDs) face an inherent trade-off between forward conduction loss and reverse blocking capability. This limitation becomes more severe for ultra-wide bandgap (UWBG) SBDs due to the large junction field. A high Schottky barrier is usually required to suppress the reverse leakage current at the price of an increased forward voltage drop (VF). This work demonstrates a Ga2O3 junction barrier Schottky (JBS) diode that employs the embedded p-type NiO grids to move the peak electric field away from the Schottky junction, thereby allowing for the use of an ultra-low barrier TiN Schottky contact. This JBS diode concurrently realizes a low VF of 0.91 V (at forward current of 100 A/cm2) and a high breakdown voltage over 1 kV, with the VF being the lowest in all the reported vertical UWBG power diodes. Based on the device characteristics measured up to 200 °C, we further analyze the power loss of this JBS diode across a wide range of operational duty cycles and temperatures, which is found to outperform the TiN/Ga2O3 SBDs or NiO/Ga2O3 PN diodes. These findings underscore the potential of low-barrier UWBG JBS diodes for high-frequency, high-temperature power electronics applications.

The advantages and short circuit characteristics of SiC MOSFETs

SiC MOSFETs have exhibited considerable benefits in high-frequency, high-voltage, and high-temperature power electronics applications with outstanding material attributes as a result of the rapid advancement of power electronics technology. SiC MOSFETs slower short-circuit tolerance and faster switching rates provide new issues for the short-circuit prevention technology. In the opening section of the study, Si and SiC MOSFETs are compared and evaluated using various models and parametric factors. It has been demonstrated that SiC MOSFETs outperform Si MOSFETs in a variety of conditions and applications. The many SiC MOSFET short-circuit failure types as well as their underlying theories are initially explained in the papers main body. In addition, it examines the fundamentals of short-circuit test procedures and SiC MOSFET test circuits. The issues and limitations of the currently available SiC MOSFET short-circuit protection technology are then explored, along with factors impacting the short-circuit of SiC MOSFETs that are thoroughly examined. Lastly, the SiC MOSFET short-circuit protection technology development trend is forecasted, and potential future areas for improvement and innovation are considered. SiC MOSFET short-circuit protection technology will be enhanced and optimized to satisfy the needs of efficient and dependable power electronic systems as technology advances and application requirements expand.

SiC Die Attach Based on Sintered for Wide Band Gap Semiconductor

Silver sintered die attach materials offer a new interconnect technology. Hybrid sintering die attach paste is resin-based and has the same application as standard die attach paste applications, but it does not require high pressure and high temperature for sintering. It features excellent workability that enables stable application for 24 continuous hours, without silver sedimentation or separation. Lead-free die attach materials that offer simplified processing, robust reliability and best-in-class thermal and electrical performance for high power semiconductor packages. SiC is next generation Wide Band Gap semiconductor material for high temperature power electronics for automotive and telecommunication. We would like to introduce a SiC die attach based on sintering solution for WBG packages. Features is thermal conductivity >200 W/m.k, pressure less die attach process, low temperature cure under nitrogen atmosphere, and any treated surface excellent adhesion to all treated surfaces.

Low-temperature packaging through Ag-Cu supersaturated solid solution nanoparticle paste for high-temperature power electronics

In this work, anti-oxidative single-phase Ag-Cu supersaturated solid-solution nanoparticles (Ag-Cu SS-NPs) were synthesized by a one-step method to serve as packaging materials for high-temperature power electronics. After sintering at 250 ℃ in air, a dense supersaturated structure with nano-sized Cu precipitates and coherent twins, high shear strength over 133 MPa and low resistivity (4.35 μΩ·cm) were obtained. Notably, the supersaturated structure with nano-sized Cu precipitates enhanced the thermomechanical properties and high-temperature stability. The high-temperature shear strengths of the sintered Ag-Cu joints reached remarkable 93.5 MPa at 300 ℃. Meanwhile, the room-temperature shear strength of the sintered Ag-Cu SS-NP joints after aging at 300 ℃ for 500 h was maintained at 98.7 MPa, doubling that of the sintered Ag joints. Hence, the Ag-Cu SS-NP paste presents excellent feasibility and potential for high-temperature power electronics.

High temperature viscoplastic deformation behavior of sintered nanocopper paste used in power electronics packaging: Insights from constitutive and multi-scale modelling

As a promising technology for high-power and high-temperature power electronics packaging, nanocopper (nanoCu) paste sintering has recently received increasing attention as a die-attachment. The high-temperature deformation of sintered nanoCu paste and its underlying mechanisms challenge the reliability of high-power electronics packaging. In this study, the tensile deformation behaviors of sintered nanoCu paste were firstly characterized by high-temperature tensile tests performed at various temperatures and strain rates ranging from 180 °C to 360 °C, 1 × 10−4 s−1 to 1 × 10−3 s−1 respectively. It was found that the elastic modulus and tensile strength decreased at the higher tensile temperature while the ductility increased accordingly. The highest elastic modulus and tensile strength results were 12.15 GPa and 46.97 MPa, respectively. Second, failure analysis was conducted based on the fracture surface after tensile testing. Recrystallization was revealed as the main factor for ductility improvement. Subsequently, an Anand model was fitted by stress-strain curves to describe the tensile constitutive behavior of the sintered nanoCu paste. Multi-scale modelling techniques also investigated the impact of tensile temperature and strain rate on the tensile response. Molecular dynamics simulation was implemented using a hemispherical Cu nanoparticle model to reveal the properties from an atomistic perspective. In addition, a two-dimensional equivalent model was further established by using a stochastically distributed void morphology. The multi-scale modelling techniques successfully describe the evolution of tensile response to the different tensile temperatures and strain rates. Besides, the equivalent model with random void morphology was demonstrated as the finite element simulation results were highly consistent with the high-temperature tensile experiments.

Multimodal microscopy of extended defects in β-Ga2O3 (010) EFG crystals

Beta-phase gallium oxide (β-Ga2O3) has attracted attention in recent years as a potentially low cost, large area substrate and active layer material for high power, high temperature power electronics and sensing devices. However, growth of β-Ga2O3 crystals is complicated by easily activated (100) and (001) cleavage planes, the presence of low angle grain boundaries (LAGBs) and twins, and the potential formation of polycrystalline grains. In this study, β-Ga2O3 crystals were grown by the edge-defined film-fed growth technique with an (010) principal face. Two crystals with apparently randomly formed high angle grain boundaries (HAGBs) were selected and analyzed by electron backscatter diffraction, electron channeling contrast imaging, and cathodoluminescence to investigate the nature of the LAGBs and the source of the HAGB formation. It was discovered that planar LAGBs lying parallel to the (010) plane exist in the region immediately preceding the start of an HAGB. Increased misorientation across the LAGB was observed, approaching the initiation of a new grain. We present multimodal microscopy characterization, correlating misorientation and variation in optoelectronic properties with LAGBs and the associated dislocations.

Laminated transient liquid phase preform and bond characterization for high-temperature power electronics application

Laminated transient liquid phase preform and bond characterization for high-temperature power electronics application

Review of High-Temperature Power Electronics Converters

Power electronics converters operating at elevated temperature usually have degraded performance, such as reduced efficiency, lower noise immunity, and decreased system reliability, compared to those operating at room temperature. Nevertheless, harsh-environment applications, such as deep earth drilling, automotive, avionics, and space exploration, have been utilizing converters in high-temperature environments and are continuously pushing the temperature limits higher and higher with the advances in device technologies and converter design methodologies. This article starts with a literature study to identify the temperature dependence and the temperature limits of individual components. Then, published works about high-temperature converters are examined. Their selection of components is compared. Experimental results are analyzed to reflect on the efficacy of different component selections. Finally, since the latest published high-temperature converter was developed more than five years ago, a 1-kV input, 520-V output, 1-kW, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$150$</tex-math></inline-formula> °C-ambient-temperature-rated dc–dc converter is designed with state-of-the-art devices. Based on the literature review, and the test of the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$150$</tex-math></inline-formula> °C prototype, the main challenges of designing high-temperature power electronics converters are identified and concluded to be time-consuming, difficult, and expensive characterization of components, lack of accurate and computationally efficient models of converters, and optimizing component selection within short development time.

Interdiffusion and formation of intermetallic compounds in high-temperature power electronics substrate joints fabricated by transient liquid phase bonding

Power electronics packages typically comprise a dielectric substrate bonded to a metal layer and attached to heat sinks using a low-thermal-conductivity solder. These multiple layers increase the effective thermal resistance of the package and are responsible for package failures under cyclic thermal loads. Bonding the aluminum nitride dielectric layer (AlN) directly to a low coefficient of thermal expansion (CTE) aluminum silicon carbide (AlSiC) cold plate using copper‑aluminum (Cu-Al) transient liquid phase (TLP) bonding has been shown to improve the mechanical reliability of the power electronic packages while making the package more compact by bringing the cooling solutions closer to the devices. This study aims to characterize the Cu-Al bonds formed during the TLP bonding of AlSiC with three different power electronics substrates: pure aluminum nitride (AlN), aluminum (DBA), and copper (DBC). The material compositions and microstructures of the bonds were analyzed using scanning electron microscopy (SEM), x-ray spectroscopy (EDS), confocal scanning acoustic microscopy (C-SAM), and x-ray diffraction (XRD). α-Al solid compound was identified as the dominant phase in AlN-AlSiC and Al-AlSiC, with a notable presence of SiC particles. In contrast, three intermetallic phases – θ-CuAl2, η-CuAl, and γ′- Cu9Al4 – were observed in the Cu-AlSiC bond. A computational solid-state diffusion model was developed to predict the intermetallic compounds (IMCs) formed during Cu-Al TLP bonding in each system, which supported the observation that an initial Cu volume fraction of 20 % in the material layers produced a final bond composition of >95 % Al with minimal IMC growth. However, increased Cu concentrations produced higher concentration gradients, leading to increased growth of IMCs, Kirkendall voids, and interstitial cracks.

(Invited) Considerations and Strategies for High-Temperature Ultra-Wide Bandgap Gallium Oxide Power Modules

There is a compelling need for high-density power electronic components and systems capable of operation at high ambient temperatures in automotive, aerospace, and down-hole applications. However, these needs are challenging the fundamental limit of silicon-based converters. While wide-bandgap (WBG) power semiconductors, particularly silicon carbide (SiC) and gallium nitride (GaN), have become promising alternatives to silicon (Si), they show diminished performance benefits at high temperatures.In the last several years, an ultra-wide-bandgap (UWBG) semiconductor, gallium oxide (Ga2O3), has emerged as a viable candidate for high-temperature power electronics with capabilities beyond existing technologies due to its large bandgap, controllable doping, and the availability of large-diameter, relatively-inexpensive substrates. The fundamental limit for high-temperature operation of semiconductors is the concentration of intrinsic carriers, which increases with temperature. Thanks to the UWBG of Ga2O3 (4.8 eV, compared to 1.1 eV for Si, 3.2 eV for SiC, and 3.4 eV for GaN), it achieves over 10-times lower intrinsic carrier concentration than Si. Compared to Si, SiC, and GaN devices, unipolar Ga2O3 devices also have superior theoretical limit for the trade-off between on-resistance and breakdown voltage, enabling a higher power conversion efficiency and power density.While Ga2O3 shows promise in these respects, due to its low thermal conductivity, conventional packaging and cooling strategies are not suitable. Simulations reveal that, compared to SiC, Ga2O3 power devices experience greater hot spot effects with higher peak junction temperatures and greater temperature differences across the chip, which could reduce the reliability of the packaged device. Simulations and preliminary experiments show that top-side cooling can counteract these effects and result in comparable thermal performance to SiC devices. This improvement shows the significant impact that the package and cooling strategy have on the performance of the Ga2O3 devices. This presentation will review this critical device-package-thermal relationship with electrothermal simulations and experimental measurements.Moreover, while Ga2O3 power devices have demonstrated superior high-temperature stability compared to SiC devices, package advancements at temperatures above 200°C are limited. The major limitation for high-temperature power modules is the encapsulation. The encapsulation provides essential electrical insulation, as well as corrosion resistance and protection. Conventional encapsulants are polymers, which have high dielectric strength for good electrical insulation, and low elastic modulus for low thermo-mechanical stress. However, typical polymers degrade rapidly at temperatures above 200°C. Accordingly, non-polymeric materials are needed for higher temperature operation.Hydroset ceramics have been evaluated as a high-temperature encapsulant. However, their porous structure reduces their electrical insulation effectiveness, and can cause reduced corrosion resistance. An alternate non-polymeric material is glass. Low-melting-temperature glass composites have emerged as a promising high-temperature encapsulant. It was found that the lead-glass composite has improved thermal stability compared to commercial polymeric materials. While the partial discharge inception voltage (PDIV) of the polymeric materials decreased by more than 80 % after just 100-200 hours of soaking at 250°C, the lead-glass composite samples showed no change in PDIV after 1000 hours. This feature is particularly important for realizing the full potential of Ga2O3, which has a critical breakdown field strength of 8 MV/cm. Accordingly, to operate these devices at high temperature and high-voltage, the package encapsulant must simultaneously have high thermal stability and dielectric strength. This presentation will review advancements in power module packaging that are needed to realize the full potential of Ga2O3 power devices.

A triple-layer structure flexible sensor based on nano-sintered silver for power electronics with high temperature resistance and high thermal conductivity

With the rapid development of the aerospace, military, electronics, electric power, automotive, and other fields, flexible sensors with high temperature resistance and good thermal conductivity are increasingly in demand. These sensors need to be highly reliable and maintain resistance to heat, humidity, and physical shock so that their terminal units can withstand extreme environments. In this context, conductive adhesives have attracted considerable interest due to their unparalleled potential for the development of high-temperature flexible sensors and power electronics. In this work, a three-layer structure containing silver nanomixes (Ag-NMs), silver microflakes (Ag-MFs), and polyimide (PI) layers was prepared for use in flexible resistive strain sensor by combining the high electrical and thermal conductivity of sintered nano-silver and the flexibility of micron silver using a 3D printing strategy. This resistive strain sensor exhibits low volume resistivity (1.37 × 10−5 Ω·cm), high thermal conductivity (39 W·m−1·K−1), high temperature resistance (capable of stable operation at 250 °C), high sensitivity (ΔR/R0 values of up to 0.43 and 0.45 after bending to 100° at 25 °C and 250 °C, respectively; ΔR/R0 values of up to 0.31 and 0.18 after stretching 2.5% at 25 °C and 250 °C, respectively), and low fatigue after 1000 load-unload cycles. The Ag-NMs/Ag-MFs/PI flexible resistive strain sensor effectively operates at temperatures up to 250 °C for long periods of time, showing great promise for application in harsh environments.

Fabrication of Cu@Sn TLPS joint for high temperature power electronics application

In this study, a novel Cu@Sn TLPS joint was fabricated for high-temperature power electronics application. Cu@Sn core-shell composite powder was firstly prepared by a methylate electroplating method, and then pressed into a preformed sheet. The Cu@Sn preform was reflowed at 250 ∼ 280 °C for 40 min under the pressure of 0.1 × 10-3 MPa, and the resulting bondline can withstand high temperatures up to 600 °C. During the process, the Sn layer was transformed to Cu3Sn, and the Cu3Sn surrounded the outside of the residual Cu particles. The joint characteristics were controlled by size gradation of Cu particles, the ratio of Cu/Sn, preform forming pressure and TLPS process. The joint shear strength was no less than 48 MPa after aging at 400 °C for 1000 h. Young's modulus and hardness were 98.35 GPa and 2.62 GPa, respectively, which are much lower than the pure Cu3Sn joint. The electrical resistivity and thermal conductivity of the joint were 5.1 μΩ cm and 148 W m-1 K-1, respectively. It is superior to pure Cu3Sn joints and the other Cu/Sn system TLPS joints. The high shear strength, high thermal conductivity and high melting temperature demonstrate that Cu@Sn TLPS joint is a promising interconnect technology for high power density modules.

Low-resistance ohmic contacts on boron-doped {113} oriented homoepitaxial diamond layers

Refractory metals (titanium, molybdenum, and zirconium) with a gold overlayer were used to form ohmic contacts on {113}-oriented boron doped diamond epitaxial layers (boron concentration ranging from 1019 to 1021 cm−3). Morphology and thickness of deposited layers were determined by AFM and X-SEM; resistivity, carrier concentration and mobility were determined by Hall measurement. Specific contact resistance RCsp of evaporated Ti/Au, Zr/Au, and Mo/Au contacts was measured using c-TLM structures after different annealing stages at temperatures up to 850 °C. Results show that on layers with {113} orientation it is possible to achieve ohmic contacts of comparable quality as for layers with {100} orientation. For all three metal systems, the lowest values for specific contact resistance reached 1 × 10−6 Ω.cm2. Ti/Au contacts show a stable ohmic behavior over the whole range of annealing temperatures, while Mo/Ti contacts had to be annealed above 500 °C to reduce the Schottky barrier and achieve good ohmic contact on lower B doped layers. Zr/Au contacts exhibit the lowest adhesion and required annealing to at least 700 °C to achieve ideal electrical and mechanical properties. Mo/Au and Zr/Au contacts on highly boron doped layers (~1021 cm−3) show excellent contacts when annealed at 700 °C, and therefore can be considered as improved candidates for ohmic contacts for diamond-based high-temperature power electronics than the conventional Ti/Au (Ti/Pt/Au) contact system. In summary, this study confirms the suitability of {113} oriented boron doped diamond epitaxial layers for the fabrication of diamond power electronic devices with excellent ohmic contacts.

Thermal stress reduction strategy for high-temperature power electronics with Ag sintering

Thermal stress caused by the coefficients of thermal expansion (CTE) mismatch of materials is the main failure mechanism in power electronic packaging. High junction temperature (Tj) would induce larger thermal stress and accelerate failing process. In this paper, two packaging strategies to reduce thermal stress of power module for high-temperature operation were presented based on organic-free sintered Ag bonding and wireless packaging structuring: reduce elastic modulus of sintered Ag layer by changing sintering parameters; and reduce the CTE mismatch by changing the ribbon material. Finite-element analysis (FEA) simulations confirmed that these strategies can effectively reduce the maximum and average thermal stress in power electronics packaging. Furthermore, by combining these two strategies, high-temperature power cycling test indicated that the wireless packaging with Cu30Mo70 ribbon and 5 MPa sintering pressure exhibited excellent durability and reliability in the temperature swing at the junction (ΔTj∆Tj) over 150 K.

High-temperature stability of Ni-Sn intermetallic joints for power device packaging

In this study, the feasibility and high-temperature stability of Ni-Sn bonded joints fabricated by transient liquid phase sintering (TLPS) were investigated for high-temperature power electronics applications. A 30Ni-70Sn (wt%) TLPS paste was fabricated with micro-sized pure Ni and Sn powders, and chip bonding was performed on a direct bonded copper (DBC) substrate. During TLPS bonding, Sn particles melted and reacted with Ni particles, which resulting in the formation of stable Ni-Sn TLPS intermetallic joints. During aging treatments at 150 and 200 °C, the formed Ni3Sn4 phases were transformed into the Ni3Sn2. With increasing aging treatments, the reactions between Ni3Sn4 intermetallics and remaining Ni particles increased, which resulted in the formation of the Ni-rich Ni-Sn intermetallics. Even after 1000 h at an aging temperature of 200 °C, there is no significant difference in the stable and dense microstructure of Ni-Sn TLPS joints. In addition, their mechanical strengths did not vary significantly even after long-term treatment for 1000 h at 150 and 200 °C. This means that the Ni-Sn TLPS joints have a good long-term microstructural stability and mechanical reliability at high temperatures up to 200 °C. Therefore, we conclude that the Ni-Sn paste is a promising candidate as a die-attach material for high-temperature electronic assemblies.

A Study of Transient Liquid Phase Bonding Using an Ag-Sn3.0Ag0.5Cu Hybrid Solder Paste

The feasibility of transient liquid phase (TLP) bonding technology for high-temperature endurable power electronics packaging has been evaluated in this study. An Ag-Sn3.0Ag0.5Cu hybrid solder paste was fabricated and used as a bonding material. The bonding reactions between chip/substrate and hybrid solder paste and die shear strengths of the TLP-bonded joints were evaluated during conventional soldering and vacuum soldering processes. Compared to the conventional soldering, the vacuum-soldered joints had fewer voids and relatively good metallurgical microstructures. After TLP bonding, (Cu,Ni)6Sn5, Ag3Sn, and Cu6Sn5 intermetallic compounds formed at the chip interface, in the middle of the joint, and at the bottom interface, respectively. It was confirmed that the vacuum soldering process could create good interfacial uniformity with minimal voids in the Si chip/ceramic substrate joints. The formation of voids during TLP bonding significantly affected the mechanical shear strength of the TLP-bonded joints. The vacuum-soldered joints had high shear strength values of approximately 40 MPa. To ensure the high joint strength and long-term reliability of Sn-based TLP-bonded joints, critical void control in the joints is needed.

Thermal interface material with graphene enhanced sintered copper for high temperature power electronics

Sintered nano-copper is becoming a promising candidate as thermal interface material (TIM) for die attaching in high power electronics. It exhibits much higher thermal conductivity and operating temperature than conventional TIMs based on polymer and solder joints, and higher electromigration resistance and lower cost than sintered nano-silver TIM. However, the performance of existing sintered nano-copper is lower than expected because of high porosity resulted from poor sintering of copper particles with oxide shell. Here we demonstrate a method of improving the thermal conductivity of sintered copper by addition of graphene/Cu–Cu x O with controllable diameter of ∼163 nm. The measured thermal conductivity of the sintered composite TIM is enhanced by up to 123.5% compared with that of sintered pure copper. It can be understood as a result of the formation of graphene heat transfer network in sintered TIM. In addition, the C–O–Cu bonds formed at the interface between graphene and copper nanoparticles are critical for improving thermal performance as well as electrical and mechanical performance of the TIM. The developed TIM can be widely used in high power electronic packaging especially for high temperature applications, including IGBT, SiC and GaN power devices.

Microstructure evolution and shear strength of full Cu3Sn- microporous copper composite joint by thermo-compression bonding

Purpose The purpose of this paper is to quickly manufacture full Cu3Sn-microporous copper composite joints for high-temperature power electronics applications and study the microstructure evolution and the shear strength of Cu3Sn at different bonding times. Design/methodology/approach In this paper, a novel structure of Cu/composite solder sheet/Cu was designed. The composite solder sheet was made of microporous copper filled with Sn. The composite joint was bonded by thermo-compression bonding under pressure of 0.6 MPa at 300°C. The microstructure evolution and the growth behavior of Cu3Sn at different bonding times were observed by electron microscope and metallographic microscope. The shear strength of the joint was measured by shear machine. Findings At initial bonding stage the copper atoms in the substrate and the copper atoms in the microporous copper dissolved into the liquid Sn. Then the scallop-liked Cu6Sn5 phases formed at the interface of liquid Sn/microporous copper and liquid Sn/Cu substrates. During the liquid Sn changing to Cu6Sn5 phases, Cu3Sn phases formed and grew at the interface of Cu6Sn5/Cu substrates and Cu6Sn5/microporous copper. After that the Cu3Sn phases continued to grow and the Cu3Sn-microporous copper composite joint with a thickness of 100 µm was successfully obtained. The growth rule of Cu3Sn was parabolic growth. The shear strength of the composite joints was about 155 MPa. Originality/value This paper presents a novel full Cu3Sn-microporous copper composite joint with high shear strength for high-temperature applications based on transient liquid phase bonding. The microstructure evolution and the growth behavior of Cu3Sn in the composite joints were studied. The shear strength and the fracture mechanism of the composite joints were studied.

Transient liquid phase bonding of silicon and direct bond copper via electroplating of tin-copper interlayers for power device applications

Joining technology of silicon semiconductors devices to direct bond copper (DBC) substrates in high-temperature power electronics packages is of utmost importance today. In this study, Sn–Cu solder was prepared by electroplating on a direct bonded copper (DBC) substrate. The electroplated DBC system thus prepared was TLP bonded with Si chip at 250 °C for 10 min under a vacuum atmosphere. The effect of electrical charge used for plating Sn–Cu solder, void fraction in the joint, Sn–Cu solder composition on the joining characteristics, and shear strength of the Si-DBC system were analyzed. The experimental results showed that the plating thickness increased almost linearly with plating time and electrical charge. A sound Sn–Cu solder plating thickness was obtained at 40 mA cm−2, 11 C cm−2, 20 min with 20 at% Cu in the deposit. Furthermore, the plated Sn–Cu solder layer transformed to Cu6Sn5 and Cu3Sn after joining at 250 °C for 10 min. The shear bonding strength of the Si/DBC joint increased with Cu content in the Sn–Cu solder until 20 at% in the Sn–Cu interlayer.

Preparation and sintering properties of Cu10Sn3 IMCs nanopaste as die attach material for high temperature power electronics

Cu10Sn3 intermetallic compound (IMC) nanoparticles (NPs) were synthesized by one-step thermal decomposition method with low cost. The in-situ formed metal amide in the presence of LiN(iPr)2 can be reduced and thermally decomposed into metal NPs, and then the Cu10Sn3 NPs were obtained, which have an average diameter of 65 nm and good oxidation resistance. The microstructures and mechanical properties of Cu/Cu10Sn3/Cu joints at different sintering temperatures were investigated. The full-Cu10Sn3 IMC joints show high shear strength of 26.8 MPa after sintering at 300 °C for 20 min, demonstrating its broad potential as an interconnect material for high-temperature power electronics.