High Step Coverage Research Articles

Characteristics of CVD silicon oxide films: Effect of discharge form on formation and properties of films

AbstractA silent discharge is one of the simplest methods for realizing a nonequilibrium plasma condition at atmospheric pressure. In this study, nonequilibrium plasma chemical reactions by this discharge have been applied to a remote plasma chemical vapor deposition (CVD) of silicon oxide films using tetraethylorthosilicate (TEOS) and oxygen. Film characteristics obtained by this CVD have been investigated for applications to advanced semiconductor devices. Conditions for depositing films with high quality have been investigated minutely. From these results, it has been clarified that silicon oxide films with high quality and excellent step coverage can be obtained by plasma excitation using pulsed silent discharge. It has also been clarified that films with similar characteristics can be obtained by plasma excitation using low‐frequency AC silent discharge at subatmospheric pressure. © 2004 Wiley Periodicals, Inc. Heat Trans Asian Res, 33(2): 106–116, 2004; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/htj.20000

Characteristics of CVD Silicon Oxide Films Using Nonequilibrium Plasma Chemical Reactions by Silent Discharge. Effect of Discharge Form on Formation and Properties of Films.

A silent discharge is one of simplest methods for realizing a nonequilibrium plasma condition at atmospheric pressure. In this study, nonequilibrium plasma chemical reactions by this discharge have been applied to a remote plasma chemical vapor deposition (CVD) of silicon oxide films using Tetraethylorthosilicate (TEOS) and oxygen. And film characteristics by this CVD have been investigated for applications to advanced semiconductor devices. Conditions for depositing films with high quality have been investigated minutely. From these results, it has been clarified that silicon oxide films with high quality and excellent step coverage can be obtained by plasma excitation using pulsed silent discharge. Furthermore, it has been also clarified that films with similar characteristics can be obtained by plasma excitation using low frequency AC silent discharge at subatmospheric pressure.

Reflection characteristics of a copper metal-organic chemical-vapor-deposited thin film for vertical micromirror applications

We introduce Cu metal-organic chemical-vapor deposition as a potential means of conformal metal coating of the sidewalls of micromachined vertical mirrors. The optimal process temperature was experimentally found to be 215 degrees C, which gives high step coverage of better than 90%, and the surface roughness was less than 27 nm. The roughness, measured with an atomic force microscope, will induce a scattering loss less than 0.12 dB, which is small enough for vertical micromirror application. The experimental reflectances of Cu thin film were measured with a distributed-feedback laser (1550 nm) and found to be greater than 0.9 for incidence angles of 22.5 degrees and 45 degrees , and these reflectances were in good agreement with theoretical values.

Development of different copper seed layers with respect to the copper electroplating process

Two types of copper seed layers deposited by MOCVD and long throw sputtering (LTS) onto a tantalum barrier layer were used for electroplating (EP) of copper in the forward pulsed mode. MOCVD and PVD copper seed layers were compared with respect to step coverage, electrical resistivity, texture and adhesion behaviour. The different properties induce different electroplating fill attributes, including grain size and adhesion behaviour. MOCVD Cu seed layers show high step coverage, but do not adhere to the Ta barrier after the Cu EP. LTS Cu reveal strong (111) texture and excellent adhesion before and after Cu EP. Therefore, a CMP process could only be performed on patterned wafers with PVD/EP copper to obtain electrical data. The fabricated Cu lines show a high yield with respect to opens and shorts and standard deviations of the line resistance across the wafer.

Effect of tungsten chemical vapor deposition nucleation step on via performance

This paper presents a study of the nucleation process for W Chemical Vapor Deposition (CVD). The nucleation layer was obtained by reduction of WF 6 by SiH 4 and H 2. This double reduction had proved to have a large latitude regarding fluorine attack of the glue layer. High WF 6 flows could then be investigated and process parameters controlling the step coverage were determined. Electrical performance within a 0.25 μm CMOS interconnects scheme using a collimated PVD glue layer was investigated. The W nucleation layer proved to constitute a barrier layer against fluorine diffusion at the bottom of vias during via fill processing. Thus, a high step coverage W nucleation process extends the TiN barrier efficiency to a higher via aspect ratio.

Atmospheric Pressure Chemical Vapor Deposition of Titanium Nitride from Tetrakis (diethylamido) Titanium and Ammonia

Titanium nitride (TiN) films were made from tetrakis (diethylamido) titanium (TDEAT) and ammonia by atmospheric pressure chemical vapor deposition (APCVD). Growth rates, stoichiometries, and resistivities were studied as a function of temperature and ammonia: TDEAT ratios. Films were characterized by four‐point probe, Rutherford backscattering, forward (elastic) recoil, and x‐ray photoelectron spectroscopies. TDEAT was found to have a higher deposition efficiency (>1/3), and slower reaction kinetics than the related (TDMAT) compound. Higher temperatures and relative concentrations were necessary to achieve similar growth rates. Though growth was slower than when using TDMAT, films from TDEAT had higher step coverage, lower resistivities (<1000 μΩ‐cm) and were more stable with time. These films are promising candidates for diffusion barriers in 0.25 μm ULSI device technologies.

Simulation of Microstructure and Surface Profiles of Thin Films for VLSI Metallization

A crucial step in the manufacture of very large-scale integration (VLSI) integrated circuits is the fabrication of reliable, low-resistance metal interconnects between semiconductor devices. The fabrication of these interconnects is generally performed by depositing a blanket metal film and then patterning it by lithographic and etching techniques. The primary means of depositing thin metal films for VLSI interconnects are sputtering and chemical vapor deposition (CVD).The creation of reliable interconnects is, however, complicated by a number of issues. In order to obtain low contact resistance, to inhibit reactions with the silicon, and to provide good adhesion to both Si and SiO2, contact, barrier, and adhesion layers are generally deposited prior to the deposition of the low-resistance metal film that forms the bulk of the interconnect. If these layers are to provide an effective barrier to diffusion of the interconnection metal to the silicon, they must be deposited in a uniform, homogeneous form. It is also necessary that the primary interconnect material have as high step coverage as is possible in order to reduce current crowding, local heating effects, and electromigration. Unfortunately, as VLSI circuit densities have increased, the fabrication of interconnects requires high aspect-ratio contact cuts, and relatively severe local topographies can result. These factors make it difficult to deposit films with good step and bottom coverage.In addition to these concerns with the film surface profile, another factor is becoming increasingly significant. Both sputtering and CVD produce thin films with characteristic microstructures. This microstructure consists of columns or grains separated by grain boundaries and voids.

Chemical vapor deposition TiN process for contact/via barrier applications

Chemical vapor deposition (CVD) TiN is an attractive replacement for PVD TiN as a barrier and glue layer for subhalf-micron contacts and vias. CVD TiN films have been deposited in a commercial reactor via the thermal decomposition of tetrakis-dimethyl-amino-titanium (TDMAT) precursor in an N2 ambient. The deposition can be characterized by a simple Arrhenius rate expression with a half-order dependence on TDMAT concentration and an activation energy of 0.53 eV. Designed experiments show that the deposition transitions from being kinetically limited at high TDMAT flow rates and low temperatures to transport limited at the other extreme. In the kinetically limited regime, the deposition rate increases with increasing TDMAT mole fraction and increasing temperature. Step coverage simulations have been performed by coupling SPEEDIE (a profile evolution program) with the Arrhenius rate expression. Experimental and simulated step coverages show good agreement over a wide range of process conditions. Step coverage improves with increasing deposition rate and decreasing temperature. Adequate deposition rates (≳400 Å/min) with good deposition uniformity and high step coverage (50%–85%) can be achieved. Film stress and roughness are mostly invariant with process conditions. These films are close to stoichiometric (i.e., 1:1 Ti:N ratio), but contain up to 30% carbon. Exposure of these films to air causes rapid oxidation with a steady state concentration of 15%–20% oxygen after 24 h of air exposure. The high carbon concentration results in high film resistivity (5000 μΩ cm), which doubles after 24 h of air exposure due to oxidation of the film. Film resistivity decreases and film stability improves with increasing N2 flow rate. Electrical characterization of two process variants have been performed. The first provides a film with 85% step coverage with a resistivity of 5600 μΩ cm, while the second process achieves a lower resistivity of 3700 μΩ cm and a lower step coverage of 50%. Electrical performance of both films is similar. Contact induced diode leakage is lower for CVD TiN compared to PVD TiN. Contact resistance for 100–200 Å CVD TiN is comparable or lower than 500 Å PVD TiN. A 100 Å CVD TiN barrier is adequate; 300 Å CVD TiN is too thick because of high film resistivity. An Al–Cu/100–300 Å CVD TiN/Si stack shows lower resistance increase after 450–500 °C, 30 min N2 anneal compared to a Al–Cu/200 Å PVD TiN/Si stack indicating that CVD TiN is a superior barrier and is more inert than PVD TiN.

Chemical vapor deposited TiCN: A new barrier metallization for submicron via and contact applications

High quality chemical vapor deposited (CVD) TiCN films were produced in a single wafer reactor using a metalorganic precursor (tetrakisdimethylamino titanium). The films have excellent step coverage (≳80%) over high aspect-ratio contacts as well as a very low particle level. These properties are obtained because the films were deposited under surface-reaction controlled conditions; the measured activation energy is 0.9 eV. The stress levels of the films are relatively low, below 5×109 dyn/cm2 compressive. The films also show good barrier properties against Al, Cu, and WF6 attack, that are attributed to their amorphous component, to the high C content of the films, and to the high step coverage. The electrical properties of the CVD TiCN films were evaluated at the via level, and the resistance contribution was shown in many cases to be comparable to that of sputtered TiN. These properties make this material a suitable barrier material for contact and via applications in sub-0.5 μm devices.

On the modelling of transport phenomena in chemical vapour deposition and its use in reactor design and process optimization

The properties of thin films grown by chemical vapour deposition (CVD) are strongly determined by the interaction of transport phenomena and chemical reactions in the reaction chamber. These phenomena can be studied with the use of numerical simulation models, based on fluid dynamics and reaction chemistry and describing the reactor-scale properties of the process. Additional feature-scale models can relate macroscopic process conditions to microscopic film properties. The general features of reactor-scale CVD models are described in this paper and examples of some feature-scale models are given. The use of CVD models as an aid in reactor design and process optimization and as a valuable tool in the correct interpretation of experimental data illustrated. Special attention is given to tungsten low pressure CVD processes in single-wafer reactors. It is described how the use of reactor-scale and feature-scale CVD models has led to the development of a highly improved blanket tungsten feature filling process, combining a high and uniform growth rate and step coverage with a very economic use of reactants.

Modeling and Optimization of the Step Coverage of Tungsten LPCVD in Trenches and Contact Holes

A model is presented to calculate the step coverage of blanket tungsten low pressure chemical vapor deposition (W‐LPCVD) from tungsten hexafluoride . The model can calculate tungsten growth in trenches and circular contact holes, in the case of the reduction by , , or both. The step coverage model predictions have been verified experimentally by scanning electron microscopy (SEM). We found that the predictions of the step coverage model for the reduction of are very accurate, if the partial pressures of the reactants at the inlet of the trench or contact hole are known. To get these reactant inlet partial pressures, we used a reactor model which calculates the surface partial pressures of all the reactants. These calculated surface partial pressures are used as input for our step coverage model. In this study we showed that thermodiffusion plays a very important role in the actual surface partial pressure. In the case where was present in the gas mixture trends are predicted very well but the absolute values predicted by the step coverage model are too high. The partial pressure of , which is a by‐product of the reduction reaction, may be very high inside trenches or contact holes, especially just before closing of the trench or contact hole. We found no influence of the calculated partial pressure on the step coverage. Differences between step coverage in trenches and contact holes, as predicted by the step coverage model, were found to agree with the experiments. It is shown that the combination of the step coverage and reactor model is very useful in the optimization towards high step coverage, high throughput, and low flow. We found a perfect step coverage (no void formation) in a 2 μm wide and 10 μm deep trench using an average flow of only 35 sccm, at a growth rate of 150 nm/min. In general, it is shown that the reduction of by offers no advantages over the reduction by as far as step coverage is concerned.

Deposition of Tungsten Silicide Barrier Layers and Tungsten in Rectangular Vias

ABSTRACTDiffusion-reaction analysis of a two step process in which a tungsten silicide barrier layer is deposited in a rectangular trench by low pressure dichlorosilane reduction of tungsten hexafluoride followed by a complete tungsten fill by low pressure hydrogen reduction of tungsten hexafluoride reveals that high step coverage and high deposition rate can be readily achieved with logical selection of process parameters. This fact, coupled with the potential for accomplishing these deposition steps in the same single wafer reactor, suggests that this two step process may offer a high throughput alternative to blanket tungsten deposition by silane reduction.

A novel bilevel resist system

A bilevel system, consisting of PMMA and RD2000N (Hitachi) is described which has no discernable interaction between the resists and no processing interaction. The thin RD2000N resolution layer has very high absorption below 2900 Å and forms a high contrast mask for optical pattern transfer to the thick base PMMA layer. High fidelity step coverage of wet and dry etched oxides 7200 Å high is demonstrated with good linewidth control. The bilevel is capable of resolving 0.75 μm features over steps with good acuity. Preliminary results indicate that linewidth control with the bilevel process is comparable to a single level RD2000N process and has a lσ value of ∼.09 μm nearly independent of linewidth. The RD2000N layer shows a greater sensitivity to process variation than the PMMA. A parametric evaluation shows a dependence of linewidth on development time of 0.02 μm/s and a dependence of 0.11 μm/s for a 17 s exposure time. The resist system has enough dry etch resistance to use plasma etch pattern transfer as a complement to optical pattern transfer.