Security is of paramount importance to the design of modern communication systems and in particular, to wireless networks. Wireless devices are becoming commonplace in both the office and home environment and therefore, the need for strong secure transport protocols is one of the most important issues in mobile standards. Cryptography is the foremost method for providing communication security and is a mathematically intensive process which, to date, has mainly been implemented in software. However, such methods are slow and cannot cope with the demands of rapidly growing real-time wireless communication systems. Encryption of digital information in real-time holds the key to the successful growth of applications such as wireless hand-held devices and high performance mobile communications. The innovative mapping of complex cryptographic operations onto hardware architectures with consideration for throughput, area and power issues has emerged as a viable solution. This special issue aims to present recent advances in cryptographic hardware architectures for secure mobile computing. The majority of the accepted papers focus on the challenge of designing high-speed asymmetric cryptographic hardware architectures for mobile applications. Asymmetric techniques are, in general, more complex than symmetric cryptographic methods and as such, it is inevitably more difficult to design efficient low resource, high-speed asymmetric architectures. The most common and best known asymmetric scheme is the RSA algorithm, but hardware implementations of RSA can require tens of thousands of gates. A much more promising asymmetric security solution is elliptic curve cryptography (ECC). ECC is viewed as a low-cost alternative to RSA and provides similar security strengths using much shorter key lengths. The research described in the contributions to this special issue illustrate the possibilities of using ECC to provide strong security for mobile computing applications. The first paper, ‘A Survey of Cryptographic Primitives and Implementations for Hardware-Constrained Sensor Network Nodes’, by Roman, Alcaraz and Lopez surveys existing research into hardware and software cryptographic implementations for wireless sensor networks. They conclude that while existing sensor nodes can support software security implementations, next generation sensor nodes will be able to support hardware security architectures of more complex asymmetric cryptographic algorithms. The next three papers describe high-speed ECC processor architectures. Sakiyama, Batina, Preneel and Verbauwhede’s paper, ‘High-Performance Public-Key Cryptoprocessor for Wireless Mobile Applications’, presents an ECC processor hardware architecture that exploits parallel processing of the modular operations in the arithmetic logic unit, in addition to instruction-level parallelism to achieve a high overall Mobile Netw Appl (2007) 12:229–230 DOI 10.1007/s11036-007-0023-3