High‐speed bulk data transfer architecture for Gbit/s throughput

Abstract

AbstractWhen bulk data is transferred between end hosts over an IP network, a known problem is the limited throughput obtained at the application level due to the memory copy processing load between the kernel buffer and the user buffer depending on the operating system. To solve this problem, in this paper we propose a high‐speed bulk data transfer architecture called Network Direct Memory Access (Network DMA) and describe its design, implementation, and test results. The purpose of Network DMA is to be a transport function installed on a network interface card (NIC) and to achieve high‐speed and reliable data transfers over a network between the user buffers of the end hosts without requiring operating system‐specific processing. An application will use the data transfer function provided by a new interface capable of directly specifying the send destination host and the target transfer buffer. Based on the proposed architecture, we developed a 622‐Mbit/s ATM NIC and Gigabit Ethernet NIC incorporating the Network DMA. The ATM NIC we developed achieved a continuous transfer throughput of 540 Mbit/s (99% bandwidth usage efficiency at the application level) in data transfer tests between general‐purpose PCs. The Gigabit Ethernet NIC achieved an 800 Mbit/s continuous transfer throughput. © 2003 Wiley Periodicals, Inc. Electron Comm Jpn Pt 1, 86(11): 57–65, 2003; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecja.10107