High On-state Current Densities Research Articles

High-performance monolayer MoS2 nanosheet GAA transistor

In this article, a 0.7 nm thick monolayer MoS2 nanosheet gate-all-around field effect transistors (NS-GAAFETs) with conformal high-κ metal gate deposition are demonstrated. The device with 40 nm channel length exhibits a high on-state current density of ~410 μA μm−1 with a large on/off ratio of 6 × 108 at drain voltage = 1 V. The extracted contact resistance is 0.48 ± 0.1 kΩ μm in monolayer MoS2 NS-GAAFETs, thereby showing the channel-dominated performance with the channel length scaling from 80 to 40 nm. The successful demonstration of device performance in this work verifies the integration potential of transition metal dichalcogenides for future logic transistor applications.

Demonstration of avalanche capability in 800 V vertical GaN-on-silicon diodes

High-quality pseudo-vertical p–n diodes using a GaN-on-silicon heterostructure are reported. An optimized fabrication process including a beveled deep mesa as edge termination and reduced ohmic contact resistances enabled high on-state current density and low on-resistance. A uniform breakdown voltage was observed at 830 V. The positive temperature dependence of the breakdown voltage clearly indicates the avalanche capability, reflecting both the high material and processing quality of the vertical p–n diodes. The Baliga figure of merit, around 2 GW cm−2, which is favorably comparable to the state-of-the-art, combined with avalanche capability paves the way for fully vertical GaN-on-Silicon power devices.

Strain-Free Layered Semiconductors for 2D Transistors with On-State Current Density Exceeding 1.3 mA μm-1.

High-mobility and air-stable two-dimensional (2D) Bi2O2Se semiconductor holds promise as an alternative fast channel material for next-generation transistors. However, one of the key challenges remaining in 2D Bi2O2Se is to prepare high-quality crystals to fabricate the high-performance transistors with a high on-state current density. Here, we present the free-standing growth of strain-free 2D Bi2O2Se crystals. An ultrahigh Hall mobility of 160 000 cm2 V-1 s-1 is measured in strain-free Bi2O2Se crystals at 2 K, which enables the observation of Shubnikov-de Haas quantum oscillations and shows substantially higher (>4 times) mobility over previous in-plane 2D crystals. The fabricated 2D transistors feature an on-off current ratio of ∼106 and a record-high on-state current density of ∼1.33 mA μm-1, which is comparable to that of commercial Si and Ge n-type field-effect transistors (FETs) for similar channel length. Strain-free 2D Bi2O2Se provides a promising material platform for studying novel quantum phenomena and exploration of high-performance low-power electronics.

Design of p–p heterojunctions based on CuO decorated WS2 nanosheets for sensitive NH3 gas sensing at room temperature

Tungsten disulfide (WS2) nanosheets (NSs) have become a promising room-temperature gas sensor candidate due to their inherent high surface-to-volume ratio, tunable electrical properties, and high on-state current density. For further practical applications of WS2-based gas sensors, it is still necessary to overcome the insensitive response and incomplete recovery at room temperature. In this work, we controllably synthesized high-performance ammonia (NH3) gas sensor based on CuO decorated WS2 NSs. The optimized p–p WS2/CuO heterojunctions improve the surface catalytic effect, thereby enhancing the gas-sensing performance. The pure WS2 NSs-based gas sensors showed a low response and an incomplete recovery in the case of NH3 sensing. After the functionalization of CuO nanoparticles, the WS2/CuO heterostructure-based gas sensor exhibits an improved response value of 40.5% to 5 ppm NH3 and full recoverability without any external assistance. Density functional theory calculations illustrate that the adsorption of CuO for NH3 is much superior to WS2. The p–p heterojunctions strategy demonstrated in this work has great potential in the design of sensitive materials for gas sensors, and provides useful guidance for enhancing the room-temperature sensitivity and recoverability.

(Invited) ALD of Phase Change and Threshold Switching Materials for Next-Generation Nonvolatile Memory Devices

Memory technology continues to be at a crossroads. Established devices such as DRAM, Flash, and SRAM remain dominant, but each are facing increasingly formidable challenges in scaling, cost, and performance. Emerging memory technologies are attempting to displace these three or to find application spaces between those they traditionally support. However, no emerging memory has been able to demonstrate significant advantages over the incumbents, resulting in a proliferation of options such as phase change memory (PCM), filamentary resistive memory (ReRAM), ferroelectric memory (FERAM), magnetic memory (e.g. STT-MRAM and SOT-MRAM), and several others. Of these, the most successful has been PCM as evidenced by the commercial introduction of PCM based crosspoint memory in 2017. PCM based crosspoint memory has had limited market penetration in part due to the high manufacturing cost; the current layer-by-layer approach to PCM fabrication makes scaling difficult. In order to be cost competitive, crosspoint arrays will need to be manufactured in a style similar to that of 3D V-NAND where the active layers are deposited conformally inside deep features simultaneously forming hundreds of junctions. Chemical Vapor Deposition or Atomic Layer Deposition of these films is likely required to make this a reality. Some progress in materials for the PCM memory element has been reported; however, a remaining concern for crosspoint memory is the selector device, used in suppressing the sneak path current, consisting of a non-linear two-terminal device to properly select each memory element. In addition to high non-linearity, a selector device also requires high on-state current density JON, fast switching time, high endurance, stability, high scalability and back-end-of-line (BEOL) integration. Several selector devices have been proposed to date, e.g., mixed-ionic-electronic-conduction (MIEC), field-assisted superlinear threshold (FAST), and amorphous silicon (a-Si) selectors, but Ovonic Threshold Switch (OTS) composed of chalcogenide multinary materials clearly appears as the best candidate to cover all the mentioned requirements for high-density crosspoint applications.Currently, chalcogenide materials are deposited by using physical vapor deposition (PVD) that allows for fine tuning of the film stoichiometry, but at the same time limits its conformality and homogeneity on a large scale. To address this challenge, atomic layer deposition (ALD) is desirable; unfortunately, only ALD OTS As-free compositions with high leakage and limited endurance have been developed so far. In this report we describe the process and materials for GeSbTe PCM and a novel quaternary GeAsSeTe ALD OTS composition. We show a physical characterization of the ALD films and provide a comprehensive electrical characterization of integrated devices in DC and pulsed regimes. The OTS selector performance, in particular, shows excellent results (See Figure 1) - good selectivity (> 104), low threshold voltage (Vth) drift (< 40 mV/dec), fast switching (< 10 ns), excellent endurance (> 109 cycles) and robust stability. These results pave the way for future development of ALD chalcogenide-based selectors as a leading technology for multiple-stack integration of crosspoint memory arrays. To provide a physical understanding of the devices under study, we propose an analytical model for the subthreshold conduction mechanism, allowing for future development and optimization of the composition for 3D crosspoint memory applications.Figure 1. Electrical performance of an OTS selector over one billion cycles a) Pulsed-IV taken at each decade of the 1e9 endurance cycles. b) Sub-threshold current measured at each decade of the 1e9 endurance cycles. c) Evolution of the threshold voltage throughout the endurance test. Each point is measured three times, and all three measurements are reported d) Selector window at each decade of the endurance test. Figure 1

Precisely Controlled Two-Dimensional Rhombic Copolymer Micelles for Sensitive Flexible Tunneling Devices

Nanoscale two-dimensional (2D) organic materials have attracted significant interest on account of their unique properties, which result from their ultrathin and flat morphology. Supramolecular 2D ...

Self-Selective Resistive Device With Hybrid Switching Mode for Passive Crossbar Memory Application

In this letter, we experimentally demonstrated a novel resistive device with a hybrid switching mode that can be alternated between volatile threshold switching and non-volatile resistive switching. The device consists of dual-functional layers VO2 /HfO2 sandwiched by symmetrical TiN electrodes. A >20 unified ratio for selectivity and memory window is obtained. Owing to the stable resistive behavior of HfO2 and insulator-metal transition of VO2, the device shows excellent uniform switching parameters in both switching modes with a high on-state current density (1E4 A/cm2) and fast switching/recovery speed (< 30 ns). This self-selective resistive memory is of great potential in the high-density crossbar array, particularly for the future 3D-Vertical resistive random access memory (RRAM) integration.

Improvement in Threshold Switching Performance Using Al₂O₃ Interfacial Layer in Ag/Al₂O₃/SiOₓ/W Cross-Point Platform

An Al2O3/SiOx bi-layer cross-point selector was proposed and experimentally demonstrated in this work to mitigate the sneak path leakage issue in the high density passive crossbar array. A 2 nm Al2O3 interfacial layer confines filament dissolution gap caused by Ag diffusion into the SiOx layer, enabling significant improvement in uniformity and other electrical performances as compared to the monolayer SiOx selector (without Al2O3 layer). Devices with Al2O3 interfacial layer exhibit I-V characteristics with large selectivity of $> 5\times 10^{{7}}$ , high rectifying ratio ( RR ) of $> 5\times 10^{{7}}$ , high ON state current density of $> 10^{{3}}~\text{A}\cdot $ cm $^{\text {-2}}$ , steep slope subthreshold swing ( SS ) of $> 10~^{{4}}$ seconds were also demonstrated.

Robust Impact-Ionization Field-Effect Transistor Based on Nanoscale Vertical Graphene/Black Phosphorus/Indium Selenide Heterostructures.

Maintaining the rapid development of information technology by scaling down a metal-oxide semiconductor field-effect transistor faces two serious challenges. First, the gate field loses control of the channel as it continuously decreases. Second, the fundamental thermionic limit restricts the reduction in supply voltage. Thus, further scaling down necessitates alternative device structures and different switching mechanisms. Here, we report impact-ionization transistors (IITs) based on nanoscale (∼30 nm) vertical graphene/black phosphorus (BP)/indium selenide (InSe) heterostructures. By facilitating the carrier multiplication of the ballistic impact-ionization process as the internal gain mechanism in sub-mean-free-path (sub-MFP) channels, the IITs exhibit a low average subthreshold swing (SS < 1 mV/dec) over five current levels. High stability (>10 000 cycles) and small hysteresis (<1%) switching properties are also obtained. The experimental demonstration of such transistor combining steep SS, high ON-state current density, reliable robustness, miniature footprint, and low bias voltage approaches fulfillments of targets for next-generation devices in the International Technology Roadmap for Semiconductors.

Vertical, electrolyte-gated organic transistors show continuous operation in the MA cm-2 regime and artificial synaptic behaviour.

Until now, organic semiconductors have failed to achieve high performance in highly integrated, sub-100 nm transistors. Consequently, single-crystalline materials such as single-walled carbon nanotubes, MoS2 or inorganic semiconductors are the materials of choice at the nanoscale. Here we show, using a vertical field-effect transistor design with a channel length of only 40 nm and a footprint of 2 × 80 × 80 nm2, that high electrical performance with organic polymers can be realized when using electrolyte gating. Our organic transistors combine high on-state current densities of above 3 MA cm-2, on/off current modulation ratios of up to 108 and large transconductances of up to 5,000 S m-1. Given the high on-state currents at such large on/off ratios, our novel structures also show promise for use in artificial neural networks, where they could operate as memristive devices with sub-100 fJ energy usage.

(Invited) Low-Voltage Complementary Electronics from Ion Gel-Gated Vertical Van Der Waals Heterostructures

Isolation of ultrathin layered materials with disparate electronic properties has prompted their integration into van der Waals heterostructures with unique properties for electronics. By employing ion gel dielectrics, we demonstrate here low-voltage complementary circuits comprised of n-type and p-type van der Waals heterojunction vertical field-effect transistors (VFETs). The n-type and p-type VFETs were fabricated from MoS2 and WSe2 layers on graphene, respectively, with gating achieved by a top ion gel dielectric. Due to the high specific capacitance of the ion gel dielectric, the work function of the underlying graphene and consequently the energy barrier for charge injection into the MoS2 and WSe2 layers are widely tuned at low operating voltages. The resulting VFETs possess high on-state current densities (> 3000 A cm-2) and on/off current ratios (> 104) in a narrow voltage window (< 3 V). In addition to enhancing VFET device metrics at reduced operating voltages, the high specific capacitance of the ion gel dielectric allows unprecedented regimes of charge transport to be accessed including p-channel phenomena in graphene-MoS2 vertical heterostructures. Furthermore, since the ion gel-gated VFETs possess low threshold voltages, a low-power complementary logic inverter is demonstrated using n-type and p-type VFETs. Overall, these results demonstrate the feasibility of vertical van der Waals heterostructures for high-performance, low-voltage electronics.

Low-Voltage Complementary Electronics from Ion-Gel-Gated Vertical Van der Waals Heterostructures.

Low-voltage complementary circuits comprising n-type and p-type van der Waals heterojunction vertical field-effect transistors (VFETs) are demonstrated. The resulting VFETs possess high on-state current densities (>3000 A cm(-2) ) and on/off current ratios (>10(4) ) in a narrow voltage window (<3 V).

Probing Out-of-Plane Charge Transport in Black Phosphorus with Graphene-Contacted Vertical Field-Effect Transistors.

Black phosphorus (BP) has recently emerged as a promising narrow band gap layered semiconductor with optoelectronic properties that bridge the gap between semimetallic graphene and wide band gap transition metal dichalcogenides such as MoS2. To date, BP field-effect transistors have utilized a lateral geometry with in-plane transport dominating device characteristics. In contrast, we present here a vertical field-effect transistor geometry based on a graphene/BP van der Waals heterostructure. The resulting device characteristics include high on-state current densities (>1600 A/cm(2)) and current on/off ratios exceeding 800 at low temperature. Two distinct charge transport mechanisms are identified, which are dominant for different regimes of temperature and gate voltage. In particular, the Schottky barrier between graphene and BP determines charge transport at high temperatures and positive gate voltages, whereas tunneling dominates at low temperatures and negative gate voltages. These results elucidate out-of-plane electronic transport in BP and thus have implications for the design and operation of BP-based van der Waals heterostructures.

Black phosphorus radio-frequency transistors.

Few-layer and thin film forms of layered black phosphorus (BP) have recently emerged as a promising material for applications in high performance nanoelectronics and infrared optoelectronics. Layered BP thin films offer a moderate bandgap of around 0.3 eV and high carrier mobility, which lead to transistors with decent on-off ratios and high on-state current densities. Here, we demonstrate the gigahertz frequency operation of BP field-effect transistors for the first time. The BP transistors demonstrated here show respectable current saturation with an on-off ratio that exceeds 2 × 10(3). We achieved a current density in excess of 270 mA/mm and DC transconductance above 180 mS/mm for hole conduction. Using standard high frequency characterization techniques, we measured a short-circuit current-gain cutoff frequency fT of 12 GHz and a maximum oscillation frequency fmax of 20 GHz in 300 nm channel length devices. BP devices may offer advantages over graphene transistors for high frequency electronics in terms of voltage and power gain due to the good current saturation properties arising from their finite bandgap, thus can be considered as a promising candidate for the future high performance thin film electronics technology for operation in the multi-GHz frequency range and beyond.

Ultralong aligned single-walled carbon nanotubes on flexible fluorphlogopite mica for strain sensors

Single-walled carbon nanotubes (SWNTs) are expected to be an ideal candidate for making highly efficient strain sensing devices owing to their unique mechanical, electronic, and electromechanical properties. Here we present the use of fluorphlogopite mica (F-mica) as a flexible, high-temperature-bearing and mechanically robust substrate for the direct growth of horizontally aligned ultra-long SWNT arrays by chemical vapor deposition (CVD), which in turn enables the straightforward, facile, and cost-effective fabrication of macro-scale SWNT-array-based strain sensors. Strain sensing tests of the SWNT-array devices demonstrated fairly good strain sensitivity with high ON-state current density. Open image in new window

SiC power Schottky and PiN diodes

The present state of SiC power Schottky and PiN diodes are presented in this paper. The design, fabrication, and characterization of a 130 A Schottky diode, 4.9 kV Schottky diode, and an 8.6 kV 4H-SiC PiN diode, which are considered to be significant milestones in the development of high power SiC diodes, are described in detail. Design guidelines and practical issues for the realization of high-power SiC Schottky and PiN diodes are also presented. Experimental results on edge termination techniques applied to newly developed, extremely thick (e.g., 85 and 100 /spl mu/m) 4H-SiC epitaxial layers show promising results. Switching and high-temperature measurements prove that SiC power diodes offer extremely low loss alternatives to conventional technologies and show the promise of demonstrating efficient power circuits. At sufficiently high on-state current densities, the on-state voltage drop of Schottky and PiN diodes have been shown to be comparable to those offered by conventional technologies.