(Invited) Low-Voltage Complementary Electronics from Ion Gel-Gated Vertical Van Der Waals Heterostructures

Abstract

Isolation of ultrathin layered materials with disparate electronic properties has prompted their integration into van der Waals heterostructures with unique properties for electronics. By employing ion gel dielectrics, we demonstrate here low-voltage complementary circuits comprised of n-type and p-type van der Waals heterojunction vertical field-effect transistors (VFETs). The n-type and p-type VFETs were fabricated from MoS2 and WSe2 layers on graphene, respectively, with gating achieved by a top ion gel dielectric. Due to the high specific capacitance of the ion gel dielectric, the work function of the underlying graphene and consequently the energy barrier for charge injection into the MoS2 and WSe2 layers are widely tuned at low operating voltages. The resulting VFETs possess high on-state current densities (> 3000 A cm-2) and on/off current ratios (> 104) in a narrow voltage window (< 3 V). In addition to enhancing VFET device metrics at reduced operating voltages, the high specific capacitance of the ion gel dielectric allows unprecedented regimes of charge transport to be accessed including p-channel phenomena in graphene-MoS2 vertical heterostructures. Furthermore, since the ion gel-gated VFETs possess low threshold voltages, a low-power complementary logic inverter is demonstrated using n-type and p-type VFETs. Overall, these results demonstrate the feasibility of vertical van der Waals heterostructures for high-performance, low-voltage electronics.