High-density Circuits Research Articles

Reconfigurable Vertical Phototransistor with MoTe2 Homojunction for High-Speed Rectifier and Multivalued Logical Circuits.

The most reported two-dimensional (2D) reconfigurable multivalued logic (RMVL) devices primarily involve a planar configuration and carrier transport, which limits the high-density circuit integration and high-speed logic operation. In this work, the vertical transistors with reconfigurable MoTe2 homojunction are developed for low-power, high-speed, multivalued logic circuits. Through top/bottom dual-gate modulation, the transistors can be configured into four modes: P-i-N, N-i-P, P-i-P, and N-i-N. The reconfigurable rectifying and photovoltaic behaviors are observed in P-i-N and N-i-P configurations, exhibiting ideal diode characteristics with a current rectification ratio over 105 and sign-reversible photovoltaic response with a photoswitching ratio up to 7.44 × 105. Taking advantage of the seamless homogeneous integration and short vertical channel architecture, the transistor can operate as an electrical switch with an ultrafast speed of 680 ns, surpassing the conventional p-n diode. The MoTe2 half-wave rectifier is then applied in high-frequency integrated circuits using both square wave and sinusoidal waveforms. By applying an electrical pulse with a 1/4 phase difference between two input signals, the RMVL circuit has been achieved. This work proposes a universal and reconfigurable vertical transistor, enabled by dual-gate electrostatic doping on top/bottom sides of MoTe2 homojunction, suggesting a high integration device scheme for high-speed RMVL circuits and systems.

Hybrid additive-subtractive manufacturing of high-density copper-based flexible transparent circuits based on side-etch process

High-density flexible transparent circuits (FTCs) are widely used in 5G/6G flexible transparent antennas, wearable devices, flexible transparent electronics and other fields. However, the rapid iteration and upgrading of electronic circuits present significant challenges to the manufacturing of both high-density and high-precision circuits (especially copper-based circuits) at room temperature, in an efficient and flexible manner. Here, we employ the side-etching phenomenon, which is typically avoided, to propose a novel method for hybrid additive-subtractive fabricating high-density copper-based FTCs that combines electric field-driven (EFD) microjet printing and wet etching technology. Firstly, the customized photoresist mask was flexibly printed on the copper-clad flexible substrate by EFD microjet printing, and then the copper circuit with less than the mask resolution was obtained by the side etching process of the wet etching process. By optimizing process parameters and precisely controlling the speed of the side etching stage during the etching process, the manufacturing of high-precision copper-based FTCs with a minimum line width of 2.4 μm and a minimum pitch of 4 μm was achieved. The typical sample is manufactured with a resistivity of 4 × 10−6 Ω·cm, a sheet resistance of 3.58 Ω/sq at a transmittance of up to 87.65 % (including the substrate), and it exhibits excellent mechanical stability. The prepared high-density flexible transparent interdigital electrode has excellent sensitivity, and can detect the concentration change of dilute H2SO4 solution at a minimum of 1 nmol/L at a frequency of 100–10,000 Hz. This method provides a new solution for the fabrication of copper-based FTCs at room temperature with high efficiency and low cost, and shows a good prospect for industrial application.

Three-dimensional integrated metal-oxide transistors

AbstractThe monolithic three-dimensional vertical integration of thin-film transistor (TFT) technologies could be used to create high-density, energy-efficient and low-cost integrated circuits. However, the development of scalable processes for integrating three-dimensional TFT devices is challenging. Here, we report the monolithic three-dimensional integration of indium oxide (In2O3) TFTs on a silicon/silicon dioxide (Si/SiO2) substrate at room temperature. We use an approach that is compatible with complementary metal–oxide–semiconductor (CMOS) processes to stack ten n-channel In2O3 TFTs. Different architectures—including bottom-, top- and dual-gate TFTs—can be fabricated at different layers in the stack. Our dual-gate devices exhibit enhanced electrical performance with a maximum field-effect mobility of 15 cm2 V−1 s−1, a subthreshold swing of 0.4 V dec−1 and a current on/off ratio of 108. By monolithically integrating dual-gate In2O3 TFTs at different locations in the stack, we created unipolar invertor circuits with a signal gain of around 50 and wide noise margins. The dual-gate devices also allow fine-tuning of the invertors to achieve symmetric voltage-transfer characteristics and optimal noise margins.

Lithium tantalate photonic integrated circuits for volume manufacturing

Electro-optical photonic integrated circuits (PICs) based on lithium niobate (LiNbO3) have demonstrated the vast capabilities of materials with a high Pockels coefficient1,2. They enable linear and high-speed modulators operating at complementary metal–oxide–semiconductor voltage levels3 to be used in applications including data-centre communications4, high-performance computing and photonic accelerators for AI5. However, industrial use of this technology is hindered by the high cost per wafer and the limited wafer size. The high cost results from the lack of existing high-volume applications in other domains of the sort that accelerated the adoption of silicon-on-insulator (SOI) photonics, which was driven by vast investment in microelectronics. Here we report low-loss PICs made of lithium tantalate (LiTaO3), a material that has already been adopted commercially for 5G radiofrequency filters6 and therefore enables scalable manufacturing at low cost, and it has equal, and in some cases superior, properties to LiNbO3. We show that LiTaO3 can be etched to create low-loss (5.6 dB m−1) PICs using a deep ultraviolet (DUV) stepper-based manufacturing process7. We demonstrate a LiTaO3 Mach–Zehnder modulator (MZM) with a half-wave voltage–length product of 1.9 V cm and an electro-optic bandwidth of up to 40 GHz. In comparison with LiNbO3, LiTaO3 exhibits a much lower birefringence, enabling high-density circuits and broadband operation over all telecommunication bands. Moreover, the platform supports the generation of soliton microcombs. Our work paves the way for the scalable manufacture of low-cost and large-volume next-generation electro-optical PICs.

Low-Temperature Synthesis of WSe2 by the Selenization Process under Ultrahigh Vacuum for BEOL Compatible Reconfigurable Neurons.

Low-temperature large-area growth of two-dimensional (2D) transition-metal dichalcogenides (TMDs) is critical for their integration with silicon chips. Especially, if the growth temperatures can be lowered below the back-end-of-line (BEOL) processing temperatures, the Si transistors can interface with 2D devices (in the back end) to enable high-density heterogeneous circuits. Such configurations are particularly useful for neuromorphic computing applications where a dense network of neurons interacts to compute the output. In this work, we present low-temperature synthesis (400 °C) of 2D tungsten diselenide (WSe2) via the selenization of the W film under ultrahigh vacuum (UHV) conditions. This simple yet effective process yields large-area, homogeneous films of 2D TMDs, as confirmed by several characterization techniques, including reflection high-energy electron diffraction, atomic force microscopy, transmission electron microscopy, and different spectroscopy methods. Memristors fabricated using the grown WSe2 film are leveraged to realize a novel compact neuron circuit that can be reconfigured to enable homeostasis.

Frequency doubler utilizing hetero gate dielectric tunnel field-effect transistor

With the rapid advancements in wireless communication and high-density integrated circuits, the demand for high-frequency sources has become paramount for transmitting vast amounts of information. Modern communication systems often utilize low-frequency sources at the transmitting end, converting them into high-frequency carriers through Intermediate Frequency (IF) for transmission to the receiving end. However, challenges arise in stabilizing high-frequency Voltage Controlled Oscillators (VCOs), leading to the necessity of Frequency Multipliers (FMs) in high-frequency circuits. While existing FMs face issues like harmonic distortion due to internal nonlinear devices, this paper proposes a single-device Frequency Doubler (FD) operation using Hetero-Gate Tunnel Field Effect Transistor (HG-TFET) with ambipolar characteristics. HG-TFET integrates high-κ (HK) materials and an HG structure in the gate dielectric, achieving independent control of tunneling distances and synchronous operation of source-to-channel and channel-to-drain tunneling currents (I SC and I CD) to facilitate FD operation. The paper presents the HG-TFET structure, process flow, and simulation models, followed by an exploration of its operating mechanism and characteristics. The FD circuit configuration, operational principles, and conditions for normal operation are detailed, emphasizing the importance of aligning I SC and I CD. The impact of adjusting HK lengths on I SC and I CD is analyzed, demonstrating the ability to independently control these currents through HG-TFET. Simulation results for FD operation under varying HK lengths (1–10 nm) validate the proposed approach. Additionally, the paper investigates the influence of dielectric constant (10–32) and gate dielectric thickness (2–5 nm) on FD performance, highlighting the potential for further optimization. In conclusion, this study establishes a foundation for normal FD operation through the symmetrical control of ambipolar and on currents using HG-TFET. The proposed structure and techniques open avenues for improving the efficiency and reliability of frequency-doubling applications in high-frequency circuits.

High-density superconductive logic circuits utilizing 0 and π josephson junctions

Superconductor Electronics (SCE) is a fast and power-efficient technology with great potential for overcoming conventional CMOS electronics’ scaling limits. Nevertheless, the primary challenge confronting SCE today is its integration level, which lags several orders of magnitude behind CMOS circuits. In this study, we have innovated and simulated a novel logic family grounded in the principles of phase shifts occurring in 0 and π Josephson junctions. The fast phase logic (FPL) eliminates the need for large inductor loops and shunt resistances by combining the half-flux and phase logic. Therefore, the Josephson junction (JJ) area only limits the integration density. The cells designed with this paradigm are fast, and the clock-to-Q delay for logic cells is about 4ps. While maintaining over 50% parameter margins for wiring cells. This logic is power efficient and can increase the integration by at least 100×in the SCE chips.

Large-area, untethered, metamorphic, and omnidirectionally stretchable multiplexing self-powered triboelectric skins

Large-area metamorphic stretchable sensor networks are desirable in haptic sensing and next-generation electronics. Triboelectric nanogenerator-based self-powered tactile sensors in single-electrode mode constitute one of the best solutions with ideal attributes. However, their large-area multiplexing utilizations are restricted by severe misrecognition between sensing nodes and high-density internal circuits. Here, we provide an electrical signal shielding strategy delivering a large-area multiplexing self-powered untethered triboelectric electronic skin (UTE-skin) with an ultralow misrecognition rate (0.20%). An omnidirectionally stretchable carbon black-Ecoflex composite-based shielding layer is developed to effectively attenuate electrostatic interference from wirings, guaranteeing low-level noise in sensing matrices. UTE-skin operates reliably under 100% uniaxial, 100% biaxial, and 400% isotropic strains, achieving high-quality pressure imaging and multi-touch real-time visualization. Smart gloves for tactile recognition, intelligent insoles for gait analysis, and deformable human-machine interfaces are demonstrated. This work signifies a substantial breakthrough in haptic sensing, offering solutions for the previously challenging issue of large-area multiplexing sensing arrays.

Non-volatile 2 × 2 optical switch using multimode interference in an Sb2Se3-loaded waveguide.

We propose a non-volatile 2 × 2 photonic switch based on multimode interference in an Sb2Se3-loaded waveguide. The different modal symmetries of the TE0 and TE1 modes supported in the multimode region change their propagation constants distinctly upon the Sb2Se3 phase transition. Through careful optical design and FDTD optimization of the multimode waveguide dimensions, efficient switching is achieved despite the modest index contrast of Sb2Se3 relative to Ge2Sb2Te5. The fabricated optical switch demonstrates favorable characteristics, including low insertion loss of ∼1 dB, a compact length of ∼27 µm, and small cross talk below -15 dB across a 35 nm bandwidth. Such non-volatile and broadband components will be critical for future high-density programmable photonic-integrated circuits for optical communications and signal processing.

High performance junctionless FDSOI SiGe channel p-FinFET with high ION/IOFF ratio and excellent SS

This paper presents a novel FDSOI FinFETs with SiGe channel/Si cap layer (35 nm/5 nm) formed on SOI wafers with 20 nm Si body. Electrical characterization result shows that JL FDSOI FinFETs with SiGe channel exhibited low subthreshold slope (SS) of 86 mV/decade and record high ON-OFF current ratio (ION/IOFF = 2 × 106) at VD = -0.5V, respectively. Device performance improvement was mainly attributed to high-epitaxial quality compressive strained SiGe channel and novel device structure. The strain in the channel of the transistors was estimated locally in TEM using Nano beam diffraction (NBD) technique. The FDSOI FinFET with SiGe channel, lays the foundation for the further development of high speed, high density, low cost, and 3D monolithic integration circuits.

Design of T-shaped non-uniform microstrip lines for reducing crosstalk in high-speed PCBs

High-speed and high-density PCB circuit layout design faces serious signal integrity problems. Crosstalk is one of the key problems affecting signal quality. Periodic non-uniform differential microstrip lines have the possibility of reducing crosstalk. This paper proposes a T-shaped non-uniform microstrip line, which adds the T-shaped bump on the inner side of the parallel microstrip lines. The microstrip line adopts the minimum batch production process linewidth to maintain high density, which is suitable for occasions where the line spacing is three times the linewidth. The principle of crosstalk mitigation for T-shaped microstrip lines is explained, and the evolution process of T-shaped microstrip lines is given, compared with parallel microstrip lines and tabbed lines with the same density. The simulation resulting in the time domain and frequency domain shows that the transmission performance of the T-shaped microstrip line is good, and crosstalk can be effectively suppressed in a high-frequency band, even better in some specific frequencies due to the crosstalk fluctuation with frequency.

Controllable analog-to-digital bipolar resistive switching behavior and mechanism analysis in δ-MnO2-based memristor

Memristor is one of the most emerging electronic components to realize synaptic functions in the neuromorphic computing. Memristor with controllable analog-to-digital resistive switching behaviors has the potential to considerably accelerate the realization of high-performance neuromorphic computing. In this work, a memristor with Ag/δ-MnO2/Ti structure was fabricated, and an analog-to-digital resistive switching behavior with voltage regulation was demonstrated. Memristive switching with analogue characteristics can generate a gradual increase in conductance at low voltage of less than 1.3 V to aid in the building of artificial synapses. The Ag/δ-MnO2/Ti memristor with excellent digital resistive switching performance can be applied for data storage and in-memory computation at voltage windows of higher than 1.3 V. Furthermore, the resistive switching mechanism was analyzed by employing the first-principle calculation. The main reason for the emergence of digital memristor characteristics is the Ag+ ions can enter to the δ-MnO2 layer driven by a larger voltage and continue to cluster and form conductive filament. This work enriches the application of analog-to-digital bipolar memristor in neuromorphic computing, and facilitates further realization of memristor in low-power and high-density circuit integration.

Research on intermittent fault of bond wire under thermal and vibration shock based on simulation and experiments

As equipment usage environments become increasingly complex and harsh, the reliability of chips as the core of high-density integrated circuits becomes increasingly important. Bond wires, as weak links, are the focus of reliability research. Traditional research has focused on permanent failures, while intermittent failures have received little attention due to their unpredictable nature, but their existence cannot be ignored. This article simulates temperature shock and vibration environments on bond wires, demonstrating that the dangerous area of bond wires is located at the junction of the gold wire and the chip solder pad. It also explains that intermittent failures are caused by the degradation or potential damage of bond wires that are further damaged when subjected to environmental shocks, with the effective contact area of the damaged area changing with the shock and the resistance changing significantly. Based on the theory of contact resistance, relevant models were constructed for simulation, and the effect of micro-protrusion depth on contact resistance was studied. The article then designed and constructed an experimental circuit to carry out intermittent failure verification tests and studied the characteristics of intermittent failure currents. This research provides theoretical and technical support for the study of intermittent failures in high-density integrated circuits.

Flexible, Transparent, and Wafer-Scale Artificial Synapse Array Based on TiOx /Ti3 C2 Tx Film for Neuromorphic Computing.

A high-density neuromorphic computing memristor array based on 2Dmaterials paves the way for next-generation information-processing components and in-memory computing systems. However, the traditional 2D-materials-based memristor devices suffer from poor flexibility and opacity, which hinders the application of memristors in flexible electronics. Here, a flexible artificial synapse array based on TiOx /Ti3 C2 Tx film is fabricated by a convenient and energy-efficient solution-processing technique, which realizes high transmittance (≈90%) and oxidation resistance (>30 days). The TiOx /Ti3 C2 Tx memristor shows low device-to-device variability, long memory retention and endurance, a high ON/OFF ratio, and fundamental synaptic behavior. Furthermore, satisfactory flexibility (R = 1.0mm) and mechanical endurance (104 bending cycles) of the TiOx /Ti3 C2 Tx memristor are achieved, which is superior to other film memristors prepared by chemical vapor deposition. In addition, high-precision (>96.44%) MNIST handwritten digits recognition classification simulation indicates that the TiOx /Ti3 C2 Tx artificial synapse array holds promise for future neuromorphic computing applications, and provides excellent high-density neuron circuits for new flexible intelligent electronic equipment.

Driving Strategy Based on Artificial Neuron Device for Array Circuits

Over the past many years, array circuits, as an important part of electronic systems, show a wide range of application scenarios. However, the pursuit of high-density array circuits will certainly lead to a steep increase in the area of the array driving circuit. In this article, we present a switching array circuit with an artificial neuron, where the neuron acts as a discrete control center for the array circuit, which can effectively reduce the area of the array driving circuit by 75%. In this work, we found that the value of load resistance can affect the switching of individual devices and control the branch threshold voltage range, thus affecting the information processing capability of the branch. This new paradigm of optimized array circuit driving strategy can be used to tune the set and reset threshold voltage of neurons, while processing and outputting information by using this type of configuration. This work provides a potential platform for promoting the development of electronic devices and future high-density array circuits.

Full two-dimensional ambipolar CFET-like architecture for switchable logic circuits

As the scaling of integrated circuits based on silicon semiconductors becomes increasingly challenging due to the minimum feature size being close to the physical limit, the urgent demand for alternative strategies has fuelled the rapid growth of techniques and material innovations. Here, we report on the fabrication of vertically stacked ambipolar complementary field-effect transistor that is fully composed of two-dimensional materials of WSe2/h-BN/graphene/h-BN/WSe2 heterostructures. The ambipolar feature of the top and bottom WSe2 FET enables a switchable inverter behavior with a favorable voltage gain of up to 75, which can work in both the first and third quadrants. Based on the switchable characteristics, a large voltage swing circuit for single photon avalanche detectors is proposed without any bulky negative-voltage components. This work could open a new pathway for future two-dimensional electronics and ultimate monolithic 3D high-density integration circuits.

Thick-film – a mature technology at the cutting edge of advances in the electronics industry

For decades, thick-film technology has proven to be a dependable, cost-efficient method for highly reliable electronic circuitry and components. Hybrid microelectronics was the first major application for fired thick-film materials, finding its way into military and aerospace applications, where reliability is paramount. Inner and outer electrodes for passive components have been another traditional thick-film market. One of the main advantages of thick film is that it is an additive process, where the various conductor, resistor, and dielectric pastes are screen-printed and fired or cured in succession to form the circuit. This results in cost-efficient processing for the circuit manufacturer. Patterned screens are relatively easy to manufacture, allowing for flexibility in circuit design, and screen printing allows for flexibility in feature sizes from hundreds of microns down to 30 microns or less. The main drivers in electronics today are miniaturization – higher circuit density, adaptation to new forms such as 3D and flexible substrates, and ecological factors such as reduced energy consumption, waste reduction, and reduction in the use of toxic substances (RoHS – REACH). Thick film has evolved to address these main drivers and due to its reliability, flexibility, and adaptability, The technology has found new applications. 5G telecommunications utilizes highly conductive silver coatings on signal filters for low losses. Automobiles have historically used thick film technology in fuel/air sensors, air bag deployment sensors, and electronic control units (ECUs). Current vehicles have become computers on wheels and have multiple driver assistance sensors (ADAS), e.g. lane departure warning, blind spot monitoring, automatic braking, regenerative braking, and fully autonomous driving. Both fired and non-fired thick-film technology is enabling these developments. Also in the automotive space, applications include thick film heaters for cabin comfort, heaters keeping ADAS sensors free from frost and snow, and heaters for battery management systems (BMS) in electric vehicles. Polymer thick-film (PTF) pastes for cured (90 – 250o C) electronic circuitry on temperature sensitive polymers have also been around for decades, used in membrane touch-switch keypads and similar circuity. Recently, new applications have emerged for PTF in printed electronics, where the ability to develop flexible, highly durable pastes is enabling new applications in flexible displays, medical monitoring, and performance enhancement in sports. As the megatrends continue to drive the advancement in technologies, the versatility, reliability, and adaptability of thick-film technology is expected to continue to facilitate these advancements. Heraeus Electronics, with its extensive portfolio of thick-film pastes and matched systems, is primed to support these advancements.

Investigation of electroless copper plating with high plating coverage in small BVH for next generation fine pattern SAP

Printed wiring board (PWB) used for package substrates are required to have higher circuit densities. We anticipate that PWB circuit patterns and blind via hole (BVH) will continue to be miniaturized due to higher density requirements. The electroless copper plating solution generally used has less chemical material supply to the inside of the BVH than the surface of the substrate. As a result, the copper thickness at the bottom of the BVH tends to be thinner than that on the surface of the substrate. It is difficult to uniformly deposit the electroless copper plating in the BVH on the package substrate by the semi-additive process (SAP), especially when the BVH are becoming smaller. Therefore, we investigated additives that suppress the electroless copper plating deposition on the surface of the substrate and additives that improve the permeability of the plating solution into the BVH. Two additives have been discovered that dramatically improve the plating uniformity in the small BVH compared to the conventional bath. In addition, we used this plating solution with the new additives to evaluate the internal stress and peel strength of the electroless copper plating film. As a result, it was confirmed that both internal stress and peel strength were improved compared to the conventional bath.

Weak optical modes for high-density and low-loss photonic circuits

Dielectric optical waveguides constitute the main building blocks of photonic integrated circuits (PICs). Channels with high refractive index contrast can provide very compact PIC components, whereas structures with lower index exhibit less propagation loss. A hybrid concept that can combine the best of high- and low-index materials is highly required. Here, we devise a new approach to realize compact and low-loss hybrid optical waveguides based on the interaction of weak optical modes. This is a rather universal approach that can be applied to a wide range of optical materials. To prove the principle, the hybrid waveguide structure is formed by combining a low-index polymer and a thin layer of silicon nitride. For this material combination, a minimum bending radius of 90 µm (for a bending loss of 0.005 dB/90°) and a propagation loss of 0.7 dB/cm are achieved. The viability of this platform is demonstrated through a series of high-performance novel PIC components. This hybrid waveguide platform enabled by a powerful and simple design concept holds great promise for high-density and low-loss PICs.

Resistive Switching Characteristic of Cu Electrode-Based RRAM Device

The conductive bridge random access memory (CBRAM) device has been widely studied as a promising candidate for next-generation nonvolatile memory applications, where Cu as an electrode plays an important role in the resistive switching (RS) process. However, most studies only use Cu as one electrode, either the top electrode (TE) or the bottom electrode (BE); it is rarely reported that Cu is used as both TE and BE at the same time. In this study, we fabricated CBRAM devices by using Cu as both the TE and BE, and studied the RS characteristic of these devices. With Al2O3 as the switching layer (5~15 nm), the devices showed good bipolar RS characteristics. The endurance of the device could be as high as 106 cycles and the retention time could be as long as 104 s. The Al2O3 thickness influences the bipolar RS characteristic of the devices including the initial resistance, the forming process, endurance, and retention performance. The Cu electrode-based RRAM devices also present negative bias-suppressed complementary resistive switching (CRS) characteristics, which makes it effective to prevent the sneak path current or crosstalk problem in high-density memory array circuits.