HfSiON Gate Stacks Research Articles

Time-dependent dielectric breakdown (TDDB) distribution in n-MOSFET with HfSiON gate dielectrics under DC and AC stressing

This paper discusses time-dependent dielectric breakdown (TDDB) in n-FETs with HfSiON gate stacks under various stress conditions. It was found that the slope of Weibull distribution of Tbd, Weibull β, changes with stress conditions, namely, DC stress, unipolar AC stress and bipolar AC stresses. On the other hand, the time evolution component of stress-induced leakage current (SILC) was not changed by these stresses. These experimental results indicate that the modulation of electron trapping/de-trapping and hole trapping/de-trapping by stress condition changes the defect size in high-k gate dielectrics. Therefore, the control of injected carrier and the characteristics of trapping can provide the steep Weibull distribution of Tbd, leading to long-term reliability in scaled CMOS devices with high-k gate stacks.

Effects of Electron Current and Hole Current on Dielectric Breakdown in HfSiON Gate Stacks

Effects of Electron Current and Hole Current on Dielectric Breakdown in HfSiON Gate Stacks

Effects of Electron Current and Hole Current on Dielectric Breakdown in HfSiON Gate Stacks

The roles of electrons and holes in the dielectric breakdown of HfSiON have been investigated by controlling the numbers of injected hot electrons and hot holes separately by the substrate hot-carrier injection technique. It has been clarified that carrier flux has the strongest effect on the dielectric breakdown of HfSiON rather than carrier energy and the electric field across dielectrics. The amount of electron flux leading to the dielectric breakdown of HfSiON is about twice as large as that of hole flux.

Evaluation of the N- and La-induced defects in the high-κ gate stack using low frequency noise characterization

Low frequency noise (LFN) characterization was performed on the HfSiON gate stacks fabricated with the SiON interfacial layers (ILs) and a La cap layer. The LFN data identified N and La related defects located in the IL/HK region.

Atomic-scale theory on degradation of HfSiON gate stacks by atomic hydrogen accompanied by its interaction with oxygen vacancy and substitutional nitrogen

An atomic-scale model for the degradation of Hf silicates (HfSiON) gate stacks triggered by atomic hydrogen strongly influencing oxygen vacancy ( V O) generation in HfSiON and its interfacial layer is proposed based on first-principles calculations. We found that the atomic hydrogen is always negatively charged in the high- k stacks and diffuses fast as interstitials with very low energy barriers along electric fields irrespective of the Fermi level of the whole system. These characteristics of the atomic hydrogen induce bias-polarity dependent degradations of the high- k stacked dielectrics. It agrees well with the experimental results, especially evident in high- k p-FETs. We also found that although both oxygen vacancies and substitutional nitrogen atoms at the oxygen sites (N O) attract each other and stabilize the atomic hydrogen, substitutional nitrogens have also possibility to act as preserving a puckered configuration of the V O 2 + accompanied by a hydrogen interstitial under a hole existence. These H atom complexes accompanied by V Os and N Os may also enhance the degradation of the high- k stacks.

Effect of an Ultrathin SiN Cap Layer on the Bias Temperature Instability in Metal–Oxide–Semiconductor Field-Effect Transistors with HfSiON Gate Stacks

The negative-bias temperature instability (NBTI) and positive-bias temperature instability (PBTI) of HfSiON/SiO2 metal–oxide–semiconductor field-effect transistors (MOSFETs) with and without an ultrathin SiN cap layer were investigated. For the PBTI of n-channel MOSFETs, the dominant degradation mechanism is the electron tunneling from the Si channel and electron trapping in the pre-existing traps in HfSiON. The SiN cap layer does not make a significant difference in PBTI. For the NBTI of p-channel MOSFETs, on the other hand, both the electron trapping in HfSiON and the dissociation of Si–H bonds at the SiO2/channel-Si interface (i.e., the interface trap generation) play a role and the SiN cap layer makes a significant difference in NBTI: the dominant degradation mechanism for the devices without the SiN cap layer is the electron trapping in HfSiON, whereas that for the devices with the SiN cap layer is the interface trap generation. This indicates that the interfacial SiN cap layer can effectively suppress the electron tunneling from the polycrystalline silicon (polySi) gate to HfSiON under the NBT stress.

(Invited) An Electron-Beam-Induced Current Investigation of Electrical Defects in High-k Gate Stacks

We succeeded in applying electron-beam-induced current (EBIC) technique to visualize the current leakage sites in the MOS devices with HfSiON gate dielectrics. The occurrence of initial leakage sites in fresh devices has been investigated with consideration of the effects of well type, gate size and gate electrode. Stress-induced leakage and breakdown sites were studied by in situ voltage stress and EBIC characterization. Finally, the micro-structure and physical damages at various leakage sites were characterized by TEM. Based on the EBIC and TEM results, the leakage and breakdown mechanisms of HfSiON gate stacks were discussed.

On the 1/f noise of triple-gate field-effect transistors with high-k gate dielectric

The low-frequency noise of triple-gate fin field-effect transistors (finFETs) fabricated on silicon-on-insulator (SOI) substrates, with HfO2 or HfSiON gate stacks has been studied. In most cases, 1/fγ noise has been observed with γ<1 for low frequencies f. It is shown that this type of noise can be ascribed to number fluctuations and scales with the effective device area. Based on a simple tunneling model, the noise spectral density has been converted to an oxide trap density profile, exhibiting a decay in Not for larger distances from the Si–SiO2 interface. This stands in contrast with planar bulk devices with a similar high-k gate stack and seems to be typical for the fin processing used, irrespective of further process details, like the use of selective epitaxial growth, strained SOI or strain-inducing cap layers.

Electron transport through electrically induced nanoconstrictions in HfSiON gate stacks

A microscopic picture for the progressive leakage current growth in electrically stressed HfxSi1−xON∕SiON gate stacks in metal-oxide-semiconductor transistors based on the physics of mesoscopic conductors is proposed. The breakdown spot is modeled as a nanoconstriction connecting two electron reservoirs. We show that after eliminating the tunneling current component that flows through the nondamaged device area, the postbreakdown conductance exhibits levels of the order of the quantum unit 2e2∕h, where e is the electron charge and h the Planck’s constant, as is expected for atomic-sized contacts. Similarities and differences with previous studied systems are discussed.

Photoemission Study of Metal/HfSiON Gate Stack

Chemical bonding features in metal (TiN or Ru)/HfSiON gate stacks and electrical potential changes due to dipoles at the metal/dielectric interfaces have been studied by back-side x-ray photoemission measurements of the samples after wet-chemical removal of Si substrate. The photoemission threshold of the metal gate measured through the ultrathin dielectric layer confirms that the potential change of the gate metals, which is nearly equivalent to the difference in the flat-band voltage shift between capacitors with SiO2 and HfSiON, is caused by electron transfer from the HfSiON layer to the metal gate near the interface. From the recovery in the gate potential induced by oxygen incorporation into HfSiON, oxygen vacancies in the HfSiON layer are likely to be possible origin of the gate potential change. Also, from the experimental fact that the gate potential change becomes significant with decreasing thickness of the interfacial SiO2 layer below 3.5nm in Ru/HfSiON/SiO2 gate stacks, it is suggested that the generation of oxygen vacancies in HfSiON caused by oxidation reaction of Si substrate through ultrathin SiO2 layer plays an important role on the electron transfer near the Ru/HfSiON interface.

Electron energy dependence of defect generation in high-k gate stacks

In this work, we employ the substrate hot electron injection technique as a characterization tool to examine the defect creation mechanisms in high-k HfSiON gate stacks, taking advantage of the independent control over oxide field, electron fluence, and injected electron energy which the technique allows. We show that defect creation and oxide breakdown are dependent on the energy of the injected electrons and not on the oxide field. Furthermore, we show that the energy of the injected electrons governs whether the majority of the defects are created at the Si∕SiO2 interface or in the bulk of the material. Results show that at operating conditions, the primary threat to device reliability from hot carrier damage is the introduction of a permanent 3D positive bias temperature instability component introduced by increased interface trap generation, even for carriers with energy slightly above that of field accelerated electrons. We also discuss the feasibility of using substrate hot electron injection as a means to accelerate time dependent dielectric breakdown measurements, thereby allowing degradation at lower oxide fields to be probed.

Improvement in Positive-Bias-Temperature-Instabilities Reliability and Device Performance of TaSiN∕HfSiON Gate Stacks with High Temperature Post-Nitridation Annealing

We have investigated the effect of a post-nitridation-annealing (PNA) temperature on bias-temperature-instabilities (BTI) reliability and device performance of gate stacks formed by atomic layer deposition technology using and precursors. The gate stacks were intended for use in conventional metal gate transistors with a high temperature thermal budget of . Ultrathin effective-oxide-thickness films of about could be achieved with HfSiON gate stacks by using a PNA treatment. Moreover, the positive-BTI lifetimes of the PNA samples were improved by about one order of the magnitude with respect to lifetimes of the PNA samples, ten year lifetimes being readily achieved with at .

Band offsets and chemical bonding states in N-plasma-treated HfSiON gate stacks studied by photoelectron spectroscopy and x-ray absorption spectroscopy

We have investigated valence band and conduction band electronic structures and interfacial chemical bonding states of nitrogen-plasma-treated HfSiON∕SiON gate stacks on Si substrates with and without rapid thermal annealing by photoelectron spectroscopy and x-ray absorption spectroscopy to correlate them with electrical properties. We have found that the N3 component in N 1s can be correlated with electron trapping. Photoelectron spectra and O K-edge absorption spectra confirm the existence of the SiO2-rich phase-separated area in HfSiON films. Band offsets for the HfSiON∕Si and the SiO2-rich HfSiON∕Si are determined to be 2.5 and 4.2eV for valence band and 1.7 and 3.6eV for conduction band, respectively.

Impact of Hf content on negative bias temperature instabilities in HfSiON-based gate stacks

The shift of the threshold voltage, Vth, of p-channel metal-oxide-semiconductor field-effect transistors with HfSiON gate stacks, subjected to negative bias temperature stress, is investigated. It is found that Vth shift increases with time, like a power law, with an exponent that decreases with the amount of Hf in the HfSiON layer. Within the reaction-diffusion model for negative bias temperature instabilities, this finding suggests that the transport of hydrogen species in the gate stack is slower (i.e., more dispersive) in Hf-rich silicate layers. This result is also consistent with the observed increase in activation energy related to the hopping of the species in the gate stack with the Hf content, extracted from the temperature acceleration of Vth shifts. It is also found that negative bias temperature instabilities are reduced in layers with Hf content of about 50 at. %. This “optimum” is tentatively attributed to the interplay between the slower transport of the hydrogen species and the larger density of interface and bulk defects in the gate stack when the Hf content increases.

Influence of Charge Traps within HfSiON Bulk on Positive and Negative Bias Temperature Instability of HfSiON Gate Stacks

We characterized how positive and negative bias temperature instabilities (PBTI and NBTI) occur in HfSiON gate stacks. The PBTI was confirmed to be suppressed by using amorphous (a-) HfSiON instead of crystallized (c-) HfSiON. The a-HfSiON reduced the capture cross-section and lowered the density of electron traps, which explains the suppression of the PBTI. The different trap parameters for a-HfSiON and c-HfSiON suggest that the electron traps of these structures have different origins. The PBTI of a-HfSiON gates occurred through electron trapping without generation of interface traps, while the NBTI of a-HfSiON gates occurred through generation of interface traps and positive oxide charges. Furthermore, it was found that the NBTI of a-HfSiON gates also involves electron trapping. Additionally, the subthreshold slope decreased under positive BT stress. We attribute these characteristic BTI behaviors of HfSiON gates to the influence of charge traps that are present within the HfSiON bulk.