Heterogeneous Integration Research Articles

3D Nanoprinting of Heterogeneous Metal Oxides with High Shape Fidelity.

3D nanoprinting can significantly enhance the performance of sensors, batteries, optoelectronic/microelectronic devices, etc. However, current 3D nanoprinting methods for metal oxides are suffering from three key issues including limited material applicability, serious shape distortion, and the difficulty of heterogeneous integration. This paper discovers a mechanism in which imidazole and acrylic acid synergistically coordinate with metal ions in water. Using the mechanism, this work develops a series of metal ion synergistic coordination water-soluble (MISCWS) resins for 3D nanoprinting of various metal oxides, including MnO2, Cr2O3, Co3O4, and ZnO, as well as heterogeneous structures of MnO2/NiO, Cr2O3/Al2O3, and ZnO/MgO. Besides, the synergistic coordination effect results in a 2.54-fold increase in inorganic mass fraction within the polymer, compared with previous works, which effectively mitigates the shape distortion of metal oxide microstructures. Based on this method, this work also demonstrates a 3D ZnO microsensor with a high sensitivity (1.113 million at 200ppm NO2), surpassing the conventional 2D ZnO sensors by tenfold. The method yields high-fidelity 3D structures of heterogeneous metal oxides with nanoscale resolution, paving the way for applications such as sensing, micro-optics, energy storage, and microsystems.

Challenges: ESD Protection for Heterogeneously Integrated SoICs in Advanced Packaging

Electrostatic discharge (ESD) failure is a major reliability problem for all forms of microelectronics products. ESD protection is required for all integrated circuits (ICs). As dimension scaling-down approaches its physical limit, heterogeneous integration (HI) emerges as a main pathway towards the age beyond Moore’s Law to facilitate advanced microsystem chips with extreme performance and rich functionalities. Advanced packaging is a key requirement for HI-enabled integrated systems-on-chiplets (SoIC) that require robust ESD protection solutions. This article outlines key emerging technical challenges associated with smart future SoIC microsystem superchips in the context of advanced packaging technologies.

Interweaved filler network in epoxy resin with reduced interface thermal resistance via in-situ high-temperature “welding” for significantly improved thermal conductivity

For heterogeneous integration in harsh environments, polymeric materials are required to integrate excellent insulating property with significant thermal conductivity. Traditional discrete fillers used in polymeric matrix to create thermal pathways introduce numerous contact interfaces, leading to limited thermal conductivity enhancement efficiency (TCE) and unstable dielectric properties. Here, a distinctive strategy, involving the preparation of an interweaved thermally conductive filler with inherent heat channels through self-templated electrospinning and in-situ high-temperature “interface welding”, is proposed to reduce the interface thermal resistance (ITR). The growth of grains at high temperature facilitates the process of “interface welding”, while self-templated electrospinning establishes intrinsic thermal conduction pathways. Consequently, the epoxy resin fortified with this interweaved filler exhibits an exceptionally TCE of 162.15 % and enhanced in-plane thermal conductivity of 3.75 W m−1 K−1 at ultra-low filler ratio of 7.10 vol%. The combination of high electrical insulation of filler and low filler content results in excellent electrical insulating property (>1017 Ω cm) and stable dielectric properties over a frequency range of 103-106 Hz, enabling the successful implementation of heterogeneous integration in challenging environments. This work has the potential to offer a groundbreaking approach for achieving interconnected functional networks within polymer-based composites.

Heterogeneous Integration of Memristive and Piezoresistive MDMO-PPV-Based Copolymers in Nociceptive Transmission with Fast and Slow Pain for an Artificial Pain-Perceptual System.

Nociceptive pain perception is a remarkable capability of organisms to be aware of environmental changes and avoid injury, which can be accomplished by specialized pain receptors known as nociceptors with 4 vital properties including threshold, no adaptation, relaxation, and sensitization. Bioinspired systems designed using artificial devices are investigated to imitate the efficacy and functionality of nociceptive transmission. Here, an artificial pain-perceptual system (APPS) with a homogeneous material and heterogeneous integration is proposed to emulate the behavior of fast and slow pain in nociceptive transmission. Retention-differentiated poly[2-methoxy-5-(3,7-dimethyoctyoxyl)-1,4-phenylenevinylene] (MDMO-PPV) memristors with film thicknesses of 160 and 80nm are manufactured and adopted as A-δ and C nerve fibers of nociceptor conduits, respectively. Additionally, a nociceptor mimic, the ruthenium nanoparticles (Ru-NPs)-doped MDMO-PPV piezoresistive pressure sensor, is fabricated with a noxiously stimulated threshold of 150kPa. Under the application of pricking and dull noxious stimuli, the current flows predominantly through the memristor to mimic the behavior of fast and slow pain, respectively, in nociceptive transmission with postsynaptic potentiation properties, which is analogous to biological pain perception. The proposed APPS can provide potential advancements in establishing the nervous system, thus enabling the successful development of next-generation neurorobotics, neuroprosthetics, and precision medicine.

Van der Waals Integration of Large-Area Monocrystalline 3D Perovskite Thin Films on Arbitrary Semiconductor Substrates for Heterojunctions.

Perovskite monocrystalline films are regarded as desirable candidates for the integration of high-performance optoelectronics due to their unique photophysical properties. However, the heterogeneous integration of a perovskite monocrystalline film with other semiconductors is fundamentally limited by the lattice mismatch, which hinders direct epitaxy. Herein, the van der Waals (vdW) integration strategy for 3D perovskites is developed, where perovskite monocrystalline films are epitaxially grown on the mother substrate, followed by its peeling off and transferring to arbitrary semiconductors, forming monocrystalline heterojunctions. The as-achieved CsPbBr3-Nb-doped SrTiO3 (Nb:STO) vdW p-n heterojunction exhibited comparable performance to their directly epitaxial counterpart, demonstrating the feasibility of vdW integration for 3D perovskites. Furthermore, the vdW integration could be extended to silicon substrates, rendering the CsPbBr3-n-Si and CsPbCl3-p-Si p-n heterojunction with apparent rectification behaviors and photoresponse. The vdW integration significantly enriches the selections of semiconductors hybridizing with perovskites and provides opportunities for monocrystalline perovskite optoelectronics with complex configurations and multiple functionalities.

An ultra-deep TSV technique enabled by the dual catalysis-based electroless plating of combined barrier and seed layers

Silicon interposers embedded with ultra-deep through-silicon vias (TSVs) are in great demand for the heterogeneous integration and packaging of opto-electronic chiplets and microelectromechanical systems (MEMS) devices. Considering the cost-effective and reliable manufacturing of ultra-deep TSVs, the formation of continuous barrier and seed layers remains a crucial challenge to solve. Herein, we present a novel dual catalysis-based electroless plating (ELP) technique by tailoring polyimide (PI) liner surfaces to fabricate dense combined Ni barrier/seed layers in ultra-deep TSVs. In additional to the conventional acid catalysis procedure, a prior catalytic step in an alkaline environment is proposed to hydrolyze the PI surface into a polyamide acid (PAA) interfacial layer, resulting in additional catalysts and the formation of a dense Ni layer that can function as both a barrier layer and a seed layer, particularly at the bottom of the deep TSV. TSVs with depths larger than 500 μm and no voids are successfully fabricated in this study. The fabrication process involves low costs and temperatures. For a fabricated 530-μm-deep TSV with a diameter of 70 μm, the measured depletion capacitance and leakage current are approximately 1.3 pF and 1.7 pA at 20 V, respectively, indicating good electrical properties. The proposed fabrication strategy can provide a cost-effective and feasible solution to the challenge of manufacturing ultra-deep TSVs for modern 3D heterogeneous integration and packaging applications.

Counter-intuitive mechanical performance variation in aged low-temperature interconnections in electronic packaging

Different from the conventional aging induced continuous mechanical performance deterioration in solder joints, a counter-intuitive “decrease-increase-decrease” variation in shear strength with a peak value 12 MPa higher than the initial state was captured in aged low-temperature BGA structure Cu/Sn–58Bi/Cu solder joints. The first decrease in shear strength was dominated by the coarsening of Sn and Bi phases. The following increase in shear strength was rooted in the concurrent Bi subgrain strengthening, solid solution strengthening of Bi element in Sn-rich phase and precipitation strengthening induced by the Bi-rich phase particles. The eventual decrease in shear strength was ascribed to severely deteriorated interface between the solder matrix and intermetallic compound layer being the weaker site in the long time aged solder joint. This aging induced strengthening phenomenon is inspiring in mechanical performance optimization and reliability elevation of SnBi-based solder joints for the coming chiplet and heterogeneous integration packaging.

Van der Waals Encapsulation by Ultrathin Oxide for Air-Sensitive 2D Materials.

The ambient stability is one of the focal points for applications of 2D materials, especially for those well-known air-sensitive ones, such as black phosphorus (BP) and transitional metal telluride. Traditional methods of encapsulation, such as atomic layer deposition of oxides and heterogeneous integration of hexagonal boron nitride, can hardly avoid removal of encapsulation layer when the 2D materials are encapsulated for further device fabrication, which causes complexity and damage during the procedure. Here, a van der Waals encapsulation method that allows direct device fabrication without removal of encapsulation layer is introduced using Ga2O3 from liquid gallium. Taking advantage of the robust isolation ability against ambient environment of the dense native oxide of gallium, hundreds of times longer retention time of (opto)electronic properties of encapsulated BP and MoTe2 devices is realized than unencapsulated devices. Due to the ultrathin high-κ properties of Ga2O3, top-gated devices are directly fabricated with the encapsulation layer, simultaneously as a dielectric layer. This direct device fabrication is realized by selective etching of Ga2O3, leaving the encapsulated materials intact. Encapsulated 1T' MoTe2 exhibits high conductivity even after 150 days in ambient environment. This method is, therefore, highlighted as a promising and distinctive one compared with traditional passivation approaches.

Integration of O-band quantum dot lasers with AlGaN/GaN waveguides

We integrate edge-emitting etched-facet InAs/GaAs quantum dot (QD) lasers to an AlGaN/GaN-on-sapphire waveguide platform via micro-transfer printing. The lasers are placed into a trench etched into the sapphire substrate so as to transversely align the waveguides. The AlGaN/GaN waveguide structure is designed to allow for tolerant alignment of the active lasing mode to the passive waveguide mode. 4 μm wide waveguides show a TE propagation loss of 4.5 dB/cm. For a QD laser with a 1.2 mm long cavity and 3.5 μm wide ridge waveguide, 2.3 mW was measured at 80 mA under continuous wave conditions from the end of a 0.64 cm long 4 μm wide waveguide with an estimated coupling efficiency of >20 %. The measured coupled output power is 1.5 mW at 70°C and 100 mA. To our knowledge, this is the first demonstration of the heterogeneous integration of a GaAs lasing device to a GaN-based PIC by any means. The results show real promise for GaN to be a suitable platform for integrated photonics applications requiring O-band operation.

Multiphysics simulation study of thermal stress effects in nanoscale FinFETs heterogeneously integrated with GaN high-power device on silicon substrate

Heterogeneous integration enables high-density integration to improve system functionality, but meanwhile brings reliability concerns due to the intensification of temperature and thermal stress. However, research on thermal stress effects in nanoscale transistors within heterogeneous integrated circuit is still very limited up to now. Multiphysics computation for the heterogeneous integration of nanoscale p-FinFET with GaN high electron mobility transistor (HEMT) on silicon substrate is performed. Firstly, self-heating of GaN HEMT induced thermal stress is simulated. Then, thermal stress effects induced by the GaN HEMT on quantum transport in the FinFET at different locations are compared and analyzed, including the hole effective mass, hole average velocity, on/off-state current, and on-off ratio. Moreover, the impacts of crystal orientation configurations are further discussed. Simulation results show that the impact of thermal stress on FinFET is highly dependent on the Si crystal orientation and its location relative to GaN HEMT. Taking the FinFET with (001)/[110] confinement/transport orientation, which is at a distance of RFET and an angle of φ from the GaN HEMT as an example, thermal stress induces the significant reductions in Ion and Ioff of FinFET at φ = π/2 and φ = 3π/2, and the increases of Ion and Ioff in FinFET at φ = 0 and φ = π, but has small impact on FinFETs located diagonally to the GaN HEMT.

Co-Packaged Optics - Heterogeneous Integration of Photonic IC and Electronic IC

Abstract The trends in co-packaged optics will be investigated in this study. Emphasis is placed on the heterogeneous integration of photonic IC (PIC) and electronic IC (EIC). In particular, 2D and 3D heterogeneous integration of ASIC Switch, PIC and EIC w/o bridges, and heterogeneous integration of ASIC Switch, PIC and EIC on glass substrate will be discussed. Some recommendations will be provided.

Optically Transparent Microwave Wilkinson Power Divider With Heterogeneous Integration

Optically Transparent Microwave Wilkinson Power Divider With Heterogeneous Integration

Preparation of high-performance Bi-YG ferrite based on LTCC technology and theoretical analysis of its sintering mechanism

In the preparation process of Microwave Multi-Chip Module (MMCM), it is necessary to simultaneously sinter both microwave medium (ferrite) and silver electrodes. Hence, this necessitates keeping the sintering temperature below the melting point of silver (961 °C). An excessively low sintering temperature would significantly impair the electromagnetic properties of the ferrite material. To address this concern, this study synthesizes Bi-YIG (Y3-xBixFe5O12, x = 0–1.0) ferrites with optimized characteristics, including low ferromagnetic resonance line-width (ΔH) and high saturation magnetization (Ms), at 945 °C using Low Temperature Co-fired Ceramic (LTCC) technology. The mechanism of low-temperature liquid phase sintering, facilitated by a fluxing agent, was investigated using a theoretical model. The addition of Bi2O3 fluxing agent was found to reduce the reaction activation energy, disrupt the chemical reaction equilibrium, and promote low-temperature liquid phase sintering, thus lowering the critical sintering temperature below the melting point of silver. Furthermore, optimal bismuth content was identified to regulate the dynamic balance between grain growth and boundary diffusion, suppressing abnormal grain growth and enhancing the electromagnetic properties of the ferrite. This exploration, leveraging LTCC technology, may offer valuable insights for enhancing the overall performance of MMCMs.

Wafer-Scale GaN-Si(100) Monolithic Heterogeneous Integration Inverters With Improved Output Voltage Swing and Fast Switching Capability by Transfer Printing and Self-Aligned Etching Technology

Wafer-Scale GaN-Si(100) Monolithic Heterogeneous Integration Inverters With Improved Output Voltage Swing and Fast Switching Capability by Transfer Printing and Self-Aligned Etching Technology

A Miniaturized Filtering Power Divider With High Selectivity and Wide Stopband Based on 3-D Heterogeneous Integration Technology

A Miniaturized Filtering Power Divider With High Selectivity and Wide Stopband Based on 3-D Heterogeneous Integration Technology

Heterogeneous integration of spin-photon interfaces with a CMOS platform.

Colour centres in diamond have emerged as a leading solid-state platform for advancing quantum technologies, satisfying the DiVincenzo criteria1 and recently achieving quantum advantage in secret key distribution2. Blueprint studies3-5 indicate that general-purpose quantum computing using local quantum communication networks will require millions of physical qubits to encode thousands of logical qubits, presenting an open scalability challenge. Here we introduce a modular quantum system-on-chip (QSoC) architecture that integrates thousands of individually addressable tin-vacancy spin qubits in two-dimensional arrays of quantum microchiplets into an application-specific integrated circuit designed for cryogenic control. We demonstrate crucial fabrication steps and architectural subcomponents, including QSoC transfer by means of a 'lock-and-release' method for large-scale heterogeneous integration, high-throughput spin-qubit calibration and spectral tuning, and efficient spin state preparation and measurement. This QSoC architecture supports full connectivity for quantum memory arrays by spectral tuning across spin-photon frequency channels. Design studies building on these measurements indicate further scaling potential by means of increased qubit density, larger QSoC active regions and optical networking across QSoC modules.

Investigation on memory package crack and prevention under temperature cycling test

Memory package with multiple die stacking in one package faced package crack issue during package level temperature cycling test (TCT) and the failure cycle cannot meet reliability requirement. Failure analysis showed epoxy molding compound (EMC) cracking located at the center area of package surface. Finite element modeling and simulation was conducted to study package stress and failure mechanism under cyclic temperature loading condition. Simulation results showed that the center of package surface is subjected to higher stress and stress variation during stringent TCT test due to high and tight die stacking structure. Several parametric studies were conducted to further understand failure mechanism and provide solution for crack prevention. Design guideline was proposed to eliminate or reduce package crack risk for multi-chip package (MCP) in memory chip package.

Integration Of Solution‐Processed BaTiO3 Thin Films with High Pockels Coefficient on Photonic Platforms

AbstractThe heterogeneous integration of ferroelectric BaTiO3 thin films on silicon (Si) and silicon nitride (SiN)‐based platforms for photonic integrated circuits (PICs) plays a crucial role in the development of future nanophotonic thin film modulators. Since the electro‐optic (EO) properties of ferroelectric thin films strongly depend on their crystal phase and texture, the integration of BaTiO3 thin films on these platforms is far from trivial. So far, a conventional integration route using a SrTiO3 template film in combination with high vacuum deposition methods has been developed, but it has a low throughput, is expensive and requires monocrystalline substrates. To close this gap, a cost‐efficient, high‐throughput and scalable method for integrating highly textured BaTiO3 films is needed. Therefore, an alternative method for the integration of highly textured BaTiO3 films using a La2O2CO3 template film in combination with a chemical solution deposition (CSD) process is presented. In this work, the structural and EO properties of the solution‐processed BaTiO3 film are characterized and its integration into an optical ring resonator is evaluated. The BaTiO3 film exhibits a fiber texture, has a large Pockels coefficient (reff) of 139 pm V−1, and integration into a ring resonator‐based modulator shows a VπL of 1.881 V cm and a bandwidth of > 40 GHz. This enables low‐cost, high‐throughput, and flexible integration of BaTiO3 films on PIC platforms and the potential large‐scale fabrication of nanophotonic BaTiO3 thin‐film modulators.

Reconfigurable stochastic neurons based on strain engineered low barrier nanomagnets

Stochastic neurons are efficient hardware accelerators for solving a large variety of combinatorial optimization problems. ‘Binary’ stochastic neurons (BSN) are those whose states fluctuate randomly between two levels +1 and −1, with the probability of being in either level determined by an external bias. ‘Analog’ stochastic neurons (ASNs), in contrast, can assume any state between the two levels randomly (hence ‘analog’) and can perform analog signal processing. They may be leveraged for such tasks as temporal sequence learning, processing and prediction. Both BSNs and ASNs can be used to build efficient and scalable neural networks. Both can be implemented with low (potential energy) barrier nanomagnets (LBMs) whose random magnetization orientations encode the binary or analog state variables. The difference between them is that the potential energy barrier in a BSN LBM, albeit low, is much higher than that in an ASN LBM. As a result, a BSN LBM has a clear double well potential profile, which makes its magnetization orientation assume one of two orientations at any time, resulting in the binary behavior. ASN nanomagnets, on the other hand, hardly have any energy barrier at all and hence lack the double well feature. That makes their magnetizations fluctuate in an analog fashion. Hence, one can reconfigure an ASN to a BSN, and vice-versa, by simply raising and lowering the energy barrier. If the LBM is magnetostrictive, then this can be done with local (electrically generated) strain. Such a reconfiguration capability heralds a powerful field programmable architecture for a p-computer whereby hardware for very different functionalities such as combinatorial optimization and temporal sequence learning can be integrated in the same substrate in the same processing run. This is somewhat reminiscent of heterogeneous integration, except this is integration of functionalities or computational fabrics rather than components. The energy cost of reconfiguration is miniscule. There are also other applications of strain mediated barrier control that do not involve reconfiguring a BSN to an ASN or vice versa, e.g. adaptive annealing in energy minimization computing (Boltzmann or Ising machines), emulating memory hierarchy in a dynamically reconfigurable fashion, and control over belief uncertainty in analog stochastic neurons. Here, we present a study of strain engineered barrier control in unconventional computing.

Tunable and Reversible Adhesive of Liquid Metal Ferrofluid Pillars for Magnetically Actuated Noncontact Transfer Printing.

Transfer printing techniques based on tunable and reversible adhesives enable the heterogeneous integration of materials in desired layouts and are essential for developing both existing and envisioned electronic systems. Here, a novel tunable and reversible adhesive of liquid metal ferrofluid pillars for developing an efficient magnetically actuated noncontact transfer printing is reported. The liquid metal ferrofluid pillars offer the appealing advantages of gentle contact force by minimizing the preload effect and exceptional shape adaptability by maximizing the interfacial contact area due to their inherent fluidity, thus enabling a reliable damage-free pickup. Moreover, the liquid metal ferrofluid pillars harness the rapid stiffness increase and shape change with the magnetic field, generating an instantaneous ejection force to achieve a receiver-independent noncontact printing. Demonstrations of the adhesive of liquid metal ferrofluid pillars in transfer printing of diverse objects with different shapes, materials and dimensions onto various substrates illustrate its great potential in deterministic assembly.