Abstract

Memory package with multiple die stacking in one package faced package crack issue during package level temperature cycling test (TCT) and the failure cycle cannot meet reliability requirement. Failure analysis showed epoxy molding compound (EMC) cracking located at the center area of package surface. Finite element modeling and simulation was conducted to study package stress and failure mechanism under cyclic temperature loading condition. Simulation results showed that the center of package surface is subjected to higher stress and stress variation during stringent TCT test due to high and tight die stacking structure. Several parametric studies were conducted to further understand failure mechanism and provide solution for crack prevention. Design guideline was proposed to eliminate or reduce package crack risk for multi-chip package (MCP) in memory chip package.

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