Heavy Test Research Articles

Area-Efficient Temporally Hardened by Design Flip-Flop Circuits

Two temporally hardened master-slave flip-flops are presented. Both designs utilize master latches containing Muller C-elements and dual redundant temporal hardening, as well as spatially interleaved circuits in both the master and slave latches to obtain large critical node spacing for immunity to multiple node charge collection. Heavy ion test results on the first flip-flop, which uses a DICE slave latch, demonstrates effectiveness of the temporal hardening approach. The second design uses a temporally hardened slave latch, which also hardens the flip-flop against clock transients. The use of automated CAD synthesis and layout techniques using these multibit flip-flops is also described, as is the hardening impact on design size and power.

Cross-Section Estimation in the Presence of Uncertain Dosimetry

For parts that are to be used on-orbit, the final result of a set of heavy-ion tests is a prediction of the upset rate for a particular orbit. This prediction is made by combining the cross- section vs. LET for the part with a model of the on-orbit radiation environment. Typically a single cross-section curve is used when computing the upset rate prediction. However, the test data do not define the cross-section exactly—there will be uncertainty in the estimated cross-section vs. LET response due to finite count data, errors in the dosimetry, and other testing and device uncertainties. These uncertainties in the cross-section vs. LET response will result in uncertainties in the predicted on-orbit upset rate. We present methodology that can capture these uncertainties, and demonstrate how to apply it for the case of dosimetry errors. As well as estimating the uncertainty in the cross-section vs. LET response, we also estimate the actual fluences, and the size of the dosimetry errors. The cross-section vs. LET response is typically modeled by a Weibull curve when the cross-section estimate is used for on-orbit upset rate prediction. However, the use of a Weibull to model the cross-section vs. LET response is purely conventional; it has no physical justification. Other models (e.g. lognormal) can be used, and the resulting model uncertainty has an impact on the uncertainty of the on-orbit upset rate predictions. We fit a lognormal curve to the test data, and show the impact of model choice on the on-orbit upset rate distribution. Typically the Weibull curve is fitted in stages, using different approaches for the onset LET and the other parameters. We show how the approach presented here can include explicitly the constraints that are implicit in the standard approach, and also provide a method for overcoming the ill-conditioned nature of Weibull fitting. Using the uncertainty in the predicted on-orbit upset rates as a quality measure can give valuable information regarding when sufficient testing has been performed.

Heavy Ion Testing With Iron at 1 GeV/amu

A 1 GeV/amu <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">56</sup> Fe ion beam allows for true 90° tilt irradiations of various microelectronic components and reveals relevant upset trends at the GCR flux energy peak. Three SRAMs and an SRAM-based FPGA evaluated at the NASA Space Radiation Effects Laboratory demonstrate that a 90° tilt irradiation yields a unique device response. These tilt angle effects need to be screened for, and if found, pursued with radiation transport simulations to quantify their impact on event rate calculations.

Estimation of Heavy-Ion LET Thresholds in Advanced SOI IC Technologies From Two-Photon Absorption Laser Measurements

The laser energy thresholds for SEU for SOI 1-Mbit SRAMs built in Sandia's 0.35-μm SOI technology were measured using carrier generation by two-photon absorption. The laser measurements were correlated to heavy-ion threshold LET measurements to determine an empirical relationship between laser energy threshold and heavy-ion threshold LET. This empirical relationship was used to estimate the threshold LETs for other circuits built in Sandia's 0.35-μm SOI technology and SRAMs built in IBM's 45 and 65-nm SOI technologies. For an ASIC built in Sandia's 0.35-μm SOI technology the estimated threshold from laser measurements was close to the measured heavy-ion threshold LET. However, for a dual-port SRAM also built in Sandia's 0.35-μm SOI technology and for the 45- and 65-nm IBM SOI SRAMs, the threshold LETs estimated from laser measurements did not correlate to the measured heavy-ion threshold LETs. For the IBM SRAMs, the likely cause of the discrepancy between the threshold LETs estimated from laser measurements and the threshold LETs measured by heavy-ion testing is due to the laser pulse simultaneously injecting charge into multiple transistors within a memory cell and/or in adjacent memory cells. This is due to the relatively large size of the laser spot size compared to the size of the SEU sensitive volume of the IBM SOI devices. The hardness assurance implications of these results are discussed.

A Commercial 65 nm CMOS Technology for Space Applications: Heavy Ion, Proton and Gamma Test Results and Modeling

This paper presents new experimental and modeling evidences that advanced commercial CMOS technologies get intrinsically harder against space radiations with technology downscaling. A 65 nm commercial bulk CMOS process can deliver improved radiation-tolerance without sacrificing electrical performance.

Heavy-ion test of detectors with conventional and resistive Micromegas used in TPC configuration

Abstract We have performed tests of Micromegas detector prototypes using the heavy-ion beams from the SIS synchrotron of GSI (Darmstadt, Germany). The beams varied from C 6 + 12 to Au 65 + 179 and from 250 to 1000 MeV per nucleon. We have tested two amplification technologies, conventional and resistive Micromegas, and two construction concepts, bulk-Micromegas and micro-meshes screwed on the PCB. The obtained position resolution below 200 μ m for 5 mm wide strips implies that the bulk resistive Micromegas technology might meet the requirements of the future R3B TPC project. We also developed a fast and very low noise front-end electronics connected directly to the Printed Circuit Board (PCB) of the detector itself. This concept has shown very good performances and robustness.

Use of Laser to Explain Heavy Ion Induced SEFIs in SDRAMs

In this work, using heavy ion and pulsed laser tests on a 110 nm 256 Mbit SDRAM, different SEFI types and other logic-related radiation effects are studied and explained. Effects seen using heavy ions were reproduced and localized on the die with the laser. Among the effects, Fuse-Latch Upsets were found to be responsible of typical addressing errors and were more particularly investigated. Moreover, an unusual logic-related effect, called SET in Voltage Buffer, was induced using heavy ions, and localized afterward with the laser. Soft SEFI and Hard SEFI were also investigated.

Worst-Case Test Conditions of SEGR for Power DMOSFETs

Heavy ion test results show worst-case test conditions for single-event gate rupture (SEGR) of power MOSFETs. Contrary to common belief, the worst-case ion condition for SEGR is not the ion with the deepest penetration depth in the device or highest LET at the die surface, but the ion beams with Bragg peak positioned at or near the interface of the epitaxial layer and the highly doped substrate. The factors that have significant impact on SEGR thresholds are evaluated and discussed. The factors that are considered include: ion beam, drain bias, gate bias, ion species, ion range, surface LET and the construction layer of the power DMOSFET. An estimated worst-case ion range table for krypton, xenon and gold is provided for reference.

Heavy Ion Testing and Single Event Upset Rate Prediction Considerations for a DICE Flip-Flop

Monte-Carlo simulation using the MRED software suite, coupled with SPICE analysis, is used to identify internal mechanisms of SEU in DICE flip-flops. Low frequency cross-section measurements and simulations identify multiple-node charge collection SEU mechanisms as the dominant contributor. An increasingly isotropic response is predicted with increasing frequency due to latching of internal single-node transients near clock boundaries. Implications for heavy ion testing and SEU rate prediction are presented.

Effects of Ionizing Radiation on Digital Single Event Transients in a 180-nm Fully Depleted SOI Process

Effects of ionizing radiation on single event transients are reported for Fully Depleted SOI (FDSOI) technology using experiments and simulations. Logic circuits, i.e. CMOS inverter chains, were irradiated with cobalt-60 gamma radiation. When charge is induced in the n-channel FET with laser-probing techniques, laser-induced transients widen with increased total dose. This is because radiation causes charge to be trapped in the buried oxide, and reduces the p-channel FET drive current. When the p-channel FET drive current is reduced, the time required to restore the output of the laser-probed FET back to its original condition is increased, i.e. the upset transient width is increased. A widening of the transient pulse is also observed when a positive bias is applied to the wafer without any exposure to radiation. This is because a positive wafer bias reproduces the shifts in FET threshold voltages that occur during total dose irradiation. Results were also verified with heavy ion testing and mixed mode simulations.

Dissociative recombination of CF+: Experiment and theory

We present results from our recent studies of the dissociative recombination of the CF+ cation. On one hand, dissociative recombination was measured with 3 MeV CF+ ions in the heavy-ion Test Storage Ring in Heidelberg, using the twin electron beam configuration with an electron cooler and a separated electron target for collision measurements. In this experiment, the low temperatures of the electron beam provided by a photocathode (temperature in co-moving frame below 1 meV) account for a fast kinetic cooling of the heavy-ion beam and a high resolution in the measured rate coefficients. Fragment imaging measurements show a complete switching of the dissociation route by only a small change of the collision energy and the disappearance of neutral Rydberg product states on crossing the DE threshold. On the other hand, extensive calculations of energy positions and autoionization widths for the doubly excited states of CF between the first and second ionization thresholds have been obtained from electron scattering calculations using the complex Kohn variational method, followed by calculations of the dissociative recombination process with the multichannel quantum defect theory. In preliminary computations, only the first dissociative state in each molecular symmetry, which lies closest in energy to the ion potential at its equilibrium internuclear separation, and thus is dominant for the low-energy dissociative recombination, was included. Although only the direct mechanism of dissociative recombination reaction has been considered in this step, the size and the shape of the DR rate coefficient are already well reproduced.

Generation and Propagation of Single Event Transients in 0.18-$\mu{\rm m}$ Fully Depleted SOI

Single event transients were characterized experimentally in fast logic circuits fabricated in 0.18-mum FDSOI CMOS process using laser-probing techniques. We show that the transient pulse widens as it propagates; the widening is largely eliminated by the body contact. Good agreement is observed between pulsed-laser and heavy ion testing.

Radiation Effects in InGaAs and Microbolometer Infrared Sensor Arrays for Space Applications

Cobalt60, 60 MeV proton and heavy ion tests have been performed on InGaAs and amorphous silicon microbolometer arrays with CMOS readout circuits. The readout circuits showed latch-up at threshold LETs~14 MeV/mg/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , but the total dose and displacement damage effects were negligible for low earth orbit conditions. Effects in a microbolometer array tested, for use in Mercury orbit, to 100 krd(Si) and 3.2 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sup> 60 MeV p/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> showed acceptable performance, though there was a significant increase in power consumption for the CMOS readout circuit when biased during cobalt60 irradiation.

Single Event Effect Induced Multiple-Cell Upsets in a Commercial 90 nm CMOS Digital Technology

Heavy ion and proton single event upset (SEU) testing has been conducted on static random access memories (SRAM) from two commercial 90 nm technology nodes custom manufactured on epitaxial substrates. The SRAMs were from the same manufacturer; however, the SRAMs utilized two different 90 nm technology process nodes. One 90 nm node was for low power and the other was for performance. Both heavy ion and proton test results indicated multiple-cell upsets. Latchup was not observed in this low voltage epitaxial substrate sample testing. Heavy ion SEU data indicated that above a linear energy transfer of 7 (MeV-cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> )/mg the multiple-cell upsets outnumber the single-cell upsets. Charge sharing is considered the mechanism for multiple-cell upsets.

Proton-induced SEU in SiGe digital logic at cryogenic temperatures

We present the first experimental results confirming the increased SEE sensitivity of SiGe digital bipolar logic circuits operating in a 63 MeV proton environment at cryogenic temperatures. A 3× increase in both the error-event and bit-error cross sections is observed as the circuits are cooled from 300 K to 77 K, with error signature analyses indicating corresponding increases in the average number of bits-in-error and error length over data rates ranging from 50 Mbit/s to 4 Gbit/s. Single-bit-errors dominate the proton-induced SEU response at both 300 K and 77 K, as opposed to the multiple-bit-errors seen in the heavy-ion SEU response. Temperature dependent substrate carrier lifetime measurements, when combined with calibrated 2 D DESSIS simulations, suggest that the increased transistor charge collection at low temperature is a mobility driven phenomenon. Circuit-level RHBD techniques are shown to be very efficient in mitigating the proton- induced SEU at both 300 K and 77 K over the data rates tested. These results suggest that the circuit operating temperature must be carefully considered during component qualification for SEE tolerance and indicate the need for broad-beam heavy-ion testing at low temperatures.

Heavy Ion Testing and 3-D Simulations of Multiple Cell Upset in 65 nm Standard SRAMs

Heavy ions experiments are carried out on commercial 90 nm and 65 nm SRAMs. The contribution of single and multiple cell upsets (MCUs) are discussed as a function of the LET for different memory cell areas and for triple well usage. Once again, well engineering plays a key role on MCU and SEE response of SRAM. Full 3-D TCAD simulations investigate the occurrence of parasitic bipolar effect.

SEB Characterization of Commercial Power MOSFETs With Backside Laser and Heavy Ions of Different Ranges

This paper presents a validation of the methodology based upon backside laser irradiations to characterize the sensitivity of power devices towards single-event burnout. This is done thanks to high-energy heavy ion testing and device simulations.

Effects of Guard Bands and Well Contacts in Mitigating Long SETs in Advanced CMOS Processes

Mixed mode TCAD simulations are used to show the effects of guard bands and high density well contacts in maintaining the well potential after a single event strike and thus reduce the width of long transients in a 130-nm CMOS process. Experimental verification of the effectiveness in mitigating long transients was achieved by measuring the distribution of SET pulse widths produced by heavy ions for circuits with isolated contacts and for circuits with guard bands combined with larger contacts in a 130-nm process using an autonomous characterization technique. Heavy-ion test results indicate that controlling the well potential by using guard bands, along with high density well contacts, helps eliminate >70% of SETs longer than 1 ns.

Extension of a Proton SEU Cross Section Model to Include 14 MeV Neutrons

A model for estimating proton SEU cross sections from heavy-ion test data has been extended to include 14 MeV neutrons. Accuracy is less consistent for neutrons, but predictions can still be used for upper bounds.

Ultra-Low Power Radiation Hardened by Design Memory Circuits

A 3218 bit ultra-low power radiation-hardened by design (RHBD) register file is fabricated on a 130-nm bulk CMOS technology. Register file readout circuitry allows functionality down to . Dual interlocked cell (DICE) storage provides SEU immunity above in accelerated heavy ion testing. This memory is compared to a larger one using identical ultra low voltage circuit design techniques, but un-hardened, i.e., with conventional latch storage and using only two-edge transistor layout and no guard rings. The un-hardened ultra low voltage memory exhibits 100 lower leakage post-irradiation to 500 krad(Si), when irradiated and measured at , than when irradiated and measured with . Hence, for ultra-low power, ultra-low circuits, TID hardening techniques may be unnecessary. Read energy dissipated by the RHBD memory is 10.3 fJ per bit per operation when operated at 320 mV. The maximum operating frequency is 5 MHz at the same supply voltage.