Heavy Ion Single Event Research Articles

A comprehensive study of InGaAs based linearly graded channel DL-TFET and its single event transient effect

In this paper, the DC, RF and single-event transient effect studies are carried out for investigating the performance and reliability of hetero-junction InGaAs DL-TFET having linearly graded channel region. The mole-fraction of source side In1−xGaxAs is varied for obtaining the higher ION i.e. obtained at x = 0.40; this also impact the RF simulation studies by increasing the gain-bandwidth product range to 52.4 GHz. To reduce Iambipolar, a step junction is introduced for first time in the channel region at channel-drain interface which reduces the Iambipolar by 93.27% to the magnitude of 0.867 μA μm−1. Further reduction in ambipolarity is achieved at TG = 3.9 eV to the level of 0.269 fA μm−1, ION increases to 0.558 mA μm−1, sub-threshold swing is 23.8 mV/decade and shows highest cut-off frequency upto 155 GHz. Hence, the optimized device structure is investigated under the influence of single-event transient; therefore, the effect of heavy ion is investigated on optimized linearly graded structure for different LETs’ (Linear energy transfer). It shows increase in the drain current and charge collected with increase in LET. The maximum IDS is 0.618 mA μm−1 in OFF state, and IDS of 0.819 mA μm−1 in ON state at VDS = 1.0 V, which is higher than its ION at 10 MeV.cm2/mg (i.e. 0.11 pC μm−1). By simulating heavy ion single event effect on different positions, it is found that channel-drain interface is more sensitive to irradiation. This gives an insight for radiation hardened applications in space for TFET based circuit designs.

Heavy Ion Single Event Effects in CMOS Image Sensors: SET and SEU

High-energy particles in space often induce single event effects in CMOS image sensors, resulting in performance degradation and functional failure. This paper focuses on the formation and morphology of transient bright spots in CMOS image sensors and analyzes the formation process of transient bright spots by conducting heavy ion irradiation experiments to obtain the variation law of transient bright spots with heavy ion linear energy transfer values and background gray values; in addition, we classify the single event upset that occurred in the experiments according to the state of transient bright spots and extract the characteristics of different single event upsets. The failure mechanisms of different single event upsets are analyzed according to their characteristics and are combined with the information given by transient bright spots. This provides an essential reference for rapidly evaluating single event effects and the reinforcement design of CMOS image sensors.

Influences of well contact on multiple-cell upsets in 28 nm SRAM

In order to study the effects of the feature size reduction and well contact placement on the characterization of topology patterns and the charge collection mechanism of device heavy ion single event multiple upset on a nanometer scale, the heavy ion single event effect experiment on the domestic 28 nm static random-access memory (SRAM) is carried out on the experimental platform of HI-13 heavy ion accelerator in Beijing. Based on the mapping relationship between the logical address and physical address of the device, the experimental data are processed, and the 28 nm SRAM heavy ion single event upset cross section curves, multiple upset percentage, and multiple upset topology patterns are obtained. The results are compared with those of heavy ion single event effect experiments in 65 nm SRAM, showing that under the influences of factors such as feature size reduction and lower operating voltage, the heavy ion single event upset threshold and the bit upset saturation cross section of 28 nm SRAM decrease significantly. In the direction perpendicular to the well, owing to the reduced 28 nm SRAM feature size, even if the single nucleon energy of the incident high LET (linear energy transfer) heavy ion is low, its deposited charge is sufficient to affect the three SRAM cells across the well direction due to the combined effect of ion track coverage, well potential modulation caused by the parasitic bipolar amplification effect and carrier diffusion, resulting in the fact that the 28 nm SRAM topology pattern has a shape of <i>n</i> rows × 3 columns, which poses new challenges and requirements for the anti-radiation hardened technology with scrubbing and EDAC (error detection and correction). Owing to the global well contact deployment, the charge deposited by the incident ions in the well far away from the well contact is difficult to discharge quickly, and the parasitic bipolar amplification effect lasts longer. The charge sharing competition between two p-channel metal oxide semiconductor in SRAM cell causes the single event upset recovery, which is the fundamental reason why the discontinuity of multiple upset topology pattern appears in 28 nm SRAM. This study provides a new anti-radiation hardened idea for suppressing the single event upset by using the parasitic bipolar amplification in the future.

Heavy ion single event effect in double-trench SiC metal-oxide-semiconductor field-effect transistors

In this paper, experiments on 208 MeV Ge ion irradiation with different source-drain bias voltages are carried out for the double-trench SiC metal–oxide–semiconductor field-effect transistors, and the physical mechanism of the single event effect is analyzed. The experimental results show that the drain leakage current of the device increases more obviously with the increase of the initial bias voltage during irradiation. When the bias voltage is 400 V during irradiation, the device has a single event burned at a fluence of 9×10<sup>4</sup> ion/cm<sup>2</sup>, and when the bias voltage is 500 V, the device has a single event burned at a fluence of 3×10<sup>4</sup> ion/cm<sup>2</sup>, so when the LET value is 37.3 MeV·cm<sup>2</sup>/mg, the SEB threshold of DUT does not exceed 400 V, which is lower than 34% of the rated operational voltage. The post gate-characteristics test results show that the leakage current of the device with a bias voltage of 100 V does not change significantly during irradiation. When the bias voltage is 200 V, the gate leakage and the drain leakage of the device both increase, so do they when the bias voltage is 300 V, which is positively related to bias voltage. In order to further analyze the single particle effect mechanism of device, the simulation is conducted by using TCAD tool. The simulation results show that at low bias voltage, the heavy ion incident device generates electron-hole pairs, the electrons are quickly swept out, and the holes accumulate at the gate oxygen corner under the effect of the electric field, which combines the source-drain bias voltage, leading to the formation of leakage current channels in the gate oxygen layer. The simulation results also show that at high bias voltage, the electrons generated by the incident heavy ion move towards the junction of the N<sup>–</sup> drift layer and the N<sup>+</sup> substrate under the effect of the electric field, which further increases the electric field strength and causes significant impact ionization. The local high current density generated by the impact ionization and the load large electric field causes the lattice temperature to exceed the melting point of silicon carbide, causing single event burnout. This work provides a reference and support for studying the radiation effect mechanism and putting silicon carbide power devices into aerospace applications.

Research on single event effect test of a RRAM memory and space flight demonstration

As a non-volatile memory, the resistive random access memory (RRAM) has some advantages in radiation tolerance and application prospects in space. RRAM has the advantages of high storage density, high repetition times and three-dimensional storage. This paper analyzed the working principle of RRAM, selected an RRAM memory as the research object, carries out the sensitivity test of heavy ion single event effect. The single event effect on orbit outage rate of the device was calculated by using the space on-orbit prediction software, ForeCAST. In addition, the natural anti-radiation performance of the storage area of the device was verified by pulsed laser induced test, and the good anti-radiation performance of the device was further verified by space flight test.

Energy and angular dependence of single event upsets in ESA SEU Monitor

The new generation ESA SEU Monitor is first applied to beam verification of Beijing HI-13 Tandem accelerator according to the popularization need of Europe Space Agency and at the desire of contrast of domestic acceleraor with international accelerator. Heavy ion single event cross section of ESA SEU Monitor obtained at HI-13 is compared with those from European facilities. Beam homogeneity is also analyzed based on the SEU physical bitmap. The accuracy of heavy ion beam monitoring technique at HI-13 accelerator is verified. Through combining the heavy ion testing result with the data from the other test sites, it can be observed that the differences between SEU cross sections with different heavy ion energies of the same LET value can reach 1-3 orders of magnitude in the sub-threshold zone of single event upset cross section curve below the direct ionization LET threshold. The geometrical structure, critical charge and collection efficiency of sensitive volume are constructed on the basis of testing data and process information. The physical mechanism of energy effect on single event upsets in ESA SEU Monitor is revealed through using the Monte-Carlo calculation. Nuclear reactions between incident heavy ions and material atoms can account for single event upsets below the direct ionization LET threshold. The differences in nuclear reaction type and cross section between the diferent energy heavy ions and material atoms are the root cause of the difference among heavy ion SEU cross sections with different energies at the same LET value. On the other hand, SEU bitmap nonuniformity among different blocks in memory array and different orientation dices in ESA SEU Monitor is first reported when the heavy ion is incident at a tilting angle at the low LET value. The analysis of device layout and calculation verification can account for this phenomenon. The material of interlayer dielectric with the tilting ion passing through is different when heavy ion reaches the sensitive volume of memory blocks with different data. This leads to the difference between efficient LET values inside the sensitive volume for different data blocks. Eventually the sensitivity difference in single event upset among blocks with different data occures. The applications of ESA SEU Monitor in beam calibrating, tuning of domestic accelerator and single event effect test can be broadened further. Prediction method of space single event upset rate including heavy ion energy dependence and special angular dependence based on full-physical simulation should be developed in the future.

Impacts of test factors on heavy ion single event multiple-cell upsets in nanometer-scale SRAM

Single event multiple-cell upsets (MCU) increase sharply with the semiconductor devices scaling. The impacts of several test factors on heavy ion single event MCU in 65 nm SRAM are studied based on the buildup of MCU test data acquiring and processing technique, including the heavy ion LET, the tilt angle, the device orientation, the test pattern and the supply voltage; the MCU physical bitmaps are extracted correspondingly. The dependencies of parameters such as the MCU percentage, MCU mean and topological pattern on these factors are summarized and analyzed. This work is meaningful for developing a more reasonable single event test method and assessing the effectiveness of anti-MCU strategies on nanometer-scale devices.

纳米DDR SRAM器件重离子单粒子效应试验研究

纳米DDR SRAM器件重离子单粒子效应试验研究

Heavy Ion and High Energy Proton-Induced Single Event Transients in 90 nm Inverter, NAND and NOR Gates

We measure heavy ion and proton-induced SETs in inverters, and NAND and NOR gates from a 90 nm RHBD library. NAND and NOR gates have higher SET cross section and generate wider pulses than inverters.

Heavy Ion Testing and Single Event Upset Rate Prediction Considerations for a DICE Flip-Flop

Monte-Carlo simulation using the MRED software suite, coupled with SPICE analysis, is used to identify internal mechanisms of SEU in DICE flip-flops. Low frequency cross-section measurements and simulations identify multiple-node charge collection SEU mechanisms as the dominant contributor. An increasingly isotropic response is predicted with increasing frequency due to latching of internal single-node transients near clock boundaries. Implications for heavy ion testing and SEU rate prediction are presented.

Experimental study on heavy ion single event effects in SOI SRAMs

Silicon-on-insulator (SOI) technologies have been developed for radiation-hardened military and space applications. The use of SOI has been motivated by the full dielectric isolation of individual transistors, which prevents latch-up. The sensitive region for charge collection in SOI technologies is much smaller than for bulk-silicon devices potentially making SOI devices much harder to single event upset (SEU). In this study, 64 kB SOI SRAMs were exposed to different heavy ions, such as Cu, Br, I, Kr. Experimental results show that the heavy ion SEU threshold linear energy transfer (LET) in the 64 kB SOI SRAMs is about 71.8 MeV cm 2/mg. Accorded to the experimental results, the single event upset rate (SEUR) in space orbits were calculated and they are at the order of 10 −13 upset/(day bit).

Heavy-Ion SEE Test Concept and Results for DDR-II Memories

In order to investigate heavy ion single event effects (SEEs) in advanced commercial DDR-II SDRAM memories, a large number of practical problems need to be addressed ranging from test approach, sample preparation, error analysis, physical error identifications and effective LET corrections before test results can be presented. This paper continues where Harboe-Soslashrensen et al. , 2003, ended with further details on most of the critical steps mentioned above. Additionally, the first set of SEE data will be presented and discussed covering Samsung, Infineon, Micron, and Elpida 512 M-bit DDR-II memory devices.

The contribution of nuclear reactions to heavy ion single event upset cross-section measurements in a high-density SEU hardened SRAM

Heavy ion irradiation was simulated using a Geant4 based Monte-Carlo transport code. Electronic and nuclear physics were used to generate statistical profiles of charge deposition in the sensitive volume of an SEU hardened SRAM. Simulation results show that materials external to the sensitive volume can affect the experimentally measured cross-section curve.

Single event effects in PDSOI 4 M SRAM fabricated in UNIBOND

Heavy ion and proton single event upsets of 4 M SOI SRAM with a hardened delay element in each memory cell were evaluated. These 4 M SRAM were fabricated in UNIBOND substrates using a radiation hardened partially depleted silicon-on-insulator CMOS technology. Limiting heavy ion upset cross-section of 1.2/spl times/10/sup -10/ cm/sup 2//bit has been achieved. Limiting proton upset cross-section of 1.1/spl times/10/sup -17/ cm/sup 2//bit has also been obtained.

Update on parts SEE suspectibility from heavy ions

Jet Propulsion Laboratory (JPL) and the Aerospace Corporation have collected a fourth set of heavy ion single event effects (SEE) test data (previous sets were reported in contribution IEEE Trans. on Nuclear Sci. in December 1985, 1987, and 1989). Trends in SEE susceptibility (including soft errors and latchup) for state-of-the-art parts are displayed. All data are conveniently divided into two tables: one for MOS devices, and one for a shorter list of recently tested bipolar devices. In addition, a new table of data for latchup tests only (invariably CMOS processes) is given. >

Recent Trends in Parts SEU Susceptibility from Heavy Ions

JPL and Aerospace have collected an extensive set of heavy ion single event upset (SEU) test data since their last joint publication in December, 1985. Trends in SEU susceptibility for state-of-the-art parts are presented.