Hardware Redundancy Research Articles

МЕТОДИ ТА ЗАСОБИ ЗАБЕЗПЕЧЕННЯ ЗАВАДОСТІЙКОЇ ПЕРЕДАЧІ ІНФОРМАЦІЇ В ТЕЛЕКОМУНІКАЦІЙНИХ МЕРЕЖАХ

In the article the analysis of methods and means of ensuring the noise immunity transmission in telecommunication networks that use technologies in real time to ensure quality, valid and reliable data transmission under conditions of interference. For telecommunication networks the problem of optimal quality reception of information is to use the properties of the useful signal, interference, and transmission channel to increase the probability of correct reception. To increase the probability of correct reception needs to be pre-processed received signal that increases the signal interference. Transmission channels that use technologies that allow real-time to ensure quality, valid and reliable data transmission under conditions of interference provide better instruction indicators reliable transmission of information is carried out through the use of the necessary coding. During transmission on such channels, there are many difficulties associated with the impact of natural, industrial, intentional and unintentional interference. All methods of a noise stability in General lead to temporal and hardware redundancy as part of the source of information and of the addressee. Examine noise immunity of TCN as ability of the system to counteract to the hindrances, then it is necessary to know, what to counteract and on what to counteract, for a fight against hindrances a priori information is needed about properties of transmitter of information and about hindrances. Knowing all these properties of the signal and noise, it is possible to establish certain differences between them and use them to develop ways, means and methods to provide noise immunity. The aim of this article is realization of analysis of methods and backer-ups of interference immunity information transfer in TCNS, which will allow real-time to guarantee the quality, reliable and reliable transmission of the hindrances given in the conditions of influence. Unlike distortions hindrances carry casual character. They in are good time unknown and that is why cannot be fully removed. Knowledge of methods and facilities of construction of modern channels of transmission TCN in the conditions of action of hindrances, will allow building the reliable channels of information transfer for such networks.

Advanced Fault Tolerant Air-Fuel Ratio Control of Internal Combustion Gas Engine for Sensor and Actuator Faults

The reliability of a process machine can be significantly enhanced by introducing a fault-tolerant control system in it. Hardware redundancy is an important aspect to enhance fault tolerance capability and is studied in this paper. A novel modified triple modular redundancy (MTMR) approach is proposed for the sensors to avoid a shutdown in the case of simultaneous faults in more than one sensor, and dual redundancy is proposed for the actuators to avoid a single point of failure due to the single actuator fault. The performance of the control system is verified by simulation in MATLAB Simulink environment. The proposed MTMR fulfills the gap in conventional TMR by maintaining stability even in the case of simultaneous faults in two channels. Cost and benefit analysis (CBA) is carried out to determine the financial feasibility of the implementation of the proposed system. The results of the CBA demonstrate that the proposed system is financially feasible due to the positive net present value and small breakeven period.

Optimized FPGA Implementation of PWAM-Based Control of Three—Phase Nine—Level Quasi Impedance Source Inverter

Inherent buck–boost capability, reduced component count, controlled power injection and multilevel operation are some of the advantages which makes cascaded qZSI popular for integrating the generated solar energy with the utility grid. Phase–Shifted Carrier PWM (PSCPWM) and Pulse Width Amplitude Modulation (PWAM) are the most popular techniques for achieving multilevel qZSI operation. Generally, closed loop control implementation of three – phase qZSI system consists of large number of slave controllers (placed locally for voltage control) and one centralized master controller (for grid integration or load current control). Since the aim is to control single system with this highly distributed control structure, issues of clock pulse and interrupt signal synchronization, hardware and software redundancy are common in these implementations. This limits the utilization factor and step size of these control boards. To address these issues, either more optimized solutions must be suggested, or distribution of control structure must be reduced. In this paper, closed loop control of nine – level three – phase qZSI system is implemented using single FPGA control board thereby eliminating above said problems. Since, PWAM control algorithm is more complex than PSCPWM, FPGA based implementation for PWAM control is discussed. Critical implementation processes consisting of DAC – ADC interfacing, FPGA code per unitization, PI Controller realization and different clock pulse utilization are presented. For highlighting and comparing the resource consumption, PWAM and PSCPWM modulation are compared in terms of device utilization. Transient analysis and control algorithm are presented and validated during both starting and load transient conditions by means of simulation results. Finally, hardware results of these modulation methods are discussed and analyzed.

Nonlinear High-Gain Observer-Based Diagnosis and Compensation for Actuator and Sensor Faults in a Quadrotor Unmanned Aerial Vehicle

This paper studies the diagnosis and compensation for sensor and actuator faults in a quadrotor unmanned aerial vehicle. Without adding sensors or actuators for increased hardware redundancy, an observer-based adaptive controller is proposed to estimate and compensate for the faults. First, using a feedback linearization technique, an inner controller is designed to transform the form of the considered quadrotor unmanned aerial vehicle with faults into a nonlinear system with Lipschitz-like nonlinearities and parametric faulty models. Second, the estimations for unmeasurable state and actuator faults are performed in an output-feedback outer controller to compensate for the actuator faults. Third, a nonlinear high-gain observer is designed to provide the information of the state and faults to the outer controller, with the compensations for sensor faults. A Lyapunov-based analysis shows that appropriate choices of the controller parameters can guarantee the exponential convergence of errors in estimation and trajectory tracking under uncertainties and faults. The robustness to the external disturbances is also discussed. Simulations are given to verify the effectiveness of the proposed scheme. The proposed approach is also implemented on a quadrotor unmanned aerial vehicle to show its feasibility in real-time applications.

A dependability and cost optimisation method for private cloud infrastructures

Creating a cost-effective and highly available private cloud infrastructure from scratch is challenging. In order to improve availability, system administrators commonly employ redundant hardware, which incurs increased acquisition cost. There are plenty of decisions involved in this process. It is necessary to specify how many servers will be employed, and each of them will have a role in the infrastructure either as a worker node or as a management node. One question that arises is: among all possible ways to arrange the servers, and considering a set of requirements (e.g., the minimum number of available workers, minimum availability), which configurations can sustain a minimal availability level (steady state and capacity oriented)? This work proposes an optimisation model for private clouds planning supported by analytical modelling for computing the cost of solutions. By combining the optimisation model with the bisection method, it is possible to minimise the acquisition cost while maintaining the high availability of the cloud. The proposed method can also be applied to other parallel or distributed systems with the same properties as the private clouds used in this study.

IMITATION MODELING OF THE RECOVERY PROCESS OF THE ON-BOARD FAULT-TOLERANCE COMPUTER SYSTEM

The possibility of imitation modeling of automatic recovery of a computer fault-tolerance system, whose elements have additional hardware and software redundancy in case successive failures, is considered on the base of a directed probabilistic graph whose tops correspond to possible states of the system, and the arcs between them determine the probabilities of transitions from one state to another, the arc length determines the random time of automatic recover, statistical characteristics of the recovery process are determined on the base of passage of the routes along the probabilistic graph from initial top to the final one.

A Method for Fault Detection and Diagnostics in Ventilation Units Using Virtual Sensors.

Buildings represent a significant portion of global energy consumption. Ventilation units are complex components, often customized for the specific building, responsible for a large part of energy consumption. Their faults impact buildings’ energy efficiency and occupancy comfort. In order to ensure their correct operation, proper fault detection and diagnostics methods must be applied. Hardware redundancy, an effective approach to detect faults, leads to increased costs and space requirements. We propose exploiting physical relations inside ventilation units to create virtual sensors from other sensors’ readings, introducing redundancy in the system. We use two different measures to detect when a virtual sensor deviates from the physical one: coefficient of determination for linear models, and acceptable range. We tested our method on a real building at the University of Southern Denmark, developing three virtual sensors: temperature, airflow, and fan speed. We employed linear regression models, statistical models, and non-linear regression models. All models detected an anomalous strong oscillation in the temperature sensors. Readings fell outside the acceptable range and the coefficient of determination dropped. Our method showed promising results by introducing redundancy in the system, which can benefit several applications, such as fault detection and diagnostics and fault-tolerant control. Future work will be necessary to discover thresholds and set up automatic fault detection and diagnostics.

An efficient resource allocation scheme in a dense RFID network based on cellular learning automata

SummaryRadio‐frequency identification (RFID) is a wireless communication technology. Radio frequencies can cause interference in a dense RFID system, thus decreasing efficiency. In recent years, many protocols have been proposed to reduce reader collisions based on multiple‐access techniques. The main weakness of Time Division Multiple Access (TDMA)‐based schemes is the random selection of resources. Additionally, they do not consider the distance between the interfering readers. Therefore, the likelihood of interference in an RFID system will be increased. To address this problem, we propose a new scheme for allocating resources to readers using a learning technique. The proposed scheme takes into account the distance between interfering readers, and these readers acquire the necessary knowledge to select new resources based on the results of the previous selection of neighboring readers using cellular learning automata. This approach leads to reduced interference in an RFID system. The proposed scheme is fully distributed and operates without hardware redundancy. In this scheme, the readers select new resources without exchanging information with each other. The simulation results show that the percentage of kicked readers decreased by more than 20%, and the proposed scheme also provides higher throughput than do state‐of‐the‐art schemes for dense reader environments and leads to further recognition of tags.

ЗАБЕЗПЕЧЕННЯ ФУНКЦІОНАЛЬНО СТІЙКОГО РУХУ МАЛОГО АВТОНОМНОГО ЛІТАЛЬНОГО АПАРАТУ

The subjects of the study are the models and methods for providing functionally steady motion control of the small unmanned aerial vehicle (SUAV). The purpose of this work is the development of the method for providing functionally steady motion control of SUAV with a classical, minimally necessary composition of measuring sensors without hardware redundancy. The main task is to improve the existing diagnosing method of inertial navigation system (INS) model of SUAV, based on the combination of signals and the introduction of visual information from the onboard gyrostabilized camera, to implement the method of parrying emergency situation (ES) by applying for situational, synthetically created redundancy. The applied methods are the application of artificial system-hardware redundancy, signal-parametric approach, and the introduction of computer vision methods in the problem of angular and spatial positions calculating. As a result of the research, algorithmic dependencies of the orientation system signals were determined, which allowed to perform analysis and diagnostics with the subsequent restoration of the lost parameter due to hardware-system sensors redundancy. Conclusions. Developments in the field of providing functionally steady motion control systems for SUAV are in demand due to the need to increase the level of safety of SUAV flight upon incurrence of ES. At the same time, an obvious advantage is a work with minimal hardware redundancy of the sensors without the intervention of additional equipment. It is proved the possibility of the introduction of the optical systems (OS) as an additional source of geospatial information based on the use of visual information and computer vision methods with subsequent provision of artificial redundancy and implementation of majority calculation for providing functionally steady motion control of SUAV. It is demonstrated the practical application of the method in real conditions with the influence of artificially created ES. A functionally stable system will increase the effectiveness of existing SUAV, reduce the risk of loss of the apparatus during the flight

DESIGN AUTOMATION OF EASY-TESTED DIGITAL FINITE STATE MACHINES

Context. The relevance of the work is to provide minimal additional hardware costs during design automation of easy-tested digitaldevices, which are represented by models of control finite state machines on hardware description languages.Objective. To develop procedures of models’ constructing of easy-tested control finite state machines on hardware descriptionlanguages and estimate hardware costs for different methods of hardware redundancy introduction to HDL-models of finite state machines.Method. The introduction to HDL-models of control finite state machines, which are presented in the form of the FSM template,hardware redundancy (additional fragments of the HDL-code), providing the forcing setting of finite state machine into an arbitrary statewithout the use of synchronizing sequences. For implementation of this approach, the method of FSM’s state table extending is applied,which ensures the mode of bypassing of all nodes of FSM’ state diagram in the diagnostic mode.Results. Simulation of extended VHDL-models of the control FSM using Active-HDL confirmed the operability of this approach.Synthesis of these models using CAD XILINX ISE confirmed the receipt of testable structures and showed the minimum hardware costs forthe method associated with the extension of the state table, in comparison with the organization of the shift register in the Scan Path mode.Conclusions. The task of computer-aided design of testable control finite state machine on the basis of application of FSM’ settingmethods into given state is solved in the work. The optimal way of the setting organization into an arbitrary state of the control FSM is toexpand the state table, which improves the controllability of FSM’ states and leads to the structure’ transformation of their HDL-modelsinto easy-tested ones.The scientific novelty of the work is the transformation of control FSM’ models on hardware description languages, which is realizedby introduction of the additional symbol to the state table, providing the settings of the FSM into an arbitrary state without the use ofsynchronizing sequences.The practical significance of obtained results is to confirm the optimality, in terms of additional hardware costs, of the setting methodof the control FSM into an arbitrary state by introducing the additional symbol into the state table.

A Reconfiguration-Based Fault-Tolerant Anti-Lock Brake-by-Wire System

Anti-Lock Braking Systems (ABS) and Brake-by-Wire Systems (BBW) are safety-critical applications by nature. Such systems are required to demonstrate high degrees of dependability. Fault-tolerance is the primary means to achieve dependability at runtime and has been an active research area for decades. Fault-tolerance is usually achieved in traditional embedded computing systems through redundancy and voting methods. In such systems, hardware units, actuators, sensors, and communication networks are replicated where special voters vote against faulty units. In addition to traditional hardware and software redundancy, hybrid and reconfiguration-based approaches to fault-tolerance are evolving. In this article, we present a reconfiguration-based fault-tolerant approach to achieve high dependability in ABS BBW braking systems. The proposed architecture makes use of other components of less safety-critical systems to maintain high dependability in the more safety-critical systems. This is achieved by migrating safety-critical software tasks from embedded computer hardware that runs into a malfunction to other embedded computing hardware running less-critical software tasks. Or by using a different configuration in terms of the used speed sensors and type of ABS. The proposed architecture is on average 20% more reliable than conventional ABS architectures assuming equal reliabilities of different components.

Direct power control of three-level NPC grid-connected system combined with fault-tolerant technology

In this paper, a three-level NPC grid-connected system is studied, and the direct power control strategy based on virtual flux linkage is applied to the grid-connected inverter. When the three-level main circuit fails, if the hardware redundancy method is still used, it will bring a series of problems to the system, such as increasing the volume and cost of the system, resulting in a waste of resources. In view of this situation, the redundant resources of the multilevel converter are used to realize the fault-tolerant control in this paper. Suppose a bridge arm has only one switch short circuit, by re-adjusting the action sequence and action time of the voltage vector, the system can continue to run while ensuring reliability although performance degradation. Simulation and experiment show that the method adopted is correct and feasible.

Functional Safety Design of Four-Wheel Independent Brake System on Electric Vehicle

The fault trees are set up to analyse the five failure modes of wire controlled four-wheel independent brake system on electric vehicle.The hardware redundancy is designed. The control strategy with ASIL D is established. The method of joint simulation of CarSim and MATLAB/Simulink is adopted. After fault injection, the simulation tests are carried out under the conditions of wire brake. It shows that the system has reached the ASIL D from analyses.

Методи автоматизації проектування легкотестованих комп'ютерних систем і пристроїв на основі цифрових автоматів

The relevance of the work is to provide minimal additional hardware costs during design automation of easy-tested digital devices, which are represented by models of control finite state machines on hardware description languages.To develop procedures of models’ constructing of easy-tested control finite state machines on hardware description languages and estimate hardware costs for different methods of hardware redundancy introduction to HDL-models of finite state machines.The introduction to HDL-models of control finite state machines, which are presented in the form of the FSM template, hardware redundancy (additional fragments of the HDL-code), providing the forcing setting of finite state machine into an arbitrary state without the use of synchronizing sequences. For implementation of this approach, the method of FSM's state table extending is applied, which ensures the mode of bypassing of all nodes of FSM' state diagram in the diagnostic mode.Simulation of extended VHDL-models of the control FSM using Active-HDL confirmed the operability of this approach. Synthesis of these models using CAD XILINX ISE confirmed the receipt of testable structures and showed the minimum hardware costs for the method associated with the extension of the state table, in comparison with the organization of the shift register in the Scan Path mode.The task of computer-aided design of testable control finite state machine on the basis of application of FSM’ setting methods into given state is solved in the work. The optimal way of the setting organization into an arbitrary state of the control FSM is to expand the state table, which improves the controllability of FSM' states and leads to the structure' transformation of their HDL-models into easy-tested ones. The scientific novelty of the work is the transformation of control FSM’ models on hardware description languages, which is realized by introduction of the additional symbol to the state table, providing the settings of the FSM into an arbitrary state without the use of synchronizing sequences. The practical significance of obtained results is to confirm the optimality, in terms of additional hardware costs, of the setting method of the control FSM into an arbitrary state by introducing the additional symbol into the state table.

Hardware redundancy architecture based on reconfigurable logic blocks with persistent high reliability improvement

On-chip digital system reliability is an important concern today in many critical applications. To achieve high reliability, hardware redundancy architectures are often employed. One of the most frequently used architectures is the triple modular redundancy due to its simplicity and good reliability improvement in the early stages of a product lifetime. However, one of its main drawbacks is the high area overhead, which presents a problem especially in non-time-critical applications. An alternative approach based on reconfigurable logic blocks is proposed in this paper for non-time-critical applications. The aim is to reduce the area overhead below the triple modular redundancy levels while also improving the overall system reliability over the entire operational stage of the product lifetime. Experimental results show that using reconfigurable logic blocks instead of triple modular redundancy the area overhead of redundancy can be significantly reduced up to 71% while also increasing the system reliability over the entire lifetime.

Chemical and structural analysis on magnetic tunnel junctions using a decelerated scanning electron beam

Current information technology relies on the advancement of nanofabrication techniques. For instance, the latest computer memories and hard disk drive read heads are designed with a 12 nm node and 20 nm wide architectures, respectively. With matured nanofabrication processes, a yield of such nanoelectronic devices is typically up to about 90%. To date the yield has been compensated with redundant hardware and software error corrections. In the latest memories, approximately 5% redundancy and parity bits for error corrections are used, which increase the total production cost of the devices. This means the yield directly affects the device costs. It is hence critical to increase the yield in nanofabrication. In this paper, we have applied our recently developed method to image buried interfaces in combination with chemical analysis to evaluate magnetic tunnel junctions and have revealed their different magnetoresistance ratios caused by the presence of materials formed at the junction edges. The formation of these materials can be avoided by optimising the junction patterning process to remove residual carbon introduced from resist. Our imaging method with chemical analysis have demonstrated a significant potential for the improvement of junction performance, resulting in higher yields. This can be used as a quality assurance tool in a nanoelectronic device production line.

Integral Sensor Fault Detection and Isolation for Railway Traction Drive.

Due to the increasing importance of reliability and availability of electric traction drives in Railway applications, early detection of faults has become an important key for Railway traction drive manufacturers. Sensor faults are important sources of failures. Among the different fault diagnosis approaches, in this article an integral diagnosis strategy for sensors in traction drives is presented. Such strategy is composed of an observer-based approach for direct current (DC)-link voltage and catenary current sensors, a frequency analysis approach for motor current phase sensors and a hardware redundancy solution for speed sensors. None of them requires any hardware change requirement in the actual traction drive. All the fault detection and isolation approaches have been validated in a Hardware-in-the-loop platform comprising a Real Time Simulator and a commercial Traction Control Unit for a tram. In comparison to safety-critical systems in Aerospace applications, Railway applications do not need instantaneous detection, and the diagnosis is validated in a short time period for reliable decision. Combining the different approaches and existing hardware redundancy, an integral fault diagnosis solution is provided, to detect and isolate faults in all the sensors installed in the traction drive.

Enhancing transient fault tolerance in embedded systems through an OS task level redundancy approach

In numerous safety critical applications, the use of high-reliability or radiation-tolerant equipment may not be a viable option due to the presence of several constraints (such as cost) and the need to utilize Commercial off-the Shelf (COTS) equipment. However, such equipment may not meet reliability requirements, and therefore certain appropriate measures need to be taken to enhance their reliability. In this paper, a fully software-based method is presented to increase the reliability of COTS equipment against transient faults. The reliability of COTS is increased by utilizing a task-level redundancy in operating system. The proposed method is evaluated using a software fault injection method and a full system prototype. The experimental results show that the proposed method increases the fault coverage up to 99.34%. Moreover, the proposed method can be used in embedded systems without any hardware, software, or information redundancy.

A Programmable IEEE 1500-Compliant Wrapper for Testing of Word-Oriented Memory Cores

In today’s embedded technology, memories are the universal components. With the onset of the deep-submicron VLSI technology, the density and capacity of the memory are growing. However, providing a cost-effective test solution for these on-chip memories is becoming a challenging task. As memory and other processing cores have been embedded deeply in system chips, the IEEE std 1500 has been suggested to facilitate the test of these core types. Whereas up to now this standard has not presented a definite solution for testing of memory cores, in this paper, we proposed a programmable IEEE 1500-compliant wrapper for applying several Mach algorithms on word-oriented memory cores to reach the desired fault coverage. The proposed wrapper is without finite-state-machine controller, and as a result, the complexity of wrapper circuitry is low and hardware redundancy is acceptable as well.

RETRACTED ARTICLE: Research on smart city service system based on adaptive algorithm

The information resources of various departments are limited, resulting in duplication of information systems and extensive redundancy of hardware and software resources. In order to change the above status, catalogue management service system for smart city is introduced. In addition, the structural level of government information resources is analyzed. Cloud platform, information recommendation, string similarity matching and other technologies are used to connect and share the system information of the departmental government. In this case, the catalogue information resources are used wisely. The LPvA-Index index structure is given based on the existing Gram–Trie tree. LPvA-Index adaptively selects the appropriate length of the Prefix filter, resulting in fewer inverted tables. In addition, filters are used during reads, thus reducing the number of candidate sets and increasing the query efficiency of strings. At the same time, the length segmentation and location segmentation methods are applied to the Gram–Trie tree. Finally, the test platform is built. The efficiency of the LPvA-Index index structure and the existing LPA-Index index structure under certain conditions is tested and compared.